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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-10 14:48:43 -0700
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-10 14:48:43 -0700
commit0f166396e7e8931bb4acfd1a6ea1bd4f0b43f1dd (patch)
tree6279fa70695a4c56b7e935018a4c0fc1dfa82e68 /include/asm-mips/tx4938/spi.h
parent5f60cfd932b42c69ed3226400cb5eab152576c3a (diff)
parent105b1bca4d7bed85bb296f7e7caec2fc643e9fbf (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (62 commits) [MIPS] PNX8550: Cleanup proc code. [MIPS] WRPPMC: Fix build. [MIPS] Yosemite: Fix modpost warnings. [MIPS] Change names of local variables to silence sparse [MIPS] SB1: Fix modpost warning. [MIPS] PNX: Fix modpost warnings. [MIPS] Alchemy: Fix modpost warnings. [MIPS] Non-FPAFF: Fix warning. [MIPS] DEC: Fix modpost warning. [MIPS] MIPSsim: Enable MIPSsim virtual network driver. [MIPS] Delete Ocelot 3 support. [MIPS] remove LASAT Networks platforms support [MIPS] Early check for SMTC kernel on non-MT processor [MIPS] Add debugfs files to show fpuemu statistics [MIPS] Add some debugfs files to debug unaligned accesses [MIPS] rbtx4938: Fix secondary PCIC and glue internal NICs [MIPS] tc35815: Load MAC address via platform_device [MIPS] Move FPU affinity code into separate file. [MIPS] Make ioremap() work on TX39/49 special unmapped segment [MIPS] rbtx4938: Update and minimize defconfig ...
Diffstat (limited to 'include/asm-mips/tx4938/spi.h')
-rw-r--r--include/asm-mips/tx4938/spi.h56
1 files changed, 1 insertions, 55 deletions
diff --git a/include/asm-mips/tx4938/spi.h b/include/asm-mips/tx4938/spi.h
index 0dbbab820a5..6a60c83e152 100644
--- a/include/asm-mips/tx4938/spi.h
+++ b/include/asm-mips/tx4938/spi.h
@@ -14,61 +14,7 @@
#ifndef __ASM_TX_BOARDS_TX4938_SPI_H
#define __ASM_TX_BOARDS_TX4938_SPI_H
-/* SPI */
-struct spi_dev_desc {
- unsigned int baud;
- unsigned short tcss, tcsh, tcsr; /* CS setup/hold/recovery time */
- unsigned int byteorder:1; /* 0:LSB-First, 1:MSB-First */
- unsigned int polarity:1; /* 0:High-Active */
- unsigned int phase:1; /* 0:Sample-Then-Shift */
-};
-
-extern void txx9_spi_init(unsigned long base, int (*cs_func)(int chipid, int on)) __init;
-extern void txx9_spi_irqinit(int irc_irq) __init;
-extern int txx9_spi_io(int chipid, struct spi_dev_desc *desc,
- unsigned char **inbufs, unsigned int *incounts,
- unsigned char **outbufs, unsigned int *outcounts,
- int cansleep);
-extern int spi_eeprom_write_enable(int chipid, int enable);
-extern int spi_eeprom_read_status(int chipid);
+extern int spi_eeprom_register(int chipid);
extern int spi_eeprom_read(int chipid, int address, unsigned char *buf, int len);
-extern int spi_eeprom_write(int chipid, int address, unsigned char *buf, int len);
-extern void spi_eeprom_proc_create(struct proc_dir_entry *dir, int chipid) __init;
-
-#define TXX9_IMCLK (txx9_gbus_clock / 2)
-
-/*
-* SPI
-*/
-
-/* SPMCR : SPI Master Control */
-#define TXx9_SPMCR_OPMODE 0xc0
-#define TXx9_SPMCR_CONFIG 0x40
-#define TXx9_SPMCR_ACTIVE 0x80
-#define TXx9_SPMCR_SPSTP 0x02
-#define TXx9_SPMCR_BCLR 0x01
-
-/* SPCR0 : SPI Status */
-#define TXx9_SPCR0_TXIFL_MASK 0xc000
-#define TXx9_SPCR0_RXIFL_MASK 0x3000
-#define TXx9_SPCR0_SIDIE 0x0800
-#define TXx9_SPCR0_SOEIE 0x0400
-#define TXx9_SPCR0_RBSIE 0x0200
-#define TXx9_SPCR0_TBSIE 0x0100
-#define TXx9_SPCR0_IFSPSE 0x0010
-#define TXx9_SPCR0_SBOS 0x0004
-#define TXx9_SPCR0_SPHA 0x0002
-#define TXx9_SPCR0_SPOL 0x0001
-
-/* SPSR : SPI Status */
-#define TXx9_SPSR_TBSI 0x8000
-#define TXx9_SPSR_RBSI 0x4000
-#define TXx9_SPSR_TBS_MASK 0x3800
-#define TXx9_SPSR_RBS_MASK 0x0700
-#define TXx9_SPSR_SPOE 0x0080
-#define TXx9_SPSR_IFSD 0x0008
-#define TXx9_SPSR_SIDLE 0x0004
-#define TXx9_SPSR_STRDY 0x0002
-#define TXx9_SPSR_SRRDY 0x0001
#endif /* __ASM_TX_BOARDS_TX4938_SPI_H */