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| author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-29 11:30:45 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-29 11:30:45 -0700 |
| commit | 4d3ce21fa9d2eaeda113aa2f9c2da80d972bef64 (patch) | |
| tree | 9ffa5af467d6e9f6f6c8eb496489bf882613a459 /include/asm-parisc/system.h | |
| parent | b026188e8214ce87790730a56f3017d0bd222751 (diff) | |
| parent | c1a7a755be26f68d7f21ee769584149a96185ea8 (diff) | |
Merge master.kernel.org:/pub/scm/linux/kernel/git/kyle/parisc-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/kyle/parisc-2.6: (23 commits)
[PARISC] Move os_id_to_string() inside #ifndef __ASSEMBLY__
[PARISC] Fix do_gettimeofday() hang
[PARISC] Fix PCREL22F relocation problem for most modules
[PARISC] Refactor show_regs in traps.c
[PARISC] Add os_id_to_string helper
[PARISC] OS_ID_LINUX == 0x0006
[PARISC] Ensure Space ID hashing is turned off
[PARISC] Match show_cache_info with reality
[PARISC] Remove unused macro fixup_branch in syscall.S
[PARISC] Add is_compat_task() helper
[PARISC] Update Thibaut Varene's CREDITS entry
[PARISC] Reduce data footprint in pdc_stable.c
[PARISC] pdc_stable version 0.30
[PARISC] Work around machines which do not support chassis warnings
[PARISC] PDC_CHASSIS is implemented on all machines
[PARISC] Remove unconditional #define PIC in syscall macros
[PARISC] Use MFIA in current_text_addr on pa2.0 processors
[PARISC] Remove dead function pc_in_user_space
[PARISC] Test ioc_needs_fdc variable instead of open coding
[PARISC] Fix gcc 4.1 warnings in sba_iommu.c
...
Diffstat (limited to 'include/asm-parisc/system.h')
| -rw-r--r-- | include/asm-parisc/system.h | 26 |
1 files changed, 14 insertions, 12 deletions
diff --git a/include/asm-parisc/system.h b/include/asm-parisc/system.h index 863876134b2..5fe2d2329ab 100644 --- a/include/asm-parisc/system.h +++ b/include/asm-parisc/system.h @@ -155,13 +155,14 @@ static inline void set_eiem(unsigned long val) type and dynamically select the 16-byte aligned int from the array for the semaphore. */ -#define __PA_LDCW_ALIGNMENT 16 -#define __ldcw_align(a) ({ \ - unsigned long __ret = (unsigned long) &(a)->lock[0]; \ - __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) & ~(__PA_LDCW_ALIGNMENT - 1); \ - (volatile unsigned int *) __ret; \ +#define __PA_LDCW_ALIGNMENT 16 +#define __ldcw_align(a) ({ \ + unsigned long __ret = (unsigned long) &(a)->lock[0]; \ + __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) \ + & ~(__PA_LDCW_ALIGNMENT - 1); \ + (volatile unsigned int *) __ret; \ }) -#define LDCW "ldcw" +#define __LDCW "ldcw" #else /*CONFIG_PA20*/ /* From: "Jim Hull" <jim.hull of hp.com> @@ -171,17 +172,18 @@ static inline void set_eiem(unsigned long val) they only require "natural" alignment (4-byte for ldcw, 8-byte for ldcd). */ -#define __PA_LDCW_ALIGNMENT 4 +#define __PA_LDCW_ALIGNMENT 4 #define __ldcw_align(a) ((volatile unsigned int *)a) -#define LDCW "ldcw,co" +#define __LDCW "ldcw,co" #endif /*!CONFIG_PA20*/ /* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */ -#define __ldcw(a) ({ \ - unsigned __ret; \ - __asm__ __volatile__(LDCW " 0(%1),%0" : "=r" (__ret) : "r" (a)); \ - __ret; \ +#define __ldcw(a) ({ \ + unsigned __ret; \ + __asm__ __volatile__(__LDCW " 0(%1),%0" \ + : "=r" (__ret) : "r" (a)); \ + __ret; \ }) #ifdef CONFIG_SMP |