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authorStefan Richter <stefanr@s5r6.in-berlin.de>2007-02-04 13:04:32 +0100
committerStefan Richter <stefanr@s5r6.in-berlin.de>2007-04-30 00:00:27 +0200
commitf412bf440be2dfc0f0ded917410c599c002549e0 (patch)
tree40201a090195310661dd1b5630c96cd3da2a6713 /include/asm-sparc64/cputime.h
parentb9099ff63c75216d6ca10bce5a1abcd9293c27e6 (diff)
ieee1394: sbp2: remove unnecessary alignments of struct members
The members "dma_addr_t command_orb_dma" and "dma_addr_t sge_dma" of sbp2.h::sbp2_command_info do not have to be aligned themselves --- only the memory which they point to has to be. The member "struct sbp2_command_orb command_orb" has to be aligned on 4 bytes boundary which is guaranteed because it contains u32 members. The member "struct sbp2_unrestricted_page_table scatter_gather_element", i.e. the SBP-2 s/g table, has to be aligned on 8 bytes boundary according to the SBP-2 spec. This is not a requirement for FireWire controllers but could be expected by SBP-2 targets. I see no need to align the members command_orb and scatter_gather_element on CPU cacheline boundaries. It could have performance benefits, but on the other hand sbp2 has a somewhat wasteful allocation scheme which should be optimized first before further tweaks like cacheline alignments. (E.g. don't always allocate SG_ALL s/g table elements.) Note, before as well as after the patch, the code relies on the assumption that memory alignment in the virtual address space is preserved in the physical address space after DMA mapping. Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
Diffstat (limited to 'include/asm-sparc64/cputime.h')
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