diff options
| author | Nick Piggin <npiggin@suse.de> | 2007-10-19 07:13:02 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2007-10-23 22:37:22 +0200 |
| commit | 418ccbe37f70f5021c4cd1cdcb0ce7f98d05f2dd (patch) | |
| tree | d5b968d92b0051ae18b32940d4d7d4da15bcf031 /include/asm-x86/cache.h | |
| parent | ea5806559f92a3e7439bc7a4f2c0d04692e68931 (diff) | |
x86: lock bitops
I missed an obvious one!
x86 CPUs are defined not to reorder stores past earlier loads, so there is
no hardware memory barrier required to implement a release-consistent store
(all stores are, by definition).
So ditch the generic lock bitops, and implement optimised versions for x86,
which removes the mfence from __clear_bit_unlock (which is already a useful
primitive for SLUB).
Signed-off-by: Nick Piggin <npiggin@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/asm-x86/cache.h')
0 files changed, 0 insertions, 0 deletions