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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-03-16 19:28:15 -0700
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-03-16 19:28:15 -0700
commit47455911674d65fba28d43f4135c28ee40c75bac (patch)
treebb109710af11a8e499e971a230fff7316cc49095 /include
parent5379058b718ac6354ba99cc74d10c28d632dc28a (diff)
parentf510aa3bdb095c5253f6bee9e0f5a3a9ac69ded4 (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] Kconfig: Move missplaced NR_CPUS default from SMTC to VSMP. [MIPS] Lockdep: Fix recursion bug. [MIPS] RTLX: Handle copy_*_user return values. [MIPS] RTLX: Protect rtlx_{read,write} with mutex. [MIPS] RTLX: Harden against compiler reordering and optimization. [MIPS] RTLX: Don't use volatile; it's fragile. [MIPS] Lasat: Downgrade 64-bit kernel from experimental to broken. [MIPS] Compat: Fix build if CONFIG_SYSVIPC is disabled. [CHAR] lcd: Fix two warnings. [MIPS] FPU ownership management & preemption fixes [MIPS] Check FCSR for pending interrupts, alternative version [MIPS] IP27, IP35: Fix warnings.
Diffstat (limited to 'include')
-rw-r--r--include/asm-mips/atomic.h40
-rw-r--r--include/asm-mips/bitops.h24
-rw-r--r--include/asm-mips/cpu-features.h3
-rw-r--r--include/asm-mips/cpu-info.h1
-rw-r--r--include/asm-mips/fpu.h54
-rw-r--r--include/asm-mips/mach-ip27/dma-coherence.h5
-rw-r--r--include/asm-mips/mach-ip32/dma-coherence.h5
-rw-r--r--include/asm-mips/rtlx.h4
-rw-r--r--include/asm-mips/system.h16
-rw-r--r--include/asm-mips/thread_info.h1
10 files changed, 96 insertions, 57 deletions
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h
index 8578869a8bc..1ac50b6c47a 100644
--- a/include/asm-mips/atomic.h
+++ b/include/asm-mips/atomic.h
@@ -79,9 +79,9 @@ static __inline__ void atomic_add(int i, atomic_t * v)
} else {
unsigned long flags;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
v->counter += i;
- local_irq_restore(flags);
+ raw_local_irq_restore(flags);
}
}
@@ -124,9 +124,9 @@ static __inline__ void atomic_sub(int i, atomic_t * v)
} else {
unsigned long flags;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
v->counter -= i;
- local_irq_restore(flags);
+ raw_local_irq_restore(flags);
}
}
@@ -173,11 +173,11 @@ static __inline__ int atomic_add_return(int i, atomic_t * v)
} else {
unsigned long flags;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
result = v->counter;
result += i;
v->counter = result;
- local_irq_restore(flags);
+ raw_local_irq_restore(flags);
}
smp_mb();
@@ -225,11 +225,11 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
} else {
unsigned long flags;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
result = v->counter;
result -= i;
v->counter = result;
- local_irq_restore(flags);
+ raw_local_irq_restore(flags);
}
smp_mb();
@@ -293,12 +293,12 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
} else {
unsigned long flags;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
result = v->counter;
result -= i;
if (result >= 0)
v->counter = result;
- local_irq_restore(flags);
+ raw_local_irq_restore(flags);
}
smp_mb();
@@ -454,9 +454,9 @@ static __inline__ void atomic64_add(long i, atomic64_t * v)
} else {
unsigned long flags;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
v->counter += i;
- local_irq_restore(flags);
+ raw_local_irq_restore(flags);
}
}
@@ -499,9 +499,9 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v)
} else {
unsigned long flags;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
v->counter -= i;
- local_irq_restore(flags);
+ raw_local_irq_restore(flags);
}
}
@@ -548,11 +548,11 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
} else {
unsigned long flags;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
result = v->counter;
result += i;
v->counter = result;
- local_irq_restore(flags);
+ raw_local_irq_restore(flags);
}
smp_mb();
@@ -600,11 +600,11 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
} else {
unsigned long flags;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
result = v->counter;
result -= i;
v->counter = result;
- local_irq_restore(flags);
+ raw_local_irq_restore(flags);
}
smp_mb();
@@ -668,12 +668,12 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
} else {
unsigned long flags;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
result = v->counter;
result -= i;
if (result >= 0)
v->counter = result;
- local_irq_restore(flags);
+ raw_local_irq_restore(flags);
}
smp_mb();
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index 8959da245cf..d995413e11f 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -100,9 +100,9 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
a += nr >> SZLONG_LOG;
mask = 1UL << bit;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
*a |= mask;
- local_irq_restore(flags);
+ raw_local_irq_restore(flags);
}
}
@@ -165,9 +165,9 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
a += nr >> SZLONG_LOG;
mask = 1UL << bit;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
*a &= ~mask;
- local_irq_restore(flags);
+ raw_local_irq_restore(flags);
}
}
@@ -220,9 +220,9 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
a += nr >> SZLONG_LOG;
mask = 1UL << bit;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
*a ^= mask;
- local_irq_restore(flags);
+ raw_local_irq_restore(flags);
}
}
@@ -287,10 +287,10 @@ static inline int test_and_set_bit(unsigned long nr,
a += nr >> SZLONG_LOG;
mask = 1UL << bit;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
retval = (mask & *a) != 0;
*a |= mask;
- local_irq_restore(flags);
+ raw_local_irq_restore(flags);
return retval;
}
@@ -381,10 +381,10 @@ static inline int test_and_clear_bit(unsigned long nr,
a += nr >> SZLONG_LOG;
mask = 1UL << bit;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
retval = (mask & *a) != 0;
*a &= ~mask;
- local_irq_restore(flags);
+ raw_local_irq_restore(flags);
return retval;
}
@@ -452,10 +452,10 @@ static inline int test_and_change_bit(unsigned long nr,
a += nr >> SZLONG_LOG;
mask = 1UL << bit;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
retval = (mask & *a) != 0;
*a ^= mask;
- local_irq_restore(flags);
+ raw_local_irq_restore(flags);
return retval;
}
diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h
index eadca266f15..5e4bed123b4 100644
--- a/include/asm-mips/cpu-features.h
+++ b/include/asm-mips/cpu-features.h
@@ -40,6 +40,9 @@
#endif
#ifndef cpu_has_fpu
#define cpu_has_fpu (current_cpu_data.options & MIPS_CPU_FPU)
+#define raw_cpu_has_fpu (raw_current_cpu_data.options & MIPS_CPU_FPU)
+#else
+#define raw_cpu_has_fpu cpu_has_fpu
#endif
#ifndef cpu_has_32fpr
#define cpu_has_32fpr (cpu_data[0].options & MIPS_CPU_32FPR)
diff --git a/include/asm-mips/cpu-info.h b/include/asm-mips/cpu-info.h
index 610d0cdeaa9..22fe8453fcc 100644
--- a/include/asm-mips/cpu-info.h
+++ b/include/asm-mips/cpu-info.h
@@ -87,6 +87,7 @@ struct cpuinfo_mips {
extern struct cpuinfo_mips cpu_data[];
#define current_cpu_data cpu_data[smp_processor_id()]
+#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
extern void cpu_probe(void);
extern void cpu_report(void);
diff --git a/include/asm-mips/fpu.h b/include/asm-mips/fpu.h
index efef843b93f..4e12d1f9534 100644
--- a/include/asm-mips/fpu.h
+++ b/include/asm-mips/fpu.h
@@ -27,11 +27,11 @@
struct sigcontext;
struct sigcontext32;
-extern asmlinkage int (*save_fp_context)(struct sigcontext *sc);
-extern asmlinkage int (*restore_fp_context)(struct sigcontext *sc);
+extern asmlinkage int (*save_fp_context)(struct sigcontext __user *sc);
+extern asmlinkage int (*restore_fp_context)(struct sigcontext __user *sc);
-extern asmlinkage int (*save_fp_context32)(struct sigcontext32 *sc);
-extern asmlinkage int (*restore_fp_context32)(struct sigcontext32 *sc);
+extern asmlinkage int (*save_fp_context32)(struct sigcontext32 __user *sc);
+extern asmlinkage int (*restore_fp_context32)(struct sigcontext32 __user *sc);
extern void fpu_emulator_init_fpu(void);
extern void _init_fpu(void);
@@ -68,6 +68,8 @@ do { \
/* We don't care about the c0 hazard here */ \
} while (0)
+#define __fpu_enabled() (read_c0_status() & ST0_CU1)
+
#define enable_fpu() \
do { \
if (cpu_has_fpu) \
@@ -93,31 +95,47 @@ static inline int is_fpu_owner(void)
return cpu_has_fpu && __is_fpu_owner();
}
-static inline void own_fpu(void)
+static inline void __own_fpu(void)
{
- if (cpu_has_fpu) {
- __enable_fpu();
- KSTK_STATUS(current) |= ST0_CU1;
- set_thread_flag(TIF_USEDFPU);
+ __enable_fpu();
+ KSTK_STATUS(current) |= ST0_CU1;
+ set_thread_flag(TIF_USEDFPU);
+}
+
+static inline void own_fpu(int restore)
+{
+ preempt_disable();
+ if (cpu_has_fpu && !__is_fpu_owner()) {
+ __own_fpu();
+ if (restore)
+ _restore_fp(current);
}
+ preempt_enable();
}
-static inline void lose_fpu(void)
+static inline void lose_fpu(int save)
{
- if (cpu_has_fpu) {
+ preempt_disable();
+ if (is_fpu_owner()) {
+ if (save)
+ _save_fp(current);
KSTK_STATUS(current) &= ~ST0_CU1;
clear_thread_flag(TIF_USEDFPU);
__disable_fpu();
}
+ preempt_enable();
}
static inline void init_fpu(void)
{
+ preempt_disable();
if (cpu_has_fpu) {
+ __own_fpu();
_init_fpu();
} else {
fpu_emulator_init_fpu();
}
+ preempt_enable();
}
static inline void save_fp(struct task_struct *tsk)
@@ -144,4 +162,18 @@ static inline fpureg_t *get_fpu_regs(struct task_struct *tsk)
return tsk->thread.fpu.fpr;
}
+static inline void enable_fp_in_kernel(void)
+{
+ set_thread_flag(TIF_ALLOW_FP_IN_KERNEL);
+ /* make sure CU1 and FPU ownership are consistent */
+ if (!__is_fpu_owner() && __fpu_enabled())
+ __disable_fpu();
+}
+
+static inline void disable_fp_in_kernel(void)
+{
+ BUG_ON(!__is_fpu_owner() && __fpu_enabled());
+ clear_thread_flag(TIF_ALLOW_FP_IN_KERNEL);
+}
+
#endif /* _ASM_FPU_H */
diff --git a/include/asm-mips/mach-ip27/dma-coherence.h b/include/asm-mips/mach-ip27/dma-coherence.h
index 659816e200d..3fdbbf68e95 100644
--- a/include/asm-mips/mach-ip27/dma-coherence.h
+++ b/include/asm-mips/mach-ip27/dma-coherence.h
@@ -18,7 +18,8 @@
struct device;
-static dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, size_t size)
+static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
+ size_t size)
{
dma_addr_t pa = dev_to_baddr(dev, virt_to_phys(addr));
@@ -37,7 +38,7 @@ static unsigned long plat_dma_addr_to_phys(dma_addr_t dma_addr)
return dma_addr & (0xffUL << 56);
}
-static void plat_unmap_dma_mem(dma_addr_t dma_addr)
+static inline void plat_unmap_dma_mem(dma_addr_t dma_addr)
{
}
diff --git a/include/asm-mips/mach-ip32/dma-coherence.h b/include/asm-mips/mach-ip32/dma-coherence.h
index 950be17bbb8..c3f9a6a20eb 100644
--- a/include/asm-mips/mach-ip32/dma-coherence.h
+++ b/include/asm-mips/mach-ip32/dma-coherence.h
@@ -26,7 +26,8 @@ struct device;
#define RAM_OFFSET_MASK 0x3fffffffUL
-static dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, size_t size)
+static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
+ size_t size)
{
dma_addr_t pa = virt_to_phys(addr) & RAM_OFFSET_MASK;
@@ -59,7 +60,7 @@ static unsigned long plat_dma_addr_to_phys(dma_addr_t dma_addr)
return addr;
}
-static void plat_unmap_dma_mem(dma_addr_t dma_addr)
+static inline void plat_unmap_dma_mem(dma_addr_t dma_addr)
{
}
diff --git a/include/asm-mips/rtlx.h b/include/asm-mips/rtlx.h
index 59162f74a79..65778c890a6 100644
--- a/include/asm-mips/rtlx.h
+++ b/include/asm-mips/rtlx.h
@@ -23,8 +23,8 @@
extern int rtlx_open(int index, int can_sleep);
extern int rtlx_release(int index);
-extern ssize_t rtlx_read(int index, void *buff, size_t count, int user);
-extern ssize_t rtlx_write(int index, void *buffer, size_t count, int user);
+extern ssize_t rtlx_read(int index, void __user *buff, size_t count);
+extern ssize_t rtlx_write(int index, const void __user *buffer, size_t count);
extern unsigned int rtlx_read_poll(int index, int can_sleep);
extern unsigned int rtlx_write_poll(int index);
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index 597a3743f6a..290887077e4 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -121,10 +121,10 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
} else {
unsigned long flags;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
retval = *m;
*m = val;
- local_irq_restore(flags); /* implies memory barrier */
+ raw_local_irq_restore(flags); /* implies memory barrier */
}
smp_mb();
@@ -169,10 +169,10 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val)
} else {
unsigned long flags;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
retval = *m;
*m = val;
- local_irq_restore(flags); /* implies memory barrier */
+ raw_local_irq_restore(flags); /* implies memory barrier */
}
smp_mb();
@@ -250,11 +250,11 @@ static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old,
} else {
unsigned long flags;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
retval = *m;
if (retval == old)
*m = new;
- local_irq_restore(flags); /* implies memory barrier */
+ raw_local_irq_restore(flags); /* implies memory barrier */
}
smp_mb();
@@ -304,11 +304,11 @@ static inline unsigned long __cmpxchg_u64(volatile int * m, unsigned long old,
} else {
unsigned long flags;
- local_irq_save(flags);
+ raw_local_irq_save(flags);
retval = *m;
if (retval == old)
*m = new;
- local_irq_restore(flags); /* implies memory barrier */
+ raw_local_irq_restore(flags); /* implies memory barrier */
}
smp_mb();
diff --git a/include/asm-mips/thread_info.h b/include/asm-mips/thread_info.h
index fbcda820447..6cf05f4a4e7 100644
--- a/include/asm-mips/thread_info.h
+++ b/include/asm-mips/thread_info.h
@@ -119,6 +119,7 @@ register struct thread_info *__current_thread_info __asm__("$28");
#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */
#define TIF_MEMDIE 18
#define TIF_FREEZE 19
+#define TIF_ALLOW_FP_IN_KERNEL 20
#define TIF_SYSCALL_TRACE 31 /* syscall trace active */
#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)