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authorSamuel Ortiz <sameo@openedhand.com>2008-06-20 11:02:19 +0200
committerSamuel Ortiz <samuel@sortiz.org>2008-07-20 19:52:38 +0200
commit6f2384c4bdd4be3dc1e5d22ed5e6f0c3076fda60 (patch)
tree2b2db76100b1e7420a661ca1491b67e7b5de79b0 /include
parent5b664cb235e97afbf34db9c4d77f08ebd725335e (diff)
mfd: asic3 gpiolib support
ASIC3 is, among other things, a GPIO extender. We should thus have it supporting the current gpiolib API. Signed-off-by: Samuel Ortiz <sameo@openedhand.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mfd/asic3.h24
1 files changed, 11 insertions, 13 deletions
diff --git a/include/linux/mfd/asic3.h b/include/linux/mfd/asic3.h
index 4ab2162db13..06ef8165f40 100644
--- a/include/linux/mfd/asic3.h
+++ b/include/linux/mfd/asic3.h
@@ -16,16 +16,6 @@
#include <linux/types.h>
-struct asic3 {
- void __iomem *mapping;
- unsigned int bus_shift;
- unsigned int irq_nr;
- unsigned int irq_base;
- spinlock_t lock;
- u16 irq_bothedge[4];
- struct device *dev;
-};
-
struct asic3_platform_data {
struct {
u32 dir;
@@ -41,18 +31,19 @@ struct asic3_platform_data {
unsigned int irq_base;
+ unsigned int gpio_base;
+
struct platform_device **children;
unsigned int n_children;
};
-int asic3_gpio_get_value(struct asic3 *asic, unsigned gpio);
-void asic3_gpio_set_value(struct asic3 *asic, unsigned gpio, int val);
-
#define ASIC3_NUM_GPIO_BANKS 4
#define ASIC3_GPIOS_PER_BANK 16
#define ASIC3_NUM_GPIOS 64
#define ASIC3_NR_IRQS ASIC3_NUM_GPIOS + 6
+#define ASIC3_TO_GPIO(gpio) (NR_BUILTIN_GPIO + (gpio))
+
#define ASIC3_GPIO_BANK_A 0
#define ASIC3_GPIO_BANK_B 1
#define ASIC3_GPIO_BANK_C 2
@@ -73,6 +64,13 @@ void asic3_gpio_set_value(struct asic3 *asic, unsigned gpio, int val);
#define ASIC3_GPIO_C_Base 0x0200
#define ASIC3_GPIO_D_Base 0x0300
+#define ASIC3_GPIO_TO_BANK(gpio) ((gpio) >> 4)
+#define ASIC3_GPIO_TO_BIT(gpio) ((gpio) - \
+ (ASIC3_GPIOS_PER_BANK * ((gpio) >> 4)))
+#define ASIC3_GPIO_TO_MASK(gpio) (1 << ASIC3_GPIO_TO_BIT(gpio))
+#define ASIC3_GPIO_TO_BASE(gpio) (ASIC3_GPIO_A_Base + (((gpio) >> 4) * 0x0100))
+#define ASIC3_BANK_TO_BASE(bank) (ASIC3_GPIO_A_Base + ((bank) * 0x100))
+
#define ASIC3_GPIO_Mask 0x00 /* R/W 0:don't mask */
#define ASIC3_GPIO_Direction 0x04 /* R/W 0:input */
#define ASIC3_GPIO_Out 0x08 /* R/W 0:output low */