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authorStuart Menefy <stuart.menefy@st.com>2007-11-30 17:52:53 +0900
committerPaul Mundt <lethal@linux-sh.org>2008-01-28 13:18:59 +0900
commitd02b08f6e8b184ffef349e395210a5e82ff4f4bc (patch)
tree1dbec9fe6d2315a95855ce5a91f92a2a1fbf5a22 /include
parentcbaa118ecfd99fc5ed7adbd9c34a30e1c05e3c93 (diff)
sh: Clean up places that make 29-bit physical assumptions.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-sh/addrspace.h6
-rw-r--r--include/asm-sh/cpu-sh4/mmu_context.h8
-rw-r--r--include/asm-sh/io.h16
-rw-r--r--include/asm-sh/page.h50
-rw-r--r--include/asm-sh/pgtable.h8
-rw-r--r--include/asm-sh/pgtable_32.h2
-rw-r--r--include/asm-sh/scatterlist.h3
7 files changed, 60 insertions, 33 deletions
diff --git a/include/asm-sh/addrspace.h b/include/asm-sh/addrspace.h
index e7f2deb28e0..fa544fc38c2 100644
--- a/include/asm-sh/addrspace.h
+++ b/include/asm-sh/addrspace.h
@@ -31,6 +31,7 @@
/* Returns the physical address of a PnSEG (n=1,2) address */
#define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff)
+#ifdef CONFIG_29BIT
/*
* Map an address to a certain privileged segment
*/
@@ -42,8 +43,11 @@
((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
#define P4SEGADDR(a) \
((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
-
+#endif /* 29BIT */
#endif /* P1SEG */
+/* Check if an address can be reached in 29 bits */
+#define IS_29BIT(a) (((unsigned long)(a)) < 0x20000000)
+
#endif /* __KERNEL__ */
#endif /* __ASM_SH_ADDRSPACE_H */
diff --git a/include/asm-sh/cpu-sh4/mmu_context.h b/include/asm-sh/cpu-sh4/mmu_context.h
index fdd56e3e3a3..9ea8eb27b18 100644
--- a/include/asm-sh/cpu-sh4/mmu_context.h
+++ b/include/asm-sh/cpu-sh4/mmu_context.h
@@ -30,6 +30,12 @@
#define MMUCR_ME (0)
#endif
+#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40)
+#define MMUCR_SE (1 << 4)
+#else
+#define MMUCR_SE (0)
+#endif
+
#ifdef CONFIG_SH_STORE_QUEUES
#define MMUCR_SQMD (1 << 9)
#else
@@ -37,7 +43,7 @@
#endif
#define MMU_NTLB_ENTRIES 64
-#define MMU_CONTROL_INIT (0x05|MMUCR_SQMD|MMUCR_ME)
+#define MMU_CONTROL_INIT (0x05|MMUCR_SQMD|MMUCR_ME|MMUCR_SE)
#define MMU_ITLB_DATA_ARRAY 0xF3000000
#define MMU_UTLB_DATA_ARRAY 0xF7000000
diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h
index a4e5f5573ee..94900c08951 100644
--- a/include/asm-sh/io.h
+++ b/include/asm-sh/io.h
@@ -273,23 +273,9 @@ extern void onchip_unmap(unsigned long vaddr);
#if !defined(CONFIG_MMU)
#define virt_to_phys(address) ((unsigned long)(address))
#define phys_to_virt(address) ((void *)(address))
-#elif defined(CONFIG_SUPERH64)
+#else
#define virt_to_phys(address) (__pa(address))
#define phys_to_virt(address) (__va(address))
-#else
-/*
- * Change virtual addresses to physical addresses and vv.
- * These are trivial on the 1:1 Linux/SuperH mapping
- */
-static inline unsigned long virt_to_phys(volatile void *address)
-{
- return PHYSADDR(address);
-}
-
-static inline void *phys_to_virt(unsigned long address)
-{
- return (void *)P1SEGADDR(address);
-}
#endif
/*
diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h
index bff635a078c..002e64a4f04 100644
--- a/include/asm-sh/page.h
+++ b/include/asm-sh/page.h
@@ -5,6 +5,8 @@
* Copyright (C) 1999 Niibe Yutaka
*/
+#include <linux/const.h>
+
#ifdef __KERNEL__
/* PAGE_SHIFT determines the page size */
@@ -18,15 +20,13 @@
# error "Bogus kernel page size?"
#endif
-#ifdef __ASSEMBLY__
-#define PAGE_SIZE (1 << PAGE_SHIFT)
-#else
-#define PAGE_SIZE (1UL << PAGE_SHIFT)
-#endif
-
+#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
#define PAGE_MASK (~(PAGE_SIZE-1))
#define PTE_MASK PAGE_MASK
+/* to align the pointer to the (next) page boundary */
+#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
+
#if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
#define HPAGE_SHIFT 16
#elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K)
@@ -104,20 +104,44 @@ typedef struct { unsigned long pgd; } pgd_t;
#endif /* !__ASSEMBLY__ */
-/* to align the pointer to the (next) page boundary */
-#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
-
+/*
+ * __MEMORY_START and SIZE are the physical addresses and size of RAM.
+ */
#define __MEMORY_START CONFIG_MEMORY_START
#define __MEMORY_SIZE CONFIG_MEMORY_SIZE
+/*
+ * PAGE_OFFSET is the virtual address of the start of kernel address
+ * space.
+ */
#define PAGE_OFFSET CONFIG_PAGE_OFFSET
-#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET)
-#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET))
-#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
+/*
+ * Virtual to physical RAM address translation.
+ *
+ * In 29 bit mode, the physical offset of RAM from address 0 is visible in
+ * the kernel virtual address space, and thus we don't have to take
+ * this into account when translating. However in 32 bit mode this offset
+ * is not visible (it is part of the PMB mapping) and so needs to be
+ * added or subtracted as required.
+ */
+#ifdef CONFIG_32BIT
+#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET+__MEMORY_START)
+#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET-__MEMORY_START))
+#else
+#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET)
+#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET))
+#endif
+
+#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
-/* PFN start number, because of __MEMORY_START */
+/*
+ * PFN = physical frame number (ie PFN 0 == physical address 0)
+ * PFN_START is the PFN of the first page of RAM. By defining this we
+ * don't have struct page entries for the portion of address space
+ * between physical address 0 and the start of RAM.
+ */
#define PFN_START (__MEMORY_START >> PAGE_SHIFT)
#define ARCH_PFN_OFFSET (PFN_START)
#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h
index b4d7561cd9e..3df90f003e9 100644
--- a/include/asm-sh/pgtable.h
+++ b/include/asm-sh/pgtable.h
@@ -69,7 +69,13 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
#define FIRST_USER_ADDRESS 0
-#define PTE_PHYS_MASK (0x20000000 - PAGE_SIZE)
+#ifdef CONFIG_32BIT
+#define PHYS_ADDR_MASK 0xffffffff
+#else
+#define PHYS_ADDR_MASK 0x1fffffff
+#endif
+
+#define PTE_PHYS_MASK (PHYS_ADDR_MASK & PAGE_MASK)
#ifdef CONFIG_SUPERH32
#define VMALLOC_START (P3SEG)
diff --git a/include/asm-sh/pgtable_32.h b/include/asm-sh/pgtable_32.h
index 70303603e89..7efc95404c6 100644
--- a/include/asm-sh/pgtable_32.h
+++ b/include/asm-sh/pgtable_32.h
@@ -98,7 +98,7 @@
#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE)
#endif
-#define _PAGE_FLAGS_HARDWARE_MASK (0x1fffffff & ~(_PAGE_CLEAR_FLAGS))
+#define _PAGE_FLAGS_HARDWARE_MASK (PHYS_ADDR_MASK & ~(_PAGE_CLEAR_FLAGS))
/* Hardware flags, page size encoding */
#if defined(CONFIG_X2TLB)
diff --git a/include/asm-sh/scatterlist.h b/include/asm-sh/scatterlist.h
index a7d0d1856a9..35ef9c30f0d 100644
--- a/include/asm-sh/scatterlist.h
+++ b/include/asm-sh/scatterlist.h
@@ -1,6 +1,7 @@
#ifndef __ASM_SH_SCATTERLIST_H
#define __ASM_SH_SCATTERLIST_H
+#include <asm/pgtable.h>
#include <asm/types.h>
struct scatterlist {
@@ -13,7 +14,7 @@ struct scatterlist {
unsigned int length;
};
-#define ISA_DMA_THRESHOLD (0x1fffffff)
+#define ISA_DMA_THRESHOLD PHYS_ADDR_MASK
/* These macros should be used after a pci_map_sg call has been done
* to get bus addresses of each of the SG entries and their lengths.