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authorTakashi Iwai <tiwai@suse.de>2009-05-25 18:34:52 +0200
committerTakashi Iwai <tiwai@suse.de>2009-05-25 18:34:52 +0200
commit4fcd39207f4c91185cc89e3e6a28cbb643034ff1 (patch)
tree1d6dd15ca8133528dc4100ca364f305672b5b110 /sound/pci
parentfa7979663190240b838ab8c8bad7f59e618bf77c (diff)
ALSA: hda - Reset CORB/RIRB at retrying the verb communication
When a codec communication error occurs, the CORB/RIRB counters should be reset first before re-issuing the verb. Simply call azx_free_cmd_io() and azx_init_cmd_io() to achieve that. Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/pci')
-rw-r--r--sound/pci/hda/hda_intel.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 49fd973b85c..3fc75e2061a 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -522,6 +522,7 @@ static void azx_init_cmd_io(struct azx *chip)
/* RIRB set up */
chip->rirb.addr = chip->rb.addr + 2048;
chip->rirb.buf = (u32 *)(chip->rb.area + 2048);
+ chip->rirb.wp = chip->rirb.rp = chip->rirb.cmds = 0;
azx_writel(chip, RIRBLBASE, (u32)chip->rirb.addr);
azx_writel(chip, RIRBUBASE, upper_32_bits(chip->rirb.addr));
@@ -533,7 +534,6 @@ static void azx_init_cmd_io(struct azx *chip)
azx_writew(chip, RINTCNT, 1);
/* enable rirb dma and response irq */
azx_writeb(chip, RIRBCTL, ICH6_RBCTL_DMA_EN | ICH6_RBCTL_IRQ_EN);
- chip->rirb.rp = chip->rirb.cmds = 0;
}
static void azx_free_cmd_io(struct azx *chip)
@@ -654,9 +654,11 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus)
snd_printk(KERN_ERR SFX "azx_get_response timeout (ERROR): "
"last cmd=0x%08x\n", chip->last_cmd);
+ /* re-initialize CORB/RIRB */
spin_lock_irq(&chip->reg_lock);
- chip->rirb.cmds = 0; /* reset the index */
bus->rirb_error = 1;
+ azx_free_cmd_io(chip);
+ azx_init_cmd_io(chip);
spin_unlock_irq(&chip->reg_lock);
return -1;
}