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authorZhao Yakui <yakui.zhao@intel.com>2009-11-20 03:24:16 +0000
committerEric Anholt <eric@anholt.net>2009-11-25 12:46:41 -0800
commit18f9ed12f8c977e25d65a16af8e8d73f72417ba1 (patch)
tree2e840183946aacd6bf310cbf083825d137d199b9 /virt/kvm/kvm_main.c
parentc8e0f93a381d1d76135e567f13a4418fce66fd95 (diff)
drm/i915: Enable LVDS downclock feature through EDID.
If more than one mode with the same resolution defined in EDID has different refresh rate, it is thought that the downclock is found for LVDS. We will program the different FPx0/1 register so that we can select dynamically between the low and high frequency. On the g4x platform we will use the CxSR feature to switch the different refresh rate if the LVDS downclock feature is supported. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'virt/kvm/kvm_main.c')
0 files changed, 0 insertions, 0 deletions