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-rw-r--r--arch/arm/plat-s3c/include/plat/nand.h3
-rw-r--r--drivers/mtd/nand/s3c2410.c6
2 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/plat-s3c/include/plat/nand.h b/arch/arm/plat-s3c/include/plat/nand.h
index f4dcd14af05..048b0f03adf 100644
--- a/arch/arm/plat-s3c/include/plat/nand.h
+++ b/arch/arm/plat-s3c/include/plat/nand.h
@@ -21,11 +21,14 @@
* partitions = mtd partition list
*/
+#define S3C2410_NAND_BBT 0x0001
+
struct s3c2410_nand_set {
unsigned int disable_ecc : 1;
int nr_chips;
int nr_partitions;
+ unsigned int flags;
char *name;
int *nr_map;
struct mtd_partition *partitions;
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 1858a10c4ea..404960d342a 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -698,9 +698,13 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
chip->select_chip = s3c2410_nand_select_chip;
chip->chip_delay = 50;
chip->priv = nmtd;
- chip->options = 0;
chip->controller = &info->controller;
+ if (set->flags & S3C2410_NAND_BBT)
+ chip->options = NAND_USE_FLASH_BBT;
+ else
+ chip->options = 0;
+
switch (info->cpu_type) {
case TYPE_S3C2410:
chip->IO_ADDR_W = regs + S3C2410_NFDATA;