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-rw-r--r--arch/arm/mach-at91rm9200/at91rm9200.c250
-rw-r--r--arch/arm/mach-at91rm9200/board-1arm.c20
-rw-r--r--arch/arm/mach-at91rm9200/board-carmeva.c21
-rw-r--r--arch/arm/mach-at91rm9200/board-csb337.c20
-rw-r--r--arch/arm/mach-at91rm9200/board-csb637.c20
-rw-r--r--arch/arm/mach-at91rm9200/board-dk.c45
-rw-r--r--arch/arm/mach-at91rm9200/board-eb9200.c20
-rw-r--r--arch/arm/mach-at91rm9200/board-ek.c20
-rw-r--r--arch/arm/mach-at91rm9200/board-kafa.c20
-rw-r--r--arch/arm/mach-at91rm9200/board-kb9202.c45
-rw-r--r--arch/arm/mach-at91rm9200/clock.c324
-rw-r--r--arch/arm/mach-at91rm9200/clock.h30
-rw-r--r--arch/arm/mach-at91rm9200/devices.c72
-rw-r--r--arch/arm/mach-at91rm9200/generic.h20
-rw-r--r--arch/arm/mach-at91rm9200/gpio.c89
-rw-r--r--arch/arm/mach-at91rm9200/irq.c6
-rw-r--r--arch/arm/mach-at91rm9200/pm.c14
17 files changed, 546 insertions, 490 deletions
diff --git a/arch/arm/mach-at91rm9200/at91rm9200.c b/arch/arm/mach-at91rm9200/at91rm9200.c
index 0985b1c42c7..dcf6136fedf 100644
--- a/arch/arm/mach-at91rm9200/at91rm9200.c
+++ b/arch/arm/mach-at91rm9200/at91rm9200.c
@@ -17,6 +17,7 @@
#include <asm/hardware.h>
#include "generic.h"
+#include "clock.h"
static struct map_desc at91rm9200_io_desc[] __initdata = {
{
@@ -26,87 +27,224 @@ static struct map_desc at91rm9200_io_desc[] __initdata = {
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_SPI,
- .pfn = __phys_to_pfn(AT91_BASE_SPI),
- .length = SZ_16K,
- .type = MT_DEVICE,
- }, {
- .virtual = AT91_VA_BASE_SSC2,
- .pfn = __phys_to_pfn(AT91_BASE_SSC2),
- .length = SZ_16K,
- .type = MT_DEVICE,
- }, {
- .virtual = AT91_VA_BASE_SSC1,
- .pfn = __phys_to_pfn(AT91_BASE_SSC1),
- .length = SZ_16K,
- .type = MT_DEVICE,
- }, {
- .virtual = AT91_VA_BASE_SSC0,
- .pfn = __phys_to_pfn(AT91_BASE_SSC0),
- .length = SZ_16K,
- .type = MT_DEVICE,
- }, {
- .virtual = AT91_VA_BASE_US3,
- .pfn = __phys_to_pfn(AT91_BASE_US3),
- .length = SZ_16K,
- .type = MT_DEVICE,
- }, {
- .virtual = AT91_VA_BASE_US2,
- .pfn = __phys_to_pfn(AT91_BASE_US2),
- .length = SZ_16K,
- .type = MT_DEVICE,
- }, {
- .virtual = AT91_VA_BASE_US1,
- .pfn = __phys_to_pfn(AT91_BASE_US1),
- .length = SZ_16K,
- .type = MT_DEVICE,
- }, {
- .virtual = AT91_VA_BASE_US0,
- .pfn = __phys_to_pfn(AT91_BASE_US0),
+ .pfn = __phys_to_pfn(AT91RM9200_BASE_SPI),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_EMAC,
- .pfn = __phys_to_pfn(AT91_BASE_EMAC),
+ .pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_TWI,
- .pfn = __phys_to_pfn(AT91_BASE_TWI),
+ .pfn = __phys_to_pfn(AT91RM9200_BASE_TWI),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_MCI,
- .pfn = __phys_to_pfn(AT91_BASE_MCI),
+ .pfn = __phys_to_pfn(AT91RM9200_BASE_MCI),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_VA_BASE_UDP,
- .pfn = __phys_to_pfn(AT91_BASE_UDP),
- .length = SZ_16K,
- .type = MT_DEVICE,
- }, {
- .virtual = AT91_VA_BASE_TCB1,
- .pfn = __phys_to_pfn(AT91_BASE_TCB1),
- .length = SZ_16K,
- .type = MT_DEVICE,
- }, {
- .virtual = AT91_VA_BASE_TCB0,
- .pfn = __phys_to_pfn(AT91_BASE_TCB0),
+ .pfn = __phys_to_pfn(AT91RM9200_BASE_UDP),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_SRAM_VIRT_BASE,
- .pfn = __phys_to_pfn(AT91_SRAM_BASE),
- .length = AT91_SRAM_SIZE,
+ .pfn = __phys_to_pfn(AT91RM9200_SRAM_BASE),
+ .length = AT91RM9200_SRAM_SIZE,
.type = MT_DEVICE,
},
};
-void __init at91rm9200_map_io(void)
+/* --------------------------------------------------------------------
+ * Clocks
+ * -------------------------------------------------------------------- */
+
+/*
+ * The peripheral clocks.
+ */
+static struct clk udc_clk = {
+ .name = "udc_clk",
+ .pmc_mask = 1 << AT91RM9200_ID_UDP,
+ .type = CLK_TYPE_PERIPHERAL,
+};
+static struct clk ohci_clk = {
+ .name = "ohci_clk",
+ .pmc_mask = 1 << AT91RM9200_ID_UHP,
+ .type = CLK_TYPE_PERIPHERAL,
+};
+static struct clk ether_clk = {
+ .name = "ether_clk",
+ .pmc_mask = 1 << AT91RM9200_ID_EMAC,
+ .type = CLK_TYPE_PERIPHERAL,
+};
+static struct clk mmc_clk = {
+ .name = "mci_clk",
+ .pmc_mask = 1 << AT91RM9200_ID_MCI,
+ .type = CLK_TYPE_PERIPHERAL,
+};
+static struct clk twi_clk = {
+ .name = "twi_clk",
+ .pmc_mask = 1 << AT91RM9200_ID_TWI,
+ .type = CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart0_clk = {
+ .name = "usart0_clk",
+ .pmc_mask = 1 << AT91RM9200_ID_US0,
+ .type = CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart1_clk = {
+ .name = "usart1_clk",
+ .pmc_mask = 1 << AT91RM9200_ID_US1,
+ .type = CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart2_clk = {
+ .name = "usart2_clk",
+ .pmc_mask = 1 << AT91RM9200_ID_US2,
+ .type = CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart3_clk = {
+ .name = "usart3_clk",
+ .pmc_mask = 1 << AT91RM9200_ID_US3,
+ .type = CLK_TYPE_PERIPHERAL,
+};
+static struct clk spi_clk = {
+ .name = "spi_clk",
+ .pmc_mask = 1 << AT91RM9200_ID_SPI,
+ .type = CLK_TYPE_PERIPHERAL,
+};
+static struct clk pioA_clk = {
+ .name = "pioA_clk",
+ .pmc_mask = 1 << AT91RM9200_ID_PIOA,
+ .type = CLK_TYPE_PERIPHERAL,
+};
+static struct clk pioB_clk = {
+ .name = "pioB_clk",
+ .pmc_mask = 1 << AT91RM9200_ID_PIOB,
+ .type = CLK_TYPE_PERIPHERAL,
+};
+static struct clk pioC_clk = {
+ .name = "pioC_clk",
+ .pmc_mask = 1 << AT91RM9200_ID_PIOC,
+ .type = CLK_TYPE_PERIPHERAL,
+};
+static struct clk pioD_clk = {
+ .name = "pioD_clk",
+ .pmc_mask = 1 << AT91RM9200_ID_PIOD,
+ .type = CLK_TYPE_PERIPHERAL,
+};
+
+static struct clk *periph_clocks[] __initdata = {
+ &pioA_clk,
+ &pioB_clk,
+ &pioC_clk,
+ &pioD_clk,
+ &usart0_clk,
+ &usart1_clk,
+ &usart2_clk,
+ &usart3_clk,
+ &mmc_clk,
+ &udc_clk,
+ &twi_clk,
+ &spi_clk,
+ // ssc 0 .. ssc2
+ // tc0 .. tc5
+ &ohci_clk,
+ &ether_clk,
+ // irq0 .. irq6
+};
+
+/*
+ * The four programmable clocks.
+ * You must configure pin multiplexing to bring these signals out.
+ */
+static struct clk pck0 = {
+ .name = "pck0",
+ .pmc_mask = AT91_PMC_PCK0,
+ .type = CLK_TYPE_PROGRAMMABLE,
+ .id = 0,
+};
+static struct clk pck1 = {
+ .name = "pck1",
+ .pmc_mask = AT91_PMC_PCK1,
+ .type = CLK_TYPE_PROGRAMMABLE,
+ .id = 1,
+};
+static struct clk pck2 = {
+ .name = "pck2",
+ .pmc_mask = AT91_PMC_PCK2,
+ .type = CLK_TYPE_PROGRAMMABLE,
+ .id = 2,
+};
+static struct clk pck3 = {
+ .name = "pck3",
+ .pmc_mask = AT91_PMC_PCK3,
+ .type = CLK_TYPE_PROGRAMMABLE,
+ .id = 3,
+};
+
+static void __init at91rm9200_register_clocks(void)
{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
+ clk_register(periph_clocks[i]);
+
+ clk_register(&pck0);
+ clk_register(&pck1);
+ clk_register(&pck2);
+ clk_register(&pck3);
+}
+
+/* --------------------------------------------------------------------
+ * GPIO
+ * -------------------------------------------------------------------- */
+
+static struct at91_gpio_bank at91rm9200_gpio[] = {
+ {
+ .id = AT91RM9200_ID_PIOA,
+ .offset = AT91_PIOA,
+ .clock = &pioA_clk,
+ }, {
+ .id = AT91RM9200_ID_PIOB,
+ .offset = AT91_PIOB,
+ .clock = &pioB_clk,
+ }, {
+ .id = AT91RM9200_ID_PIOC,
+ .offset = AT91_PIOC,
+ .clock = &pioC_clk,
+ }, {
+ .id = AT91RM9200_ID_PIOD,
+ .offset = AT91_PIOD,
+ .clock = &pioD_clk,
+ }
+};
+
+/* --------------------------------------------------------------------
+ * AT91RM9200 processor initialization
+ * -------------------------------------------------------------------- */
+void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks)
+{
+ /* Map peripherals */
iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
+
+ /* Init clock subsystem */
+ at91_clock_init(main_clock);
+
+ /* Register the processor-specific clocks */
+ at91rm9200_register_clocks();
+
+ /* Initialize GPIO subsystem */
+ at91_gpio_init(at91rm9200_gpio, banks);
}
+
+/* --------------------------------------------------------------------
+ * Interrupt initialization
+ * -------------------------------------------------------------------- */
+
/*
* The default interrupt priority levels (0 = lowest, 7 = highest).
*/
@@ -145,10 +283,14 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
0 /* Advanced Interrupt Controller (IRQ6) */
};
-void __init at91rm9200_init_irq(unsigned int priority[NR_AIC_IRQS])
+void __init at91rm9200_init_interrupts(unsigned int priority[NR_AIC_IRQS])
{
if (!priority)
priority = at91rm9200_default_irq_priority;
+ /* Initialize the AIC interrupt controller */
at91_aic_init(priority);
+
+ /* Enable GPIO interrupts */
+ at91_gpio_irq_setup();
}
diff --git a/arch/arm/mach-at91rm9200/board-1arm.c b/arch/arm/mach-at91rm9200/board-1arm.c
index dc79e0992af..36eecd7161f 100644
--- a/arch/arm/mach-at91rm9200/board-1arm.c
+++ b/arch/arm/mach-at91rm9200/board-1arm.c
@@ -34,20 +34,11 @@
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
-#include <asm/hardware.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include "generic.h"
-static void __init onearm_init_irq(void)
-{
- /* Initialize AIC controller */
- at91rm9200_init_irq(NULL);
-
- /* Set up the GPIO interrupts */
- at91_gpio_irq_setup(PQFP_GPIO_BANKS);
-}
/*
* Serial port configuration.
@@ -62,15 +53,18 @@ static struct at91_uart_config __initdata onearm_uart_config = {
static void __init onearm_map_io(void)
{
- at91rm9200_map_io();
-
- /* Initialize clocks: 18.432 MHz crystal */
- at91_clock_init(18432000);
+ /* Initialize processor: 18.432 MHz crystal */
+ at91rm9200_initialize(18432000, AT91RM9200_PQFP);
/* Setup the serial ports and console */
at91_init_serial(&onearm_uart_config);
}
+static void __init onearm_init_irq(void)
+{
+ at91rm9200_init_interrupts(NULL);
+}
+
static struct at91_eth_data __initdata onearm_eth_data = {
.phy_irq_pin = AT91_PIN_PC4,
.is_rmii = 1,
diff --git a/arch/arm/mach-at91rm9200/board-carmeva.c b/arch/arm/mach-at91rm9200/board-carmeva.c
index 2c138b542eb..50e513681ae 100644
--- a/arch/arm/mach-at91rm9200/board-carmeva.c
+++ b/arch/arm/mach-at91rm9200/board-carmeva.c
@@ -35,20 +35,11 @@
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
-#include <asm/hardware.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include "generic.h"
-static void __init carmeva_init_irq(void)
-{
- /* Initialize AIC controller */
- at91rm9200_init_irq(NULL);
-
- /* Set up the GPIO interrupts */
- at91_gpio_irq_setup(BGA_GPIO_BANKS);
-}
/*
* Serial port configuration.
@@ -63,15 +54,19 @@ static struct at91_uart_config __initdata carmeva_uart_config = {
static void __init carmeva_map_io(void)
{
- at91rm9200_map_io();
-
- /* Initialize clocks: 20.000 MHz crystal */
- at91_clock_init(20000000);
+ /* Initialize processor: 20.000 MHz crystal */
+ at91rm9200_initialize(20000000, AT91RM9200_BGA);
/* Setup the serial ports and console */
at91_init_serial(&carmeva_uart_config);
}
+static void __init carmeva_init_irq(void)
+{
+ at91rm9200_init_interrupts(NULL);
+}
+
+
static struct at91_eth_data __initdata carmeva_eth_data = {
.phy_irq_pin = AT91_PIN_PC4,
.is_rmii = 1,
diff --git a/arch/arm/mach-at91rm9200/board-csb337.c b/arch/arm/mach-at91rm9200/board-csb337.c
index 794d3fbb449..8eeae491ce7 100644
--- a/arch/arm/mach-at91rm9200/board-csb337.c
+++ b/arch/arm/mach-at91rm9200/board-csb337.c
@@ -34,20 +34,11 @@
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
-#include <asm/hardware.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include "generic.h"
-static void __init csb337_init_irq(void)
-{
- /* Initialize AIC controller */
- at91rm9200_init_irq(NULL);
-
- /* Set up the GPIO interrupts */
- at91_gpio_irq_setup(BGA_GPIO_BANKS);
-}
/*
* Serial port configuration.
@@ -62,10 +53,8 @@ static struct at91_uart_config __initdata csb337_uart_config = {
static void __init csb337_map_io(void)
{
- at91rm9200_map_io();
-
- /* Initialize clocks: 3.6864 MHz crystal */
- at91_clock_init(3686400);
+ /* Initialize processor: 3.6864 MHz crystal */
+ at91rm9200_initialize(3686400, AT91RM9200_BGA);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
@@ -74,6 +63,11 @@ static void __init csb337_map_io(void)
at91_init_serial(&csb337_uart_config);
}
+static void __init csb337_init_irq(void)
+{
+ at91rm9200_init_interrupts(NULL);
+}
+
static struct at91_eth_data __initdata csb337_eth_data = {
.phy_irq_pin = AT91_PIN_PC2,
.is_rmii = 0,
diff --git a/arch/arm/mach-at91rm9200/board-csb637.c b/arch/arm/mach-at91rm9200/board-csb637.c
index c8b6f334246..a29fa0e822c 100644
--- a/arch/arm/mach-at91rm9200/board-csb637.c
+++ b/arch/arm/mach-at91rm9200/board-csb637.c
@@ -33,20 +33,11 @@
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
-#include <asm/hardware.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include "generic.h"
-static void __init csb637_init_irq(void)
-{
- /* Initialize AIC controller */
- at91rm9200_init_irq(NULL);
-
- /* Set up the GPIO interrupts */
- at91_gpio_irq_setup(BGA_GPIO_BANKS);
-}
/*
* Serial port configuration.
@@ -61,10 +52,8 @@ static struct at91_uart_config __initdata csb637_uart_config = {
static void __init csb637_map_io(void)
{
- at91rm9200_map_io();
-
- /* Initialize clocks: 3.6864 MHz crystal */
- at91_clock_init(3686400);
+ /* Initialize processor: 3.6864 MHz crystal */
+ at91rm9200_initialize(3686400, AT91RM9200_BGA);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
@@ -73,6 +62,11 @@ static void __init csb637_map_io(void)
at91_init_serial(&csb637_uart_config);
}
+static void __init csb637_init_irq(void)
+{
+ at91rm9200_init_interrupts(NULL);
+}
+
static struct at91_eth_data __initdata csb637_eth_data = {
.phy_irq_pin = AT91_PIN_PC0,
.is_rmii = 0,
diff --git a/arch/arm/mach-at91rm9200/board-dk.c b/arch/arm/mach-at91rm9200/board-dk.c
index 65873037e02..c699f3984d4 100644
--- a/arch/arm/mach-at91rm9200/board-dk.c
+++ b/arch/arm/mach-at91rm9200/board-dk.c
@@ -37,20 +37,11 @@
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
-#include <asm/hardware.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include "generic.h"
-static void __init dk_init_irq(void)
-{
- /* Initialize AIC controller */
- at91rm9200_init_irq(NULL);
-
- /* Set up the GPIO interrupts */
- at91_gpio_irq_setup(BGA_GPIO_BANKS);
-}
/*
* Serial port configuration.
@@ -65,10 +56,8 @@ static struct at91_uart_config __initdata dk_uart_config = {
static void __init dk_map_io(void)
{
- at91rm9200_map_io();
-
- /* Initialize clocks: 18.432 MHz crystal */
- at91_clock_init(18432000);
+ /* Initialize processor: 18.432 MHz crystal */
+ at91rm9200_initialize(18432000, AT91RM9200_BGA);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
@@ -77,6 +66,11 @@ static void __init dk_map_io(void)
at91_init_serial(&dk_uart_config);
}
+static void __init dk_init_irq(void)
+{
+ at91rm9200_init_interrupts(NULL);
+}
+
static struct at91_eth_data __initdata dk_eth_data = {
.phy_irq_pin = AT91_PIN_PC4,
.is_rmii = 1,
@@ -128,6 +122,29 @@ static struct spi_board_info dk_spi_devices[] = {
#endif
};
+static struct mtd_partition __initdata dk_nand_partition[] = {
+ {
+ .name = "NAND Partition 1",
+ .offset = 0,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct mtd_partition *nand_partitions(int size, int *num_partitions)
+{
+ *num_partitions = ARRAY_SIZE(dk_nand_partition);
+ return dk_nand_partition;
+}
+
+static struct at91_nand_data __initdata dk_nand_data = {
+ .ale = 22,
+ .cle = 21,
+ .det_pin = AT91_PIN_PB1,
+ .rdy_pin = AT91_PIN_PC2,
+ // .enable_pin = ... not there
+ .partition_info = nand_partitions,
+};
+
static void __init dk_board_init(void)
{
/* Serial */
@@ -153,6 +170,8 @@ static void __init dk_board_init(void)
at91_set_gpio_output(AT91_PIN_PB7, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
at91_add_device_mmc(&dk_mmc_data);
#endif
+ /* NAND */
+ at91_add_device_nand(&dk_nand_data);
/* VGA */
// dk_add_device_video();
}
diff --git a/arch/arm/mach-at91rm9200/board-eb9200.c b/arch/arm/mach-at91rm9200/board-eb9200.c
index a3e2df968a6..c6e0d51fbea 100644
--- a/arch/arm/mach-at91rm9200/board-eb9200.c
+++ b/arch/arm/mach-at91rm9200/board-eb9200.c
@@ -35,20 +35,11 @@
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
-#include <asm/hardware.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include "generic.h"
-static void __init eb9200_init_irq(void)
-{
- /* Initialize AIC controller */
- at91rm9200_init_irq(NULL);
-
- /* Set up the GPIO interrupts */
- at91_gpio_irq_setup(BGA_GPIO_BANKS);
-}
/*
* Serial port configuration.
@@ -63,15 +54,18 @@ static struct at91_uart_config __initdata eb9200_uart_config = {
static void __init eb9200_map_io(void)
{
- at91rm9200_map_io();
-
- /* Initialize clocks: 18.432 MHz crystal */
- at91_clock_init(18432000);
+ /* Initialize processor: 18.432 MHz crystal */
+ at91rm9200_initialize(18432000, AT91RM9200_BGA);
/* Setup the serial ports and console */
at91_init_serial(&eb9200_uart_config);
}
+static void __init eb9200_init_irq(void)
+{
+ at91rm9200_init_interrupts(NULL);
+}
+
static struct at91_eth_data __initdata eb9200_eth_data = {
.phy_irq_pin = AT91_PIN_PC4,
.is_rmii = 1,
diff --git a/arch/arm/mach-at91rm9200/board-ek.c b/arch/arm/mach-at91rm9200/board-ek.c
index 868192351dd..830eb793217 100644
--- a/arch/arm/mach-at91rm9200/board-ek.c
+++ b/arch/arm/mach-at91rm9200/board-ek.c
@@ -37,20 +37,11 @@
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
-#include <asm/hardware.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include "generic.h"
-static void __init ek_init_irq(void)
-{
- /* Initialize AIC controller */
- at91rm9200_init_irq(NULL);
-
- /* Set up the GPIO interrupts */
- at91_gpio_irq_setup(BGA_GPIO_BANKS);
-}
/*
* Serial port configuration.
@@ -65,10 +56,8 @@ static struct at91_uart_config __initdata ek_uart_config = {
static void __init ek_map_io(void)
{
- at91rm9200_map_io();
-
- /* Initialize clocks: 18.432 MHz crystal */
- at91_clock_init(18432000);
+ /* Initialize processor: 18.432 MHz crystal */
+ at91rm9200_initialize(18432000, AT91RM9200_BGA);
/* Setup the LEDs */
at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
@@ -77,6 +66,11 @@ static void __init ek_map_io(void)
at91_init_serial(&ek_uart_config);
}
+static void __init ek_init_irq(void)
+{
+ at91rm9200_init_interrupts(NULL);
+}
+
static struct at91_eth_data __initdata ek_eth_data = {
.phy_irq_pin = AT91_PIN_PC4,
.is_rmii = 1,
diff --git a/arch/arm/mach-at91rm9200/board-kafa.c b/arch/arm/mach-at91rm9200/board-kafa.c
index bf760c5e0c4..91e301924f2 100644
--- a/arch/arm/mach-at91rm9200/board-kafa.c
+++ b/arch/arm/mach-at91rm9200/board-kafa.c
@@ -34,20 +34,11 @@
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
-#include <asm/hardware.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include "generic.h"
-static void __init kafa_init_irq(void)
-{
- /* Initialize AIC controller */
- at91rm9200_init_irq(NULL);
-
- /* Set up the GPIO interrupts */
- at91_gpio_irq_setup(PQFP_GPIO_BANKS);
-}
/*
* Serial port configuration.
@@ -62,10 +53,8 @@ static struct at91_uart_config __initdata kafa_uart_config = {
static void __init kafa_map_io(void)
{
- at91rm9200_map_io();
-
- /* Initialize clocks: 18.432 MHz crystal */
- at91_clock_init(18432000);
+ /* Initialize processor: 18.432 MHz crystal */
+ at91rm9200_initialize(18432000, AT91RM9200_PQFP);
/* Set up the LEDs */
at91_init_leds(AT91_PIN_PB4, AT91_PIN_PB4);
@@ -74,6 +63,11 @@ static void __init kafa_map_io(void)
at91_init_serial(&kafa_uart_config);
}
+static void __init kafa_init_irq(void)
+{
+ at91rm9200_init_interrupts(NULL);
+}
+
static struct at91_eth_data __initdata kafa_eth_data = {
.phy_irq_pin = AT91_PIN_PC4,
.is_rmii = 0,
diff --git a/arch/arm/mach-at91rm9200/board-kb9202.c b/arch/arm/mach-at91rm9200/board-kb9202.c
index f06d2b54cc9..272fe43bcec 100644
--- a/arch/arm/mach-at91rm9200/board-kb9202.c
+++ b/arch/arm/mach-at91rm9200/board-kb9202.c
@@ -35,20 +35,11 @@
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
-#include <asm/hardware.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
#include "generic.h"
-static void __init kb9202_init_irq(void)
-{
- /* Initialize AIC controller */
- at91rm9200_init_irq(NULL);
-
- /* Set up the GPIO interrupts */
- at91_gpio_irq_setup(PQFP_GPIO_BANKS);
-}
/*
* Serial port configuration.
@@ -63,10 +54,8 @@ static struct at91_uart_config __initdata kb9202_uart_config = {
static void __init kb9202_map_io(void)
{
- at91rm9200_map_io();
-
- /* Initialize clocks: 10 MHz crystal */
- at91_clock_init(10000000);
+ /* Initialize processor: 10 MHz crystal */
+ at91rm9200_initialize(10000000, AT91RM9200_PQFP);
/* Set up the LEDs */
at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18);
@@ -75,6 +64,11 @@ static void __init kb9202_map_io(void)
at91_init_serial(&kb9202_uart_config);
}
+static void __init kb9202_init_irq(void)
+{
+ at91rm9200_init_interrupts(NULL);
+}
+
static struct at91_eth_data __initdata kb9202_eth_data = {
.phy_irq_pin = AT91_PIN_PB29,
.is_rmii = 0,
@@ -95,6 +89,29 @@ static struct at91_mmc_data __initdata kb9202_mmc_data = {
.wire4 = 1,
};
+static struct mtd_partition __initdata kb9202_nand_partition[] = {
+ {
+ .name = "nand_fs",
+ .offset = 0,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct mtd_partition *nand_partitions(int size, int *num_partitions)
+{
+ *num_partitions = ARRAY_SIZE(kb9202_nand_partition);
+ return kb9202_nand_partition;
+}
+
+static struct at91_nand_data __initdata kb9202_nand_data = {
+ .ale = 22,
+ .cle = 21,
+ // .det_pin = ... not there
+ .rdy_pin = AT91_PIN_PC29,
+ .enable_pin = AT91_PIN_PC28,
+ .partition_info = nand_partitions,
+};
+
static void __init kb9202_board_init(void)
{
/* Serial */
@@ -111,6 +128,8 @@ static void __init kb9202_board_init(void)
at91_add_device_i2c();
/* SPI */
at91_add_device_spi(NULL, 0);
+ /* NAND */
+ at91_add_device_nand(&kb9202_nand_data);
}
MACHINE_START(KB9200, "KB920x")
diff --git a/arch/arm/mach-at91rm9200/clock.c b/arch/arm/mach-at91rm9200/clock.c
index edc2cc837ae..a43b061a7c8 100644
--- a/arch/arm/mach-at91rm9200/clock.c
+++ b/arch/arm/mach-at91rm9200/clock.c
@@ -29,7 +29,7 @@
#include <asm/hardware.h>
-#include "generic.h"
+#include "clock.h"
/*
@@ -38,23 +38,15 @@
* PLLB be used at other rates (on boards that don't need USB), etc.
*/
-struct clk {
- const char *name; /* unique clock name */
- const char *function; /* function of the clock */
- struct device *dev; /* device associated with function */
- unsigned long rate_hz;
- struct clk *parent;
- u32 pmc_mask;
- void (*mode)(struct clk *, int);
- unsigned id:2; /* PCK0..3, or 32k/main/a/b */
- unsigned primary:1;
- unsigned pll:1;
- unsigned programmable:1;
- u16 users;
-};
+#define clk_is_primary(x) ((x)->type & CLK_TYPE_PRIMARY)
+#define clk_is_programmable(x) ((x)->type & CLK_TYPE_PROGRAMMABLE)
+#define clk_is_peripheral(x) ((x)->type & CLK_TYPE_PERIPHERAL)
+
+
+static LIST_HEAD(clocks);
+static DEFINE_SPINLOCK(clk_lock);
-static spinlock_t clk_lock;
-static u32 at91_pllb_usb_init;
+static u32 at91_pllb_usb_init;
/*
* Four primary clock sources: two crystal oscillators (32K, main), and
@@ -67,21 +59,20 @@ static struct clk clk32k = {
.rate_hz = AT91_SLOW_CLOCK,
.users = 1, /* always on */
.id = 0,
- .primary = 1,
+ .type = CLK_TYPE_PRIMARY,
};
static struct clk main_clk = {
.name = "main",
.pmc_mask = AT91_PMC_MOSCS, /* in PMC_SR */
.id = 1,
- .primary = 1,
+ .type = CLK_TYPE_PRIMARY,
};
static struct clk plla = {
.name = "plla",
.parent = &main_clk,
.pmc_mask = AT91_PMC_LOCKA, /* in PMC_SR */
.id = 2,
- .primary = 1,
- .pll = 1,
+ .type = CLK_TYPE_PRIMARY | CLK_TYPE_PLL,
};
static void pllb_mode(struct clk *clk, int is_on)
@@ -94,6 +85,7 @@ static void pllb_mode(struct clk *clk, int is_on)
} else
value = 0;
+ // REVISIT: Add work-around for AT91RM9200 Errata #26 ?
at91_sys_write(AT91_CKGR_PLLBR, value);
do {
@@ -107,8 +99,7 @@ static struct clk pllb = {
.pmc_mask = AT91_PMC_LOCKB, /* in PMC_SR */
.mode = pllb_mode,
.id = 3,
- .primary = 1,
- .pll = 1,
+ .type = CLK_TYPE_PRIMARY | CLK_TYPE_PLL,
};
static void pmc_sys_mode(struct clk *clk, int is_on)
@@ -133,41 +124,6 @@ static struct clk uhpck = {
.mode = pmc_sys_mode,
};
-#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
-/*
- * The four programmable clocks can be parented by any primary clock.
- * You must configure pin multiplexing to bring these signals out.
- */
-static struct clk pck0 = {
- .name = "pck0",
- .pmc_mask = AT91_PMC_PCK0,
- .mode = pmc_sys_mode,
- .programmable = 1,
- .id = 0,
-};
-static struct clk pck1 = {
- .name = "pck1",
- .pmc_mask = AT91_PMC_PCK1,
- .mode = pmc_sys_mode,
- .programmable = 1,
- .id = 1,
-};
-static struct clk pck2 = {
- .name = "pck2",
- .pmc_mask = AT91_PMC_PCK2,
- .mode = pmc_sys_mode,
- .programmable = 1,
- .id = 2,
-};
-static struct clk pck3 = {
- .name = "pck3",
- .pmc_mask = AT91_PMC_PCK3,
- .mode = pmc_sys_mode,
- .programmable = 1,
- .id = 3,
-};
-#endif /* CONFIG_AT91_PROGRAMMABLE_CLOCKS */
-
/*
* The master clock is divided from the CPU clock (by 1-4). It's used for
@@ -187,131 +143,21 @@ static void pmc_periph_mode(struct clk *clk, int is_on)
at91_sys_write(AT91_PMC_PCDR, clk->pmc_mask);
}
-static struct clk udc_clk = {
- .name = "udc_clk",
- .parent = &mck,
- .pmc_mask = 1 << AT91_ID_UDP,
- .mode = pmc_periph_mode,
-};
-static struct clk ohci_clk = {
- .name = "ohci_clk",
- .parent = &mck,
- .pmc_mask = 1 << AT91_ID_UHP,
- .mode = pmc_periph_mode,
-};
-static struct clk ether_clk = {
- .name = "ether_clk",
- .parent = &mck,
- .pmc_mask = 1 << AT91_ID_EMAC,
- .mode = pmc_periph_mode,
-};
-static struct clk mmc_clk = {
- .name = "mci_clk",
- .parent = &mck,
- .pmc_mask = 1 << AT91_ID_MCI,
- .mode = pmc_periph_mode,
-};
-static struct clk twi_clk = {
- .name = "twi_clk",
- .parent = &mck,
- .pmc_mask = 1 << AT91_ID_TWI,
- .mode = pmc_periph_mode,
-};
-static struct clk usart0_clk = {
- .name = "usart0_clk",
- .parent = &mck,
- .pmc_mask = 1 << AT91_ID_US0,
- .mode = pmc_periph_mode,
-};
-static struct clk usart1_clk = {
- .name = "usart1_clk",
- .parent = &mck,
- .pmc_mask = 1 << AT91_ID_US1,
- .mode = pmc_periph_mode,
-};
-static struct clk usart2_clk = {
- .name = "usart2_clk",
- .parent = &mck,
- .pmc_mask = 1 << AT91_ID_US2,
- .mode = pmc_periph_mode,
-};
-static struct clk usart3_clk = {
- .name = "usart3_clk",
- .parent = &mck,
- .pmc_mask = 1 << AT91_ID_US3,
- .mode = pmc_periph_mode,
-};
-static struct clk spi_clk = {
- .name = "spi0_clk",
- .parent = &mck,
- .pmc_mask = 1 << AT91_ID_SPI,
- .mode = pmc_periph_mode,
-};
-static struct clk pioA_clk = {
- .name = "pioA_clk",
- .parent = &mck,
- .pmc_mask = 1 << AT91_ID_PIOA,
- .mode = pmc_periph_mode,
-};
-static struct clk pioB_clk = {
- .name = "pioB_clk",
- .parent = &mck,
- .pmc_mask = 1 << AT91_ID_PIOB,
- .mode = pmc_periph_mode,
-};
-static struct clk pioC_clk = {
- .name = "pioC_clk",
- .parent = &mck,
- .pmc_mask = 1 << AT91_ID_PIOC,
- .mode = pmc_periph_mode,
-};
-static struct clk pioD_clk = {
- .name = "pioD_clk",
- .parent = &mck,
- .pmc_mask = 1 << AT91_ID_PIOD,
- .mode = pmc_periph_mode,
-};
-
-static struct clk *const clock_list[] = {
- /* four primary clocks -- MUST BE FIRST! */
- &clk32k,
- &main_clk,
- &plla,
- &pllb,
-
- /* PLLB children (USB) */
- &udpck,
- &uhpck,
-
-#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
- /* programmable clocks */
- &pck0,
- &pck1,
- &pck2,
- &pck3,
-#endif /* CONFIG_AT91_PROGRAMMABLE_CLOCKS */
-
- /* MCK and peripherals */
- &mck,
- &usart0_clk,
- &usart1_clk,
- &usart2_clk,
- &usart3_clk,
- &mmc_clk,
- &udc_clk,
- &twi_clk,
- &spi_clk,
- &pioA_clk,
- &pioB_clk,
- &pioC_clk,
- &pioD_clk,
- // ssc0..ssc2
- // tc0..tc5
- // irq0..irq6
- &ohci_clk,
- &ether_clk,
-};
+static struct clk __init *at91_css_to_clk(unsigned long css)
+{
+ switch (css) {
+ case AT91_PMC_CSS_SLOW:
+ return &clk32k;
+ case AT91_PMC_CSS_MAIN:
+ return &main_clk;
+ case AT91_PMC_CSS_PLLA:
+ return &plla;
+ case AT91_PMC_CSS_PLLB:
+ return &pllb;
+ }
+ return NULL;
+}
/*
* Associate a particular clock with a function (eg, "uart") and device.
@@ -329,14 +175,12 @@ void __init at91_clock_associate(const char *id, struct device *dev, const char
clk->dev = dev;
}
-/* clocks are all static for now; no refcounting necessary */
+/* clocks cannot be de-registered no refcounting necessary */
struct clk *clk_get(struct device *dev, const char *id)
{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(clock_list); i++) {
- struct clk *clk = clock_list[i];
+ struct clk *clk;
+ list_for_each_entry(clk, &clocks, node) {
if (strcmp(id, clk->name) == 0)
return clk;
if (clk->function && (dev == clk->dev) && strcmp(id, clk->function) == 0)
@@ -424,7 +268,7 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
unsigned prescale;
unsigned long actual;
- if (!clk->programmable)
+ if (!clk_is_programmable(clk))
return -EINVAL;
spin_lock_irqsave(&clk_lock, flags);
@@ -446,7 +290,7 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
unsigned prescale;
unsigned long actual;
- if (!clk->programmable)
+ if (!clk_is_programmable(clk))
return -EINVAL;
if (clk->users)
return -EBUSY;
@@ -484,7 +328,7 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
if (clk->users)
return -EBUSY;
- if (!parent->primary || !clk->programmable)
+ if (!clk_is_primary(parent) || !clk_is_programmable(clk))
return -EINVAL;
spin_lock_irqsave(&clk_lock, flags);
@@ -497,6 +341,18 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
}
EXPORT_SYMBOL(clk_set_parent);
+/* establish PCK0..PCK3 parentage and rate */
+static void init_programmable_clock(struct clk *clk)
+{
+ struct clk *parent;
+ u32 pckr;
+
+ pckr = at91_sys_read(AT91_PMC_PCKR(clk->id));
+ parent = at91_css_to_clk(pckr & AT91_PMC_CSS);
+ clk->parent = parent;
+ clk->rate_hz = parent->rate_hz / (1 << ((pckr >> 2) & 3));
+}
+
#endif /* CONFIG_AT91_PROGRAMMABLE_CLOCKS */
/*------------------------------------------------------------------------*/
@@ -506,6 +362,7 @@ EXPORT_SYMBOL(clk_set_parent);
static int at91_clk_show(struct seq_file *s, void *unused)
{
u32 scsr, pcsr, sr;
+ struct clk *clk;
unsigned i;
seq_printf(s, "SCSR = %8x\n", scsr = at91_sys_read(AT91_PMC_SCSR));
@@ -523,9 +380,8 @@ static int at91_clk_show(struct seq_file *s, void *unused)
seq_printf(s, "\n");
- for (i = 0; i < ARRAY_SIZE(clock_list); i++) {
- char *state;
- struct clk *clk = clock_list[i];
+ list_for_each_entry(clk, &clocks, node) {
+ char *state;
if (clk->mode == pmc_sys_mode)
state = (scsr & clk->pmc_mask) ? "on" : "off";
@@ -570,6 +426,28 @@ postcore_initcall(at91_clk_debugfs_init);
/*------------------------------------------------------------------------*/
+/* Register a new clock */
+int __init clk_register(struct clk *clk)
+{
+ if (clk_is_peripheral(clk)) {
+ clk->parent = &mck;
+ clk->mode = pmc_periph_mode;
+ list_add_tail(&clk->node, &clocks);
+ }
+#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
+ else if (clk_is_programmable(clk)) {
+ clk->mode = pmc_sys_mode;
+ init_programmable_clock(clk);
+ list_add_tail(&clk->node, &clocks);
+ }
+#endif
+
+ return 0;
+}
+
+
+/*------------------------------------------------------------------------*/
+
static u32 __init at91_pll_rate(struct clk *pll, u32 freq, u32 reg)
{
unsigned mul, div;
@@ -640,20 +518,17 @@ fail:
return 0;
}
-
/*
* Several unused clocks may be active. Turn them off.
*/
-static void at91_periphclk_reset(void)
+static void __init at91_periphclk_reset(void)
{
unsigned long reg;
- int i;
+ struct clk *clk;
reg = at91_sys_read(AT91_PMC_PCSR);
- for (i = 0; i < ARRAY_SIZE(clock_list); i++) {
- struct clk *clk = clock_list[i];
-
+ list_for_each_entry(clk, &clocks, node) {
if (clk->mode != pmc_periph_mode)
continue;
@@ -664,11 +539,25 @@ static void at91_periphclk_reset(void)
at91_sys_write(AT91_PMC_PCDR, reg);
}
+static struct clk *const standard_pmc_clocks[] __initdata = {
+ /* four primary clocks */
+ &clk32k,
+ &main_clk,
+ &plla,
+ &pllb,
+
+ /* PLLB children (USB) */
+ &udpck,
+ &uhpck,
+
+ /* MCK */
+ &mck
+};
+
int __init at91_clock_init(unsigned long main_clock)
{
unsigned tmp, freq, mckr;
-
- spin_lock_init(&clk_lock);
+ int i;
/*
* When the bootloader initialized the main oscillator correctly,
@@ -709,11 +598,15 @@ int __init at91_clock_init(unsigned long main_clock)
* For now, assume this parentage won't change.
*/
mckr = at91_sys_read(AT91_PMC_MCKR);
- mck.parent = clock_list[mckr & AT91_PMC_CSS];
+ mck.parent = at91_css_to_clk(mckr & AT91_PMC_CSS);
freq = mck.parent->rate_hz;
freq /= (1 << ((mckr >> 2) & 3)); /* prescale */
mck.rate_hz = freq / (1 + ((mckr >> 8) & 3)); /* mdiv */
+ /* Register the PMC's standard clocks */
+ for (i = 0; i < ARRAY_SIZE(standard_pmc_clocks); i++)
+ list_add_tail(&standard_pmc_clocks[i]->node, &clocks);
+
/* MCK and CPU clock are "always on" */
clk_enable(&mck);
@@ -722,35 +615,8 @@ int __init at91_clock_init(unsigned long main_clock)
(unsigned) main_clock / 1000000,
((unsigned) main_clock % 1000000) / 1000);
-#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
- /* establish PCK0..PCK3 parentage */
- for (tmp = 0; tmp < ARRAY_SIZE(clock_list); tmp++) {
- struct clk *clk = clock_list[tmp], *parent;
- u32 pckr;
-
- if (!clk->programmable)
- continue;
-
- pckr = at91_sys_read(AT91_PMC_PCKR(clk->id));
- parent = clock_list[pckr & AT91_PMC_CSS];
- clk->parent = parent;
- clk->rate_hz = parent->rate_hz / (1 << ((pckr >> 2) & 3));
-
- if (clk->users == 0) {
- /* not being used, so switch it off */
- at91_sys_write(AT91_PMC_SCDR, clk->pmc_mask);
- }
- }
-#else
/* disable all programmable clocks */
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK0 | AT91_PMC_PCK1 | AT91_PMC_PCK2 | AT91_PMC_PCK3);
-#endif
-
- /* enable the PIO clocks */
- clk_enable(&pioA_clk);
- clk_enable(&pioB_clk);
- clk_enable(&pioC_clk);
- clk_enable(&pioD_clk);
/* disable all other unused peripheral clocks */
at91_periphclk_reset();
diff --git a/arch/arm/mach-at91rm9200/clock.h b/arch/arm/mach-at91rm9200/clock.h
new file mode 100644
index 00000000000..0592e662ab3
--- /dev/null
+++ b/arch/arm/mach-at91rm9200/clock.h
@@ -0,0 +1,30 @@
+/*
+ * linux/arch/arm/mach-at91rm9200/clock.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#define CLK_TYPE_PRIMARY 0x1
+#define CLK_TYPE_PLL 0x2
+#define CLK_TYPE_PROGRAMMABLE 0x4
+#define CLK_TYPE_PERIPHERAL 0x8
+
+
+struct clk {
+ struct list_head node;
+ const char *name; /* unique clock name */
+ const char *function; /* function of the clock */
+ struct device *dev; /* device associated with function */
+ unsigned long rate_hz;
+ struct clk *parent;
+ u32 pmc_mask;
+ void (*mode)(struct clk *, int);
+ unsigned id:2; /* PCK0..3, or 32k/main/a/b */
+ unsigned type; /* clock type */
+ u16 users;
+};
+
+
+extern int __init clk_register(struct clk *clk);
diff --git a/arch/arm/mach-at91rm9200/devices.c b/arch/arm/mach-at91rm9200/devices.c
index 4352acb8817..01525530c28 100644
--- a/arch/arm/mach-at91rm9200/devices.c
+++ b/arch/arm/mach-at91rm9200/devices.c
@@ -35,13 +35,13 @@ static struct at91_usbh_data usbh_data;
static struct resource at91_usbh_resources[] = {
[0] = {
- .start = AT91_UHP_BASE,
- .end = AT91_UHP_BASE + SZ_1M - 1,
+ .start = AT91RM9200_UHP_BASE,
+ .end = AT91RM9200_UHP_BASE + SZ_1M - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91_ID_UHP,
- .end = AT91_ID_UHP,
+ .start = AT91RM9200_ID_UHP,
+ .end = AT91RM9200_ID_UHP,
.flags = IORESOURCE_IRQ,
},
};
@@ -80,13 +80,13 @@ static struct at91_udc_data udc_data;
static struct resource at91_udc_resources[] = {
[0] = {
- .start = AT91_BASE_UDP,
- .end = AT91_BASE_UDP + SZ_16K - 1,
+ .start = AT91RM9200_BASE_UDP,
+ .end = AT91RM9200_BASE_UDP + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91_ID_UDP,
- .end = AT91_ID_UDP,
+ .start = AT91RM9200_ID_UDP,
+ .end = AT91RM9200_ID_UDP,
.flags = IORESOURCE_IRQ,
},
};
@@ -131,13 +131,13 @@ static struct at91_eth_data eth_data;
static struct resource at91_eth_resources[] = {
[0] = {
- .start = AT91_BASE_EMAC,
- .end = AT91_BASE_EMAC + SZ_16K - 1,
+ .start = AT91_VA_BASE_EMAC,
+ .end = AT91_VA_BASE_EMAC + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91_ID_EMAC,
- .end = AT91_ID_EMAC,
+ .start = AT91RM9200_ID_EMAC,
+ .end = AT91RM9200_ID_EMAC,
.flags = IORESOURCE_IRQ,
},
};
@@ -263,13 +263,13 @@ static struct at91_mmc_data mmc_data;
static struct resource at91_mmc_resources[] = {
[0] = {
- .start = AT91_BASE_MCI,
- .end = AT91_BASE_MCI + SZ_16K - 1,
+ .start = AT91RM9200_BASE_MCI,
+ .end = AT91RM9200_BASE_MCI + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91_ID_MCI,
- .end = AT91_ID_MCI,
+ .start = AT91RM9200_ID_MCI,
+ .end = AT91RM9200_ID_MCI,
.flags = IORESOURCE_IRQ,
},
};
@@ -423,13 +423,13 @@ static u64 spi_dmamask = 0xffffffffUL;
static struct resource at91_spi_resources[] = {
[0] = {
- .start = AT91_BASE_SPI,
- .end = AT91_BASE_SPI + SZ_16K - 1,
+ .start = AT91RM9200_BASE_SPI,
+ .end = AT91RM9200_BASE_SPI + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91_ID_SPI,
- .end = AT91_ID_SPI,
+ .start = AT91RM9200_ID_SPI,
+ .end = AT91RM9200_ID_SPI,
.flags = IORESOURCE_IRQ,
},
};
@@ -582,13 +582,13 @@ static inline void configure_dbgu_pins(void)
static struct resource uart0_resources[] = {
[0] = {
- .start = AT91_BASE_US0,
- .end = AT91_BASE_US0 + SZ_16K - 1,
+ .start = AT91RM9200_BASE_US0,
+ .end = AT91RM9200_BASE_US0 + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91_ID_US0,
- .end = AT91_ID_US0,
+ .start = AT91RM9200_ID_US0,
+ .end = AT91RM9200_ID_US0,
.flags = IORESOURCE_IRQ,
},
};
@@ -624,13 +624,13 @@ static inline void configure_usart0_pins(void)
static struct resource uart1_resources[] = {
[0] = {
- .start = AT91_BASE_US1,
- .end = AT91_BASE_US1 + SZ_16K - 1,
+ .start = AT91RM9200_BASE_US1,
+ .end = AT91RM9200_BASE_US1 + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91_ID_US1,
- .end = AT91_ID_US1,
+ .start = AT91RM9200_ID_US1,
+ .end = AT91RM9200_ID_US1,
.flags = IORESOURCE_IRQ,
},
};
@@ -665,13 +665,13 @@ static inline void configure_usart1_pins(void)
static struct resource uart2_resources[] = {
[0] = {
- .start = AT91_BASE_US2,
- .end = AT91_BASE_US2 + SZ_16K - 1,
+ .start = AT91RM9200_BASE_US2,
+ .end = AT91RM9200_BASE_US2 + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91_ID_US2,
- .end = AT91_ID_US2,
+ .start = AT91RM9200_ID_US2,
+ .end = AT91RM9200_ID_US2,
.flags = IORESOURCE_IRQ,
},
};
@@ -700,13 +700,13 @@ static inline void configure_usart2_pins(void)
static struct resource uart3_resources[] = {
[0] = {
- .start = AT91_BASE_US3,
- .end = AT91_BASE_US3 + SZ_16K - 1,
+ .start = AT91RM9200_BASE_US3,
+ .end = AT91RM9200_BASE_US3 + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = AT91_ID_US3,
- .end = AT91_ID_US3,
+ .start = AT91RM9200_ID_US3,
+ .end = AT91RM9200_ID_US3,
.flags = IORESOURCE_IRQ,
},
};
diff --git a/arch/arm/mach-at91rm9200/generic.h b/arch/arm/mach-at91rm9200/generic.h
index 7979d8ab7e0..694e411e285 100644
--- a/arch/arm/mach-at91rm9200/generic.h
+++ b/arch/arm/mach-at91rm9200/generic.h
@@ -8,18 +8,17 @@
* published by the Free Software Foundation.
*/
+ /* Processors */
+extern void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks);
+
/* Interrupts */
-extern void __init at91rm9200_init_irq(unsigned int priority[]);
+extern void __init at91rm9200_init_interrupts(unsigned int priority[]);
extern void __init at91_aic_init(unsigned int priority[]);
-extern void __init at91_gpio_irq_setup(unsigned banks);
/* Timer */
struct sys_timer;
extern struct sys_timer at91rm9200_timer;
- /* Memory Map */
-extern void __init at91rm9200_map_io(void);
-
/* Clocks */
extern int __init at91_clock_init(unsigned long main_clock);
struct device;
@@ -29,3 +28,14 @@ extern void __init at91_clock_associate(const char *id, struct device *dev, cons
extern void at91_irq_suspend(void);
extern void at91_irq_resume(void);
+ /* GPIO */
+#define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */
+#define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */
+
+struct at91_gpio_bank {
+ unsigned short id; /* peripheral ID */
+ unsigned long offset; /* offset from system peripheral base */
+ struct clk *clock; /* associated clock */
+};
+extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
+extern void __init at91_gpio_irq_setup(void);
diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91rm9200/gpio.c
index cec199fd672..58c9bf5e952 100644
--- a/arch/arm/mach-at91rm9200/gpio.c
+++ b/arch/arm/mach-at91rm9200/gpio.c
@@ -9,6 +9,7 @@
* (at your option) any later version.
*/
+#include <linux/clk.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
@@ -20,12 +21,12 @@
#include <asm/hardware.h>
#include <asm/arch/gpio.h>
-static const u32 pio_controller_offset[4] = {
- AT91_PIOA,
- AT91_PIOB,
- AT91_PIOC,
- AT91_PIOD,
-};
+#include "generic.h"
+
+
+static struct at91_gpio_bank *gpio;
+static int gpio_banks;
+
static inline void __iomem *pin_to_controller(unsigned pin)
{
@@ -33,8 +34,8 @@ static inline void __iomem *pin_to_controller(unsigned pin)
pin -= PIN_BASE;
pin /= 32;
- if (likely(pin < BGA_GPIO_BANKS))
- return sys_base + pio_controller_offset[pin];
+ if (likely(pin < gpio_banks))
+ return sys_base + gpio[pin].offset;
return NULL;
}
@@ -179,7 +180,6 @@ EXPORT_SYMBOL(at91_set_multi_drive);
/*--------------------------------------------------------------------------*/
-
/*
* assuming the pin is muxed as a gpio output, set its value.
*/
@@ -216,8 +216,8 @@ EXPORT_SYMBOL(at91_get_gpio_value);
#ifdef CONFIG_PM
-static u32 wakeups[BGA_GPIO_BANKS];
-static u32 backups[BGA_GPIO_BANKS];
+static u32 wakeups[MAX_GPIO_BANKS];
+static u32 backups[MAX_GPIO_BANKS];
static int gpio_irq_set_wake(unsigned pin, unsigned state)
{
@@ -226,7 +226,7 @@ static int gpio_irq_set_wake(unsigned pin, unsigned state)
pin -= PIN_BASE;
pin /= 32;
- if (unlikely(pin >= BGA_GPIO_BANKS))
+ if (unlikely(pin >= MAX_GPIO_BANKS))
return -EINVAL;
if (state)
@@ -241,8 +241,8 @@ void at91_gpio_suspend(void)
{
int i;
- for (i = 0; i < BGA_GPIO_BANKS; i++) {
- u32 pio = pio_controller_offset[i];
+ for (i = 0; i < gpio_banks; i++) {
+ u32 pio = gpio[i].offset;
/*
* Note: drivers should have disabled GPIO interrupts that
@@ -257,14 +257,14 @@ void at91_gpio_suspend(void)
* first place!
*/
backups[i] = at91_sys_read(pio + PIO_IMR);
- at91_sys_write(pio_controller_offset[i] + PIO_IDR, backups[i]);
- at91_sys_write(pio_controller_offset[i] + PIO_IER, wakeups[i]);
+ at91_sys_write(pio + PIO_IDR, backups[i]);
+ at91_sys_write(pio + PIO_IER, wakeups[i]);
if (!wakeups[i]) {
- disable_irq_wake(AT91_ID_PIOA + i);
- at91_sys_write(AT91_PMC_PCDR, 1 << (AT91_ID_PIOA + i));
+ disable_irq_wake(gpio[i].id);
+ at91_sys_write(AT91_PMC_PCDR, 1 << gpio[i].id);
} else {
- enable_irq_wake(AT91_ID_PIOA + i);
+ enable_irq_wake(gpio[i].id);
#ifdef CONFIG_PM_DEBUG
printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", "ABCD"[i], wakeups[i]);
#endif
@@ -276,16 +276,13 @@ void at91_gpio_resume(void)
{
int i;
- for (i = 0; i < BGA_GPIO_BANKS; i++) {
- at91_sys_write(pio_controller_offset[i] + PIO_IDR, wakeups[i]);
- at91_sys_write(pio_controller_offset[i] + PIO_IER, backups[i]);
- }
+ for (i = 0; i < gpio_banks; i++) {
+ u32 pio = gpio[i].offset;
- at91_sys_write(AT91_PMC_PCER,
- (1 << AT91_ID_PIOA)
- | (1 << AT91_ID_PIOB)
- | (1 << AT91_ID_PIOC)
- | (1 << AT91_ID_PIOD));
+ at91_sys_write(pio + PIO_IDR, wakeups[i]);
+ at91_sys_write(pio + PIO_IER, backups[i]);
+ at91_sys_write(AT91_PMC_PCER, 1 << gpio[i].id);
+ }
}
#else
@@ -377,20 +374,25 @@ static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs
/* now it may re-trigger */
}
-/* call this from board-specific init_irq */
-void __init at91_gpio_irq_setup(unsigned banks)
+/*--------------------------------------------------------------------------*/
+
+/*
+ * Called from the processor-specific init to enable GPIO interrupt support.
+ */
+void __init at91_gpio_irq_setup(void)
{
- unsigned pioc, pin, id;
+ unsigned pioc, pin;
- if (banks > 4)
- banks = 4;
- for (pioc = 0, pin = PIN_BASE, id = AT91_ID_PIOA;
- pioc < banks;
- pioc++, id++) {
+ for (pioc = 0, pin = PIN_BASE;
+ pioc < gpio_banks;
+ pioc++) {
void __iomem *controller;
+ unsigned id = gpio[pioc].id;
unsigned i;
- controller = (void __iomem *) AT91_VA_BASE_SYS + pio_controller_offset[pioc];
+ clk_enable(gpio[pioc].clock); /* enable PIO controller's clock */
+
+ controller = (void __iomem *) AT91_VA_BASE_SYS + gpio[pioc].offset;
__raw_writel(~0, controller + PIO_IDR);
set_irq_data(id, (void *) pin);
@@ -408,5 +410,16 @@ void __init at91_gpio_irq_setup(unsigned banks)
set_irq_chained_handler(id, gpio_irq_handler);
}
- pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, banks);
+ pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks);
+}
+
+/*
+ * Called from the processor-specific init to enable GPIO pin support.
+ */
+void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks)
+{
+ BUG_ON(nr_banks > MAX_GPIO_BANKS);
+
+ gpio = data;
+ gpio_banks = nr_banks;
}
diff --git a/arch/arm/mach-at91rm9200/irq.c b/arch/arm/mach-at91rm9200/irq.c
index c3a5e777f9f..3e488117ca9 100644
--- a/arch/arm/mach-at91rm9200/irq.c
+++ b/arch/arm/mach-at91rm9200/irq.c
@@ -34,8 +34,6 @@
#include <asm/mach/irq.h>
#include <asm/mach/map.h>
-#include "generic.h"
-
static void at91_aic_mask_irq(unsigned int irq)
{
@@ -61,12 +59,12 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
srctype = AT91_AIC_SRCTYPE_RISING;
break;
case IRQT_LOW:
- if ((irq > AT91_ID_FIQ) && (irq < AT91_ID_IRQ0)) /* only supported on external interrupts */
+ if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0)) /* only supported on external interrupts */
return -EINVAL;
srctype = AT91_AIC_SRCTYPE_LOW;
break;
case IRQT_FALLING:
- if ((irq > AT91_ID_FIQ) && (irq < AT91_ID_IRQ0)) /* only supported on external interrupts */
+ if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0)) /* only supported on external interrupts */
return -EINVAL;
srctype = AT91_AIC_SRCTYPE_FALLING;
break;
diff --git a/arch/arm/mach-at91rm9200/pm.c b/arch/arm/mach-at91rm9200/pm.c
index 47e5480feb7..32c95d8eaac 100644
--- a/arch/arm/mach-at91rm9200/pm.c
+++ b/arch/arm/mach-at91rm9200/pm.c
@@ -123,13 +123,13 @@ static int at91_pm_enter(suspend_state_t state)
(at91_sys_read(AT91_PMC_PCSR)
| (1 << AT91_ID_FIQ)
| (1 << AT91_ID_SYS)
- | (1 << AT91_ID_IRQ0)
- | (1 << AT91_ID_IRQ1)
- | (1 << AT91_ID_IRQ2)
- | (1 << AT91_ID_IRQ3)
- | (1 << AT91_ID_IRQ4)
- | (1 << AT91_ID_IRQ5)
- | (1 << AT91_ID_IRQ6))
+ | (1 << AT91RM9200_ID_IRQ0)
+ | (1 << AT91RM9200_ID_IRQ1)
+ | (1 << AT91RM9200_ID_IRQ2)
+ | (1 << AT91RM9200_ID_IRQ3)
+ | (1 << AT91RM9200_ID_IRQ4)
+ | (1 << AT91RM9200_ID_IRQ5)
+ | (1 << AT91RM9200_ID_IRQ6))
& at91_sys_read(AT91_AIC_IMR),
state);
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-22 15:58:29 +0000