diff options
Diffstat (limited to 'arch/arm/mm')
| -rw-r--r-- | arch/arm/mm/ioremap.c | 4 | ||||
| -rw-r--r-- | arch/arm/mm/mm-armv.c | 4 | ||||
| -rw-r--r-- | arch/arm/mm/proc-xsc3.S | 3 |
3 files changed, 6 insertions, 5 deletions
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index 25e0ca3e598..c1f7180c7be 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c @@ -141,7 +141,7 @@ __ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size, return NULL; addr = (unsigned long)area->addr; if (remap_area_pages(addr, pfn, size, flags)) { - vfree((void *)addr); + vunmap((void *)addr); return NULL; } return (void __iomem *) (offset + (char *)addr); @@ -173,7 +173,7 @@ EXPORT_SYMBOL(__ioremap); void __iounmap(void __iomem *addr) { - vfree((void *) (PAGE_MASK & (unsigned long) addr)); + vunmap((void *)(PAGE_MASK & (unsigned long)addr)); } EXPORT_SYMBOL(__iounmap); diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c index f14b2d0f369..95273de4f77 100644 --- a/arch/arm/mm/mm-armv.c +++ b/arch/arm/mm/mm-armv.c @@ -376,7 +376,7 @@ void __init build_mem_type_table(void) ecc_mask = 0; } - if (cpu_arch <= CPU_ARCH_ARMv5TEJ) { + if (cpu_arch <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale()) { for (i = 0; i < ARRAY_SIZE(mem_types); i++) { if (mem_types[i].prot_l1) mem_types[i].prot_l1 |= PMD_BIT4; @@ -631,7 +631,7 @@ void setup_mm_for_reboot(char mode) pgd = init_mm.pgd; base_pmdval = PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT; - if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ) + if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale()) base_pmdval |= PMD_BIT4; for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++, pgd++) { diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S index 80873b36c3f..8d32e21fe15 100644 --- a/arch/arm/mm/proc-xsc3.S +++ b/arch/arm/mm/proc-xsc3.S @@ -427,12 +427,13 @@ __xsc3_setup: #endif mcr p15, 0, r0, c1, c0, 1 @ set auxiliary control reg mrc p15, 0, r0, c1, c0, 0 @ get control register - bic r0, r0, #0x0200 @ .... ..R. .... .... bic r0, r0, #0x0002 @ .... .... .... ..A. orr r0, r0, #0x0005 @ .... .... .... .C.M #if BTB_ENABLE + bic r0, r0, #0x0200 @ .... ..R. .... .... orr r0, r0, #0x3900 @ ..VI Z..S .... .... #else + bic r0, r0, #0x0a00 @ .... Z.R. .... .... orr r0, r0, #0x3100 @ ..VI ...S .... .... #endif #if L2_CACHE_ENABLE |