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-rw-r--r--arch/blackfin/mach-bf548/boards/cm_bf548.c8
-rw-r--r--arch/blackfin/mach-bf548/boards/ezkit.c14
-rw-r--r--arch/blackfin/mach-bf548/head.S259
-rw-r--r--arch/blackfin/mach-bf548/ints-priority.c2
4 files changed, 12 insertions, 271 deletions
diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c
index 4f4ae8787ed..58abbed0a22 100644
--- a/arch/blackfin/mach-bf548/boards/cm_bf548.c
+++ b/arch/blackfin/mach-bf548/boards/cm_bf548.c
@@ -319,12 +319,12 @@ static struct platform_device bfin_atapi_device = {
#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
static struct mtd_partition partition_info[] = {
{
- .name = "Linux Kernel",
+ .name = "linux kernel(nand)",
.offset = 0,
.size = 4 * SIZE_1M,
},
{
- .name = "File System",
+ .name = "file system(nand)",
.offset = 4 * SIZE_1M,
.size = (256 - 4) * SIZE_1M,
},
@@ -377,12 +377,12 @@ static struct platform_device bf54x_sdh_device = {
/* SPI flash chip (m25p16) */
static struct mtd_partition bfin_spi_flash_partitions[] = {
{
- .name = "bootloader",
+ .name = "bootloader(spi)",
.size = 0x00040000,
.offset = 0,
.mask_flags = MTD_CAP_ROM
}, {
- .name = "linux kernel",
+ .name = "linux kernel(spi)",
.size = 0x1c0000,
.offset = 0x40000
}
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index 166fa2201ee..0d6333ada1d 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -365,12 +365,12 @@ static struct platform_device bfin_atapi_device = {
#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
static struct mtd_partition partition_info[] = {
{
- .name = "Linux Kernel",
+ .name = "linux kernel(nand)",
.offset = 0,
.size = 4 * SIZE_1M,
},
{
- .name = "File System",
+ .name = "file system(nand)",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
@@ -419,15 +419,15 @@ static struct platform_device bf54x_sdh_device = {
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
static struct mtd_partition ezkit_partitions[] = {
{
- .name = "Bootloader",
+ .name = "bootloader(nor)",
.size = 0x40000,
.offset = 0,
}, {
- .name = "Kernel",
+ .name = "linux kernel(nor)",
.size = 0x1C0000,
.offset = MTDPART_OFS_APPEND,
}, {
- .name = "RootFS",
+ .name = "file system(nor)",
.size = MTDPART_SIZ_FULL,
.offset = MTDPART_OFS_APPEND,
}
@@ -461,12 +461,12 @@ static struct platform_device ezkit_flash_device = {
/* SPI flash chip (m25p16) */
static struct mtd_partition bfin_spi_flash_partitions[] = {
{
- .name = "bootloader",
+ .name = "bootloader(spi)",
.size = 0x00040000,
.offset = 0,
.mask_flags = MTD_CAP_ROM
}, {
- .name = "linux kernel",
+ .name = "linux kernel(spi)",
.size = MTDPART_SIZ_FULL,
.offset = MTDPART_OFS_APPEND,
}
diff --git a/arch/blackfin/mach-bf548/head.S b/arch/blackfin/mach-bf548/head.S
index 06b9178cfcf..e3000f70a26 100644
--- a/arch/blackfin/mach-bf548/head.S
+++ b/arch/blackfin/mach-bf548/head.S
@@ -30,263 +30,11 @@
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/blackfin.h>
-#include <asm/trace.h>
#ifdef CONFIG_BFIN_KERNEL_CLOCK
#include <asm/mach-common/clocks.h>
#include <asm/mach/mem_init.h>
#endif
-.extern ___bss_stop
-.extern ___bss_start
-.extern _bf53x_relocate_l1_mem
-
-#define INITIAL_STACK 0xFFB01000
-
-__INIT
-
-ENTRY(__start)
- /* R0: argument of command line string, passed from uboot, save it */
- R7 = R0;
- /* Enable Cycle Counter and Nesting Of Interrupts */
-#ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES
- R0 = SYSCFG_SNEN;
-#else
- R0 = SYSCFG_SNEN | SYSCFG_CCEN;
-#endif
- SYSCFG = R0;
- R0 = 0;
-
- /* Clear Out All the data and pointer Registers*/
- R1 = R0;
- R2 = R0;
- R3 = R0;
- R4 = R0;
- R5 = R0;
- R6 = R0;
-
- P0 = R0;
- P1 = R0;
- P2 = R0;
- P3 = R0;
- P4 = R0;
- P5 = R0;
-
- LC0 = r0;
- LC1 = r0;
- L0 = r0;
- L1 = r0;
- L2 = r0;
- L3 = r0;
-
- /* Clear Out All the DAG Registers*/
- B0 = r0;
- B1 = r0;
- B2 = r0;
- B3 = r0;
-
- I0 = r0;
- I1 = r0;
- I2 = r0;
- I3 = r0;
-
- M0 = r0;
- M1 = r0;
- M2 = r0;
- M3 = r0;
-
- trace_buffer_init(p0,r0);
- P0 = R1;
- R0 = R1;
-
- /* Turn off the icache */
- p0.l = LO(IMEM_CONTROL);
- p0.h = HI(IMEM_CONTROL);
- R1 = [p0];
- R0 = ~ENICPLB;
- R0 = R0 & R1;
- [p0] = R0;
- SSYNC;
-
- /* Turn off the dcache */
- p0.l = LO(DMEM_CONTROL);
- p0.h = HI(DMEM_CONTROL);
- R1 = [p0];
- R0 = ~ENDCPLB;
- R0 = R0 & R1;
- [p0] = R0;
- SSYNC;
-
- /* Initialize stack pointer */
- SP.L = LO(INITIAL_STACK);
- SP.H = HI(INITIAL_STACK);
- FP = SP;
- USP = SP;
-
-#ifdef CONFIG_EARLY_PRINTK
- SP += -12;
- call _init_early_exception_vectors;
- SP += 12;
-#endif
-
- /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
- call _bf53x_relocate_l1_mem;
-#ifdef CONFIG_BFIN_KERNEL_CLOCK
- call _start_dma_code;
-#endif
- /* Code for initializing Async memory banks */
-
- p2.h = hi(EBIU_AMBCTL1);
- p2.l = lo(EBIU_AMBCTL1);
- r0.h = hi(AMBCTL1VAL);
- r0.l = lo(AMBCTL1VAL);
- [p2] = r0;
- ssync;
-
- p2.h = hi(EBIU_AMBCTL0);
- p2.l = lo(EBIU_AMBCTL0);
- r0.h = hi(AMBCTL0VAL);
- r0.l = lo(AMBCTL0VAL);
- [p2] = r0;
- ssync;
-
- p2.h = hi(EBIU_AMGCTL);
- p2.l = lo(EBIU_AMGCTL);
- r0 = AMGCTLVAL;
- w[p2] = r0;
- ssync;
-
- p2.h = hi(EBIU_MBSCTL);
- p2.l = lo(EBIU_MBSCTL);
- r0.h = hi(CONFIG_EBIU_MBSCTLVAL);
- r0.l = lo(CONFIG_EBIU_MBSCTLVAL);
- [p2] = r0;
- ssync;
-
- p2.h = hi(EBIU_MODE);
- p2.l = lo(EBIU_MODE);
- r0.h = hi(CONFIG_EBIU_MODEVAL);
- r0.l = lo(CONFIG_EBIU_MODEVAL);
- [p2] = r0;
- ssync;
-
- p2.h = hi(EBIU_FCTL);
- p2.l = lo(EBIU_FCTL);
- r0.h = hi(CONFIG_EBIU_FCTLVAL);
- r0.l = lo(CONFIG_EBIU_FCTLVAL);
- [p2] = r0;
- ssync;
-
- /* This section keeps the processor in supervisor mode
- * during kernel boot. Switches to user mode at end of boot.
- * See page 3-9 of Hardware Reference manual for documentation.
- */
-
- /* EVT15 = _real_start */
-
- p0.l = lo(EVT15);
- p0.h = hi(EVT15);
- p1.l = _real_start;
- p1.h = _real_start;
- [p0] = p1;
- csync;
-
- p0.l = lo(IMASK);
- p0.h = hi(IMASK);
- p1.l = IMASK_IVG15;
- p1.h = 0x0;
- [p0] = p1;
- csync;
-
- raise 15;
- p0.l = .LWAIT_HERE;
- p0.h = .LWAIT_HERE;
- reti = p0;
-#if ANOMALY_05000281
- nop;
- nop;
- nop;
-#endif
- rti;
-
-.LWAIT_HERE:
- jump .LWAIT_HERE;
-ENDPROC(__start)
-
-ENTRY(_real_start)
- [ -- sp ] = reti;
- p0.l = lo(WDOG_CTL);
- p0.h = hi(WDOG_CTL);
- r0 = 0xAD6(z);
- w[p0] = r0; /* watchdog off for now */
- ssync;
-
- /* Code update for BSS size == 0
- * Zero out the bss region.
- */
-
- p1.l = ___bss_start;
- p1.h = ___bss_start;
- p2.l = ___bss_stop;
- p2.h = ___bss_stop;
- r0 = 0;
- p2 -= p1;
- lsetup (.L_clear_bss, .L_clear_bss ) lc0 = p2;
-.L_clear_bss:
- B[p1++] = r0;
-
- /* In case there is a NULL pointer reference
- * Zero out region before stext
- */
-
- p1.l = 0x0;
- p1.h = 0x0;
- r0.l = __stext;
- r0.h = __stext;
- r0 = r0 >> 1;
- p2 = r0;
- r0 = 0;
- lsetup (.L_clear_zero, .L_clear_zero ) lc0 = p2;
-.L_clear_zero:
- W[p1++] = r0;
-
- /* pass the uboot arguments to the global value command line */
- R0 = R7;
- call _cmdline_init;
-
- p1.l = __rambase;
- p1.h = __rambase;
- r0.l = __sdata;
- r0.h = __sdata;
- [p1] = r0;
-
- p1.l = __ramstart;
- p1.h = __ramstart;
- p3.l = ___bss_stop;
- p3.h = ___bss_stop;
-
- r1 = p3;
- [p1] = r1;
-
-
- /*
- * load the current thread pointer and stack
- */
- r1.l = _init_thread_union;
- r1.h = _init_thread_union;
-
- r2.l = 0x2000;
- r2.h = 0x0000;
- r1 = r1 + r2;
- sp = r1;
- usp = sp;
- fp = sp;
- call _start_kernel;
-.L_exit:
- jump.s .L_exit;
-ENDPROC(_real_start)
-
-__FINIT
-
.section .l1.text
#ifdef CONFIG_BFIN_KERNEL_CLOCK
ENTRY(_start_dma_code)
@@ -443,13 +191,6 @@ ENTRY(_start_dma_code)
SSYNC;
#endif
- p0.h = hi(SIC_IWR0);
- p0.l = lo(SIC_IWR0);
- r0.l = lo(IWR_ENABLE_ALL);
- r0.h = hi(IWR_ENABLE_ALL);
- [p0] = r0;
- SSYNC;
-
RTS;
ENDPROC(_start_dma_code)
#endif /* CONFIG_BFIN_KERNEL_CLOCK */
diff --git a/arch/blackfin/mach-bf548/ints-priority.c b/arch/blackfin/mach-bf548/ints-priority.c
index 2665653cee3..9dd0fa3ac4d 100644
--- a/arch/blackfin/mach-bf548/ints-priority.c
+++ b/arch/blackfin/mach-bf548/ints-priority.c
@@ -31,7 +31,7 @@
#include <linux/irq.h>
#include <asm/blackfin.h>
-void program_IAR(void)
+void __init program_IAR(void)
{
/* Program the IAR0 Register with the configured priority */
bfin_write_SIC_IAR0(((CONFIG_IRQ_PLL_WAKEUP - 7) << IRQ_PLL_WAKEUP_POS) |
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-06 21:14:47 +0000