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-rw-r--r--arch/mips/Kconfig17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 25f3b0a11ca..b29f0280d71 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -618,6 +618,8 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
select SYS_HAS_EARLY_PRINTK
select SYS_HAS_CPU_CAVIUM_OCTEON
select SWAP_IO_SPACE
+ select HW_HAS_PCI
+ select ARCH_SUPPORTS_MSI
help
This option supports all of the Octeon reference boards from Cavium
Networks. It builds a kernel that dynamically determines the Octeon
@@ -851,6 +853,11 @@ config SYS_SUPPORTS_BIG_ENDIAN
config SYS_SUPPORTS_LITTLE_ENDIAN
bool
+config SYS_SUPPORTS_HUGETLBFS
+ bool
+ depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
+ default y
+
config IRQ_CPU
bool
@@ -1055,6 +1062,7 @@ config CPU_MIPS64_R1
select CPU_SUPPORTS_32BIT_KERNEL
select CPU_SUPPORTS_64BIT_KERNEL
select CPU_SUPPORTS_HIGHMEM
+ select CPU_SUPPORTS_HUGEPAGES
help
Choose this option to build a kernel for release 1 or later of the
MIPS64 architecture. Many modern embedded systems with a 64-bit
@@ -1074,6 +1082,7 @@ config CPU_MIPS64_R2
select CPU_SUPPORTS_32BIT_KERNEL
select CPU_SUPPORTS_64BIT_KERNEL
select CPU_SUPPORTS_HIGHMEM
+ select CPU_SUPPORTS_HUGEPAGES
help
Choose this option to build a kernel for release 2 or later of the
MIPS64 architecture. Many modern embedded systems with a 64-bit
@@ -1160,6 +1169,7 @@ config CPU_R5500
select CPU_HAS_LLSC
select CPU_SUPPORTS_32BIT_KERNEL
select CPU_SUPPORTS_64BIT_KERNEL
+ select CPU_SUPPORTS_HUGEPAGES
help
NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
instruction set.
@@ -1245,6 +1255,7 @@ config CPU_CAVIUM_OCTEON
select WEAK_ORDERING
select WEAK_REORDERING_BEYOND_LLSC
select CPU_SUPPORTS_HIGHMEM
+ select CPU_SUPPORTS_HUGEPAGES
help
The Cavium Octeon processor is a highly integrated chip containing
many ethernet hardware widgets for networking tasks. The processor
@@ -1364,6 +1375,8 @@ config CPU_SUPPORTS_32BIT_KERNEL
bool
config CPU_SUPPORTS_64BIT_KERNEL
bool
+config CPU_SUPPORTS_HUGEPAGES
+ bool
#
# Set to y for ptrace access to watch registers.
@@ -2121,6 +2134,10 @@ endmenu
menu "Power management options"
+config ARCH_HIBERNATION_POSSIBLE
+ def_bool y
+ depends on !SMP
+
config ARCH_SUSPEND_POSSIBLE
def_bool y
depends on !SMP