diff options
Diffstat (limited to 'arch/mips/kernel')
| -rw-r--r-- | arch/mips/kernel/Makefile | 1 | ||||
| -rw-r--r-- | arch/mips/kernel/cevt-gt641xx.c | 12 | ||||
| -rw-r--r-- | arch/mips/kernel/cevt-r4k.c | 45 | ||||
| -rw-r--r-- | arch/mips/kernel/cevt-txx9.c | 171 | ||||
| -rw-r--r-- | arch/mips/kernel/irixsig.c | 8 | ||||
| -rw-r--r-- | arch/mips/kernel/ptrace.c | 18 | ||||
| -rw-r--r-- | arch/mips/kernel/ptrace32.c | 4 | ||||
| -rw-r--r-- | arch/mips/kernel/smtc.c | 57 | ||||
| -rw-r--r-- | arch/mips/kernel/syscall.c | 9 | ||||
| -rw-r--r-- | arch/mips/kernel/time.c | 17 | ||||
| -rw-r--r-- | arch/mips/kernel/vmlinux.lds.S | 32 | ||||
| -rw-r--r-- | arch/mips/kernel/vpe.c | 4 |
12 files changed, 307 insertions, 71 deletions
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index d7745c8976f..3196509a28d 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -10,6 +10,7 @@ obj-y += cpu-probe.o branch.o entry.o genex.o irq.o process.o \ obj-$(CONFIG_CEVT_R4K) += cevt-r4k.o obj-$(CONFIG_CEVT_GT641XX) += cevt-gt641xx.o +obj-$(CONFIG_CEVT_TXX9) += cevt-txx9.o binfmt_irix-objs := irixelf.o irixinv.o irixioctl.o irixsig.o \ irix5sys.o sysirix.o diff --git a/arch/mips/kernel/cevt-gt641xx.c b/arch/mips/kernel/cevt-gt641xx.c index 4c651b2680f..c36772631fe 100644 --- a/arch/mips/kernel/cevt-gt641xx.c +++ b/arch/mips/kernel/cevt-gt641xx.c @@ -49,10 +49,9 @@ int gt641xx_timer0_state(void) static int gt641xx_timer0_set_next_event(unsigned long delta, struct clock_event_device *evt) { - unsigned long flags; u32 ctrl; - spin_lock_irqsave(>641xx_timer_lock, flags); + spin_lock(>641xx_timer_lock); ctrl = GT_READ(GT_TC_CONTROL_OFS); ctrl &= ~(GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK); @@ -61,7 +60,7 @@ static int gt641xx_timer0_set_next_event(unsigned long delta, GT_WRITE(GT_TC0_OFS, delta); GT_WRITE(GT_TC_CONTROL_OFS, ctrl); - spin_unlock_irqrestore(>641xx_timer_lock, flags); + spin_unlock(>641xx_timer_lock); return 0; } @@ -69,10 +68,9 @@ static int gt641xx_timer0_set_next_event(unsigned long delta, static void gt641xx_timer0_set_mode(enum clock_event_mode mode, struct clock_event_device *evt) { - unsigned long flags; u32 ctrl; - spin_lock_irqsave(>641xx_timer_lock, flags); + spin_lock(>641xx_timer_lock); ctrl = GT_READ(GT_TC_CONTROL_OFS); ctrl &= ~(GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK); @@ -90,7 +88,7 @@ static void gt641xx_timer0_set_mode(enum clock_event_mode mode, GT_WRITE(GT_TC_CONTROL_OFS, ctrl); - spin_unlock_irqrestore(>641xx_timer_lock, flags); + spin_unlock(>641xx_timer_lock); } static void gt641xx_timer0_event_handler(struct clock_event_device *dev) @@ -133,9 +131,9 @@ static int __init gt641xx_timer0_clockevent_init(void) cd = >641xx_timer0_clockevent; cd->rating = 200 + gt641xx_base_clock / 10000000; + clockevent_set_clock(cd, gt641xx_base_clock); cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd); cd->min_delta_ns = clockevent_delta2ns(0x300, cd); - clockevent_set_clock(cd, gt641xx_base_clock); clockevents_register_device(>641xx_timer0_clockevent); diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c index ae2984fff58..bab935a3d74 100644 --- a/arch/mips/kernel/cevt-r4k.c +++ b/arch/mips/kernel/cevt-r4k.c @@ -28,7 +28,7 @@ static int mips_next_event(unsigned long delta, cnt = read_c0_count(); cnt += delta; write_c0_compare(cnt); - res = ((long)(read_c0_count() - cnt ) > 0) ? -ETIME : 0; + res = ((int)(read_c0_count() - cnt) > 0) ? -ETIME : 0; #ifdef CONFIG_MIPS_MT_SMTC evpe(vpflags); local_irq_restore(flags); @@ -179,7 +179,7 @@ static int c0_compare_int_pending(void) static int c0_compare_int_usable(void) { - const unsigned int delta = 0x300000; + unsigned int delta; unsigned int cnt; /* @@ -192,11 +192,17 @@ static int c0_compare_int_usable(void) return 0; } - cnt = read_c0_count(); - cnt += delta; - write_c0_compare(cnt); + for (delta = 0x10; delta <= 0x400000; delta <<= 1) { + cnt = read_c0_count(); + cnt += delta; + write_c0_compare(cnt); + irq_disable_hazard(); + if ((int)(read_c0_count() - cnt) < 0) + break; + /* increase delta if the timer was already expired */ + } - while ((long)(read_c0_count() - cnt) <= 0) + while ((int)(read_c0_count() - cnt) <= 0) ; /* Wait for expiry */ if (!c0_compare_int_pending()) @@ -218,9 +224,9 @@ void __cpuinit mips_clockevent_init(void) uint64_t mips_freq = mips_hpt_frequency; unsigned int cpu = smp_processor_id(); struct clock_event_device *cd; - unsigned int irq = MIPS_CPU_IRQ_BASE + 7; + unsigned int irq; - if (!cpu_has_counter) + if (!cpu_has_counter || !mips_hpt_frequency) return; #ifdef CONFIG_MIPS_MT_SMTC @@ -237,6 +243,15 @@ void __cpuinit mips_clockevent_init(void) if (!c0_compare_int_usable()) return; + /* + * With vectored interrupts things are getting platform specific. + * get_c0_compare_int is a hook to allow a platform to return the + * interrupt number of it's liking. + */ + irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq; + if (get_c0_compare_int) + irq = get_c0_compare_int(); + cd = &per_cpu(mips_clockevent_device, cpu); cd->name = "MIPS"; @@ -261,13 +276,15 @@ void __cpuinit mips_clockevent_init(void) clockevents_register_device(cd); - if (!cp0_timer_irq_installed) { + if (!cp0_timer_irq_installed) + return; + + cp0_timer_irq_installed = 1; + #ifdef CONFIG_MIPS_MT_SMTC #define CPUCTR_IMASKBIT (0x100 << cp0_compare_irq) - setup_irq_smtc(irq, &c0_compare_irqaction, CPUCTR_IMASKBIT); + setup_irq_smtc(irq, &c0_compare_irqaction, CPUCTR_IMASKBIT); #else - setup_irq(irq, &c0_compare_irqaction); -#endif /* CONFIG_MIPS_MT_SMTC */ - cp0_timer_irq_installed = 1; - } + setup_irq(irq, &c0_compare_irqaction); +#endif } diff --git a/arch/mips/kernel/cevt-txx9.c b/arch/mips/kernel/cevt-txx9.c new file mode 100644 index 00000000000..795cb8fb0d7 --- /dev/null +++ b/arch/mips/kernel/cevt-txx9.c @@ -0,0 +1,171 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Based on linux/arch/mips/kernel/cevt-r4k.c, + * linux/arch/mips/jmr3927/rbhma3100/setup.c + * + * Copyright 2001 MontaVista Software Inc. + * Copyright (C) 2000-2001 Toshiba Corporation + * Copyright (C) 2007 MIPS Technologies, Inc. + * Copyright (C) 2007 Ralf Baechle <ralf@linux-mips.org> + */ +#include <linux/init.h> +#include <linux/interrupt.h> +#include <asm/time.h> +#include <asm/txx9tmr.h> + +#define TCR_BASE (TXx9_TMTCR_CCDE | TXx9_TMTCR_CRE | TXx9_TMTCR_TMODE_ITVL) +#define TIMER_CCD 0 /* 1/2 */ +#define TIMER_CLK(imclk) ((imclk) / (2 << TIMER_CCD)) + +static struct txx9_tmr_reg __iomem *txx9_cs_tmrptr; + +static cycle_t txx9_cs_read(void) +{ + return __raw_readl(&txx9_cs_tmrptr->trr); +} + +/* Use 1 bit smaller width to use full bits in that width */ +#define TXX9_CLOCKSOURCE_BITS (TXX9_TIMER_BITS - 1) + +static struct clocksource txx9_clocksource = { + .name = "TXx9", + .rating = 200, + .read = txx9_cs_read, + .mask = CLOCKSOURCE_MASK(TXX9_CLOCKSOURCE_BITS), + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + +void __init txx9_clocksource_init(unsigned long baseaddr, + unsigned int imbusclk) +{ + struct txx9_tmr_reg __iomem *tmrptr; + + clocksource_set_clock(&txx9_clocksource, TIMER_CLK(imbusclk)); + clocksource_register(&txx9_clocksource); + + tmrptr = ioremap(baseaddr, sizeof(struct txx9_tmr_reg)); + __raw_writel(TCR_BASE, &tmrptr->tcr); + __raw_writel(0, &tmrptr->tisr); + __raw_writel(TIMER_CCD, &tmrptr->ccdr); + __raw_writel(TXx9_TMITMR_TZCE, &tmrptr->itmr); + __raw_writel(1 << TXX9_CLOCKSOURCE_BITS, &tmrptr->cpra); + __raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr); + txx9_cs_tmrptr = tmrptr; +} + +static struct txx9_tmr_reg __iomem *txx9_tmrptr; + +static void txx9tmr_stop_and_clear(struct txx9_tmr_reg __iomem *tmrptr) +{ + /* stop and reset counter */ + __raw_writel(TCR_BASE, &tmrptr->tcr); + /* clear pending interrupt */ + __raw_writel(0, &tmrptr->tisr); +} + +static void txx9tmr_set_mode(enum clock_event_mode mode, + struct clock_event_device *evt) +{ + struct txx9_tmr_reg __iomem *tmrptr = txx9_tmrptr; + + txx9tmr_stop_and_clear(tmrptr); + switch (mode) { + case CLOCK_EVT_MODE_PERIODIC: + __raw_writel(TXx9_TMITMR_TIIE | TXx9_TMITMR_TZCE, + &tmrptr->itmr); + /* start timer */ + __raw_writel(((u64)(NSEC_PER_SEC / HZ) * evt->mult) >> + evt->shift, + &tmrptr->cpra); + __raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr); + break; + case CLOCK_EVT_MODE_SHUTDOWN: + case CLOCK_EVT_MODE_UNUSED: + __raw_writel(0, &tmrptr->itmr); + break; + case CLOCK_EVT_MODE_ONESHOT: + __raw_writel(TXx9_TMITMR_TIIE, &tmrptr->itmr); + break; + case CLOCK_EVT_MODE_RESUME: + __raw_writel(TIMER_CCD, &tmrptr->ccdr); + __raw_writel(0, &tmrptr->itmr); + break; + } +} + +static int txx9tmr_set_next_event(unsigned long delta, + struct clock_event_device *evt) +{ + struct txx9_tmr_reg __iomem *tmrptr = txx9_tmrptr; + + txx9tmr_stop_and_clear(tmrptr); + /* start timer */ + __raw_writel(delta, &tmrptr->cpra); + __raw_writel(TCR_BASE | TXx9_TMTCR_TCE, &tmrptr->tcr); + return 0; +} + +static struct clock_event_device txx9tmr_clock_event_device = { + .name = "TXx9", + .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, + .rating = 200, + .cpumask = CPU_MASK_CPU0, + .set_mode = txx9tmr_set_mode, + .set_next_event = txx9tmr_set_next_event, +}; + +static irqreturn_t txx9tmr_interrupt(int irq, void *dev_id) +{ + struct clock_event_device *cd = &txx9tmr_clock_event_device; + struct txx9_tmr_reg __iomem *tmrptr = txx9_tmrptr; + + __raw_writel(0, &tmrptr->tisr); /* ack interrupt */ + cd->event_handler(cd); + return IRQ_HANDLED; +} + +static struct irqaction txx9tmr_irq = { + .handler = txx9tmr_interrupt, + .flags = IRQF_DISABLED | IRQF_PERCPU, + .name = "txx9tmr", +}; + +void __init txx9_clockevent_init(unsigned long baseaddr, int irq, + unsigned int imbusclk) +{ + struct clock_event_device *cd = &txx9tmr_clock_event_device; + struct txx9_tmr_reg __iomem *tmrptr; + + tmrptr = ioremap(baseaddr, sizeof(struct txx9_tmr_reg)); + txx9tmr_stop_and_clear(tmrptr); + __raw_writel(TIMER_CCD, &tmrptr->ccdr); + __raw_writel(0, &tmrptr->itmr); + txx9_tmrptr = tmrptr; + + clockevent_set_clock(cd, TIMER_CLK(imbusclk)); + cd->max_delta_ns = + clockevent_delta2ns(0xffffffff >> (32 - TXX9_TIMER_BITS), cd); + cd->min_delta_ns = clockevent_delta2ns(0xf, cd); + cd->irq = irq; + clockevents_register_device(cd); + setup_irq(irq, &txx9tmr_irq); + printk(KERN_INFO "TXx9: clockevent device at 0x%lx, irq %d\n", + baseaddr, irq); +} + +void __init txx9_tmr_init(unsigned long baseaddr) +{ + struct txx9_tmr_reg __iomem *tmrptr; + + tmrptr = ioremap(baseaddr, sizeof(struct txx9_tmr_reg)); + __raw_writel(TXx9_TMTCR_CRE, &tmrptr->tcr); + __raw_writel(0, &tmrptr->tisr); + __raw_writel(0xffffffff, &tmrptr->cpra); + __raw_writel(0, &tmrptr->itmr); + __raw_writel(0, &tmrptr->ccdr); + __raw_writel(0, &tmrptr->pgmr); + iounmap(tmrptr); +} diff --git a/arch/mips/kernel/irixsig.c b/arch/mips/kernel/irixsig.c index a0a91056fda..33506ff2591 100644 --- a/arch/mips/kernel/irixsig.c +++ b/arch/mips/kernel/irixsig.c @@ -24,8 +24,12 @@ #define _BLOCKABLE (~(_S(SIGKILL) | _S(SIGSTOP))) +#define _IRIX_NSIG 128 +#define _IRIX_NSIG_BPW BITS_PER_LONG +#define _IRIX_NSIG_WORDS (_IRIX_NSIG / _IRIX_NSIG_BPW) + typedef struct { - unsigned long sig[4]; + unsigned long sig[_IRIX_NSIG_WORDS]; } irix_sigset_t; struct sigctx_irix5 { @@ -527,7 +531,7 @@ asmlinkage int irix_sigpoll_sys(unsigned long __user *set, expire = schedule_timeout_interruptible(expire); - for (i=0; i<=4; i++) + for (i=0; i < _IRIX_NSIG_WORDS; i++) tmp |= (current->pending.signal.sig[i] & kset.sig[i]); if (tmp) diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c index 999f7853de2..35234b92b9a 100644 --- a/arch/mips/kernel/ptrace.c +++ b/arch/mips/kernel/ptrace.c @@ -65,13 +65,13 @@ int ptrace_getregs(struct task_struct *child, __s64 __user *data) regs = task_pt_regs(child); for (i = 0; i < 32; i++) - __put_user(regs->regs[i], data + i); - __put_user(regs->lo, data + EF_LO - EF_R0); - __put_user(regs->hi, data + EF_HI - EF_R0); - __put_user(regs->cp0_epc, data + EF_CP0_EPC - EF_R0); - __put_user(regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0); - __put_user(regs->cp0_status, data + EF_CP0_STATUS - EF_R0); - __put_user(regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0); + __put_user((long)regs->regs[i], data + i); + __put_user((long)regs->lo, data + EF_LO - EF_R0); + __put_user((long)regs->hi, data + EF_HI - EF_R0); + __put_user((long)regs->cp0_epc, data + EF_CP0_EPC - EF_R0); + __put_user((long)regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0); + __put_user((long)regs->cp0_status, data + EF_CP0_STATUS - EF_R0); + __put_user((long)regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0); return 0; } @@ -390,11 +390,11 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) } case PTRACE_GETREGS: - ret = ptrace_getregs(child, (__u64 __user *) data); + ret = ptrace_getregs(child, (__s64 __user *) data); break; case PTRACE_SETREGS: - ret = ptrace_setregs(child, (__u64 __user *) data); + ret = ptrace_setregs(child, (__s64 __user *) data); break; case PTRACE_GETFPREGS: diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c index f2bffed94fa..76818be6ba7 100644 --- a/arch/mips/kernel/ptrace32.c +++ b/arch/mips/kernel/ptrace32.c @@ -346,11 +346,11 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data) } case PTRACE_GETREGS: - ret = ptrace_getregs(child, (__u64 __user *) (__u64) data); + ret = ptrace_getregs(child, (__s64 __user *) (__u64) data); break; case PTRACE_SETREGS: - ret = ptrace_setregs(child, (__u64 __user *) (__u64) data); + ret = ptrace_setregs(child, (__s64 __user *) (__u64) data); break; case PTRACE_GETFPREGS: diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index a8c1a698d58..9c92d42996c 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c @@ -88,11 +88,19 @@ unsigned int smtc_status = 0; /* Boot command line configuration overrides */ +static int vpe0limit; static int ipibuffers = 0; static int nostlb = 0; static int asidmask = 0; unsigned long smtc_asid_mask = 0xff; +static int __init vpe0tcs(char *str) +{ + get_option(&str, &vpe0limit); + + return 1; +} + static int __init ipibufs(char *str) { get_option(&str, &ipibuffers); @@ -125,6 +133,7 @@ static int __init asidmask_set(char *str) return 1; } +__setup("vpe0tcs=", vpe0tcs); __setup("ipibufs=", ipibufs); __setup("nostlb", stlb_disable); __setup("asidmask=", asidmask_set); @@ -340,7 +349,7 @@ static void smtc_tc_setup(int vpe, int tc, int cpu) void mipsmt_prepare_cpus(void) { - int i, vpe, tc, ntc, nvpe, tcpervpe, slop, cpu; + int i, vpe, tc, ntc, nvpe, tcpervpe[NR_CPUS], slop, cpu; unsigned long flags; unsigned long val; int nipi; @@ -401,8 +410,39 @@ void mipsmt_prepare_cpus(void) ntc = NR_CPUS; if (tclimit > 0 && ntc > tclimit) ntc = tclimit; - tcpervpe = ntc / nvpe; - slop = ntc % nvpe; /* Residual TCs, < NVPE */ + slop = ntc % nvpe; + for (i = 0; i < nvpe; i++) { + tcpervpe[i] = ntc / nvpe; + if (slop) { + if((slop - i) > 0) tcpervpe[i]++; + } + } + /* Handle command line override for VPE0 */ + if (vpe0limit > ntc) vpe0limit = ntc; + if (vpe0limit > 0) { + int slopslop; + if (vpe0limit < tcpervpe[0]) { + /* Reducing TC count - distribute to others */ + slop = tcpervpe[0] - vpe0limit; + slopslop = slop % (nvpe - 1); + tcpervpe[0] = vpe0limit; + for (i = 1; i < nvpe; i++) { + tcpervpe[i] += slop / (nvpe - 1); + if(slopslop && ((slopslop - (i - 1) > 0))) + tcpervpe[i]++; + } + } else if (vpe0limit > tcpervpe[0]) { + /* Increasing TC count - steal from others */ + slop = vpe0limit - tcpervpe[0]; + slopslop = slop % (nvpe - 1); + tcpervpe[0] = vpe0limit; + for (i = 1; i < nvpe; i++) { + tcpervpe[i] -= slop / (nvpe - 1); + if(slopslop && ((slopslop - (i - 1) > 0))) + tcpervpe[i]--; + } + } + } /* Set up shared TLB */ smtc_configure_tlb(); @@ -416,7 +456,7 @@ void mipsmt_prepare_cpus(void) if (vpe != 0) printk(", "); printk("VPE %d: TC", vpe); - for (i = 0; i < tcpervpe; i++) { + for (i = 0; i < tcpervpe[vpe]; i++) { /* * TC 0 is bound to VPE 0 at reset, * and is presumably executing this @@ -429,15 +469,6 @@ void mipsmt_prepare_cpus(void) printk(" %d", tc); tc++; } - if (slop) { - if (tc != 0) { - smtc_tc_setup(vpe, tc, cpu); - cpu++; - } - printk(" %d", tc); - tc++; - slop--; - } if (vpe != 0) { /* * Clear any stale software interrupts from VPE's Cause diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c index b95fe93dd64..af1bdc89748 100644 --- a/arch/mips/kernel/syscall.c +++ b/arch/mips/kernel/syscall.c @@ -73,7 +73,14 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, task_size = STACK_TOP; + if (len > task_size) + return -ENOMEM; + if (flags & MAP_FIXED) { + /* Even MAP_FIXED mappings must reside within task_size. */ + if (task_size - len < addr) + return -EINVAL; + /* * We do not accept a shared mapping if it would violate * cache aliasing constraints. @@ -83,8 +90,6 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr, return addr; } - if (len > task_size) - return -ENOMEM; do_color_align = 0; if (filp || (flags & MAP_SHARED)) do_color_align = 1; diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index 6c6849a8f13..27228f583da 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c @@ -11,6 +11,7 @@ * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ +#include <linux/bug.h> #include <linux/clockchips.h> #include <linux/types.h> #include <linux/kernel.h> @@ -115,10 +116,6 @@ EXPORT_SYMBOL(perf_irq); * (only needed if you intended to use cpu counter as timer interrupt * source) * 2) calculate a couple of cached variables for later usage - * 3) plat_timer_setup() - - * a) (optional) over-write any choices made above by time_init(). - * b) machine specific code should setup the timer irqaction. - * c) enable the timer interrupt */ unsigned int mips_hpt_frequency; @@ -221,8 +218,18 @@ void __init __weak plat_time_init(void) { } -void __init __weak plat_timer_setup(struct irqaction *irq) +/* + * This function exists in order to cause an error due to a duplicate + * definition if platform code should have its own implementation. The hook + * to use instead is plat_time_init. plat_time_init does not receive the + * irqaction pointer argument anymore. This is because any function which + * initializes an interrupt timer now takes care of its own request_irq rsp. + * setup_irq calls and each clock_event_device should use its own + * struct irqrequest. + */ +void __init plat_timer_setup(struct irqaction *irq) { + BUG(); } void __init time_init(void) diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S index 2781cff1485..5fc2398bdb7 100644 --- a/arch/mips/kernel/vmlinux.lds.S +++ b/arch/mips/kernel/vmlinux.lds.S @@ -63,21 +63,23 @@ SECTIONS /* writeable */ .data : { /* Data */ - . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */ - /* - * This ALIGN is needed as a workaround for a bug a gcc bug upto 4.1 which - * limits the maximum alignment to at most 32kB and results in the following - * warning: - * - * CC arch/mips/kernel/init_task.o - * arch/mips/kernel/init_task.c:30: warning: alignment of ‘init_thread_union’ - * is greater than maximum object file alignment. Using 32768 - */ - . = ALIGN(_PAGE_SIZE); - *(.data.init_task) - - DATA_DATA - CONSTRUCTORS + . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */ + /* + * This ALIGN is needed as a workaround for a bug a + * gcc bug upto 4.1 which limits the maximum alignment + * to at most 32kB and results in the following + * warning: + * + * CC arch/mips/kernel/init_task.o + * arch/mips/kernel/init_task.c:30: warning: alignment + * of ‘init_thread_union’ is greater than maximum + * object file alignment. Using 32768 + */ + . = ALIGN(_PAGE_SIZE); + *(.data.init_task) + + DATA_DATA + CONSTRUCTORS } _gp = . + 0x8000; .lit8 : { diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c index df8cbe4c7c0..436a64ff398 100644 --- a/arch/mips/kernel/vpe.c +++ b/arch/mips/kernel/vpe.c @@ -942,8 +942,8 @@ static int vpe_elfload(struct vpe * v) if (phdr->p_type != PT_LOAD) continue; - memcpy((void *)phdr->p_vaddr, (char *)hdr + phdr->p_offset, phdr->p_filesz); - memset((void *)phdr->p_vaddr + phdr->p_filesz, 0, phdr->p_memsz - phdr->p_filesz); + memcpy((void *)phdr->p_paddr, (char *)hdr + phdr->p_offset, phdr->p_filesz); + memset((void *)phdr->p_paddr + phdr->p_filesz, 0, phdr->p_memsz - phdr->p_filesz); phdr++; } |