aboutsummaryrefslogtreecommitdiff
path: root/arch/powerpc/boot
diff options
context:
space:
mode:
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/dts/kuroboxHD.dts148
-rw-r--r--arch/powerpc/boot/dts/lite5200.dts135
-rw-r--r--arch/powerpc/boot/dts/lite5200b.dts135
-rw-r--r--arch/powerpc/boot/dts/mpc8313erdb.dts219
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitxgp.dts187
-rw-r--r--arch/powerpc/boot/dts/mpc834x_mds.dts (renamed from arch/powerpc/boot/dts/mpc8349emds.dts)6
-rw-r--r--arch/powerpc/boot/dts/mpc8568mds.dts380
7 files changed, 1098 insertions, 112 deletions
diff --git a/arch/powerpc/boot/dts/kuroboxHD.dts b/arch/powerpc/boot/dts/kuroboxHD.dts
new file mode 100644
index 00000000000..096e94ac415
--- /dev/null
+++ b/arch/powerpc/boot/dts/kuroboxHD.dts
@@ -0,0 +1,148 @@
+/*
+ * Device Tree Souce for Buffalo KuroboxHD
+ *
+ * Choose CONFIG_LINKSTATION to build a kernel for KuroboxHD, or use
+ * the default configuration linkstation_defconfig.
+ *
+ * Based on sandpoint.dts
+ *
+ * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
+ *
+ * This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+
+XXXX add flash parts, rtc, ??
+
+build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
+
+
+ */
+
+/ {
+ linux,phandle = <1000>;
+ model = "KuroboxHD";
+ compatible = "linkstation";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ linux,phandle = <2000>;
+ #cpus = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,603e { /* Really 8241 */
+ linux,phandle = <2100>;
+ linux,boot-cpu;
+ device_type = "cpu";
+ reg = <0>;
+ clock-frequency = <bebc200>; /* Fixed by bootwrapper */
+ timebase-frequency = <1743000>; /* Fixed by bootwrapper */
+ bus-frequency = <0>; /* From bootloader */
+ /* Following required by dtc but not used */
+ i-cache-line-size = <0>;
+ d-cache-line-size = <0>;
+ i-cache-size = <4000>;
+ d-cache-size = <4000>;
+ };
+ };
+
+ memory {
+ linux,phandle = <3000>;
+ device_type = "memory";
+ reg = <00000000 04000000>;
+ };
+
+ soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
+ linux,phandle = <4000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <2>;
+ device_type = "soc";
+ compatible = "mpc10x";
+ store-gathering = <0>; /* 0 == off, !0 == on */
+ reg = <80000000 00100000>;
+ ranges = <80000000 80000000 70000000 /* pci mem space */
+ fc000000 fc000000 00100000 /* EUMB */
+ fe000000 fe000000 00c00000 /* pci i/o space */
+ fec00000 fec00000 00300000 /* pci cfg regs */
+ fef00000 fef00000 00100000>; /* pci iack */
+
+ i2c@80003000 {
+ linux,phandle = <4300>;
+ device_type = "i2c";
+ compatible = "fsl-i2c";
+ reg = <80003000 1000>;
+ interrupts = <5 2>;
+ interrupt-parent = <4400>;
+ };
+
+ serial@80004500 {
+ linux,phandle = <4511>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <80004500 8>;
+ clock-frequency = <5d08d88>;
+ current-speed = <2580>;
+ interrupts = <9 2>;
+ interrupt-parent = <4400>;
+ };
+
+ serial@80004600 {
+ linux,phandle = <4512>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <80004600 8>;
+ clock-frequency = <5d08d88>;
+ current-speed = <e100>;
+ interrupts = <a 0>;
+ interrupt-parent = <4400>;
+ };
+
+ pic@80040000 {
+ linux,phandle = <4400>;
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ device_type = "open-pic";
+ compatible = "chrp,open-pic";
+ interrupt-controller;
+ reg = <80040000 40000>;
+ built-in;
+ };
+
+ pci@fec00000 {
+ linux,phandle = <4500>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ device_type = "pci";
+ compatible = "mpc10x-pci";
+ reg = <fec00000 400000>;
+ ranges = <01000000 0 0 fe000000 0 00c00000
+ 02000000 0 80000000 80000000 0 70000000>;
+ bus-range = <0 ff>;
+ clock-frequency = <7f28155>;
+ interrupt-parent = <4400>;
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x11 - IRQ0 ETH */
+ 5800 0 0 1 4400 0 1
+ 5800 0 0 2 4400 1 1
+ 5800 0 0 3 4400 2 1
+ 5800 0 0 4 4400 3 1
+ /* IDSEL 0x12 - IRQ1 IDE0 */
+ 6000 0 0 1 4400 1 1
+ 6000 0 0 2 4400 2 1
+ 6000 0 0 3 4400 3 1
+ 6000 0 0 4 4400 0 1
+ /* IDSEL 0x14 - IRQ3 USB2.0 */
+ 7000 0 0 1 4400 3 1
+ 7000 0 0 2 4400 3 1
+ 7000 0 0 3 4400 3 1
+ 7000 0 0 4 4400 3 1
+ >;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts
index 186870704ad..c03103c6328 100644
--- a/arch/powerpc/boot/dts/lite5200.dts
+++ b/arch/powerpc/boot/dts/lite5200.dts
@@ -1,7 +1,7 @@
/*
* Lite5200 board Device Tree Source
*
- * Copyright 2006 Secret Lab Technologies Ltd.
+ * Copyright 2006-2007 Secret Lab Technologies Ltd.
* Grant Likely <grant.likely@secretlab.ca>
*
* This program is free software; you can redistribute it and/or modify it
@@ -17,8 +17,9 @@
*/
/ {
- model = "Lite5200";
- compatible = "lite5200\0lite52xx\0mpc5200\0mpc52xx";
+ model = "fsl,lite5200";
+ // revision = "1.0";
+ compatible = "fsl,lite5200\0generic-mpc5200";
#address-cells = <1>;
#size-cells = <1>;
@@ -47,14 +48,17 @@
};
soc5200@f0000000 {
+ model = "fsl,mpc5200";
+ revision = "" // from bootloader
#interrupt-cells = <3>;
device_type = "soc";
ranges = <0 f0000000 f0010000>;
reg = <f0000000 00010000>;
bus-frequency = <0>; // from bootloader
+ system-frequency = <0>; // from bootloader
cdm@200 {
- compatible = "mpc5200-cdm\0mpc52xx-cdm";
+ compatible = "mpc5200-cdm";
reg = <200 38>;
};
@@ -64,77 +68,86 @@
interrupt-controller;
#interrupt-cells = <3>;
device_type = "interrupt-controller";
- compatible = "mpc5200-pic\0mpc52xx-pic";
+ compatible = "mpc5200-pic";
reg = <500 80>;
built-in;
};
gpt@600 { // General Purpose Timer
- compatible = "mpc5200-gpt\0mpc52xx-gpt";
+ compatible = "mpc5200-gpt";
device_type = "gpt";
+ cell-index = <0>;
reg = <600 10>;
interrupts = <1 9 0>;
interrupt-parent = <500>;
+ has-wdt;
};
gpt@610 { // General Purpose Timer
- compatible = "mpc5200-gpt\0mpc52xx-gpt";
+ compatible = "mpc5200-gpt";
device_type = "gpt";
+ cell-index = <1>;
reg = <610 10>;
interrupts = <1 a 0>;
interrupt-parent = <500>;
};
gpt@620 { // General Purpose Timer
- compatible = "mpc5200-gpt\0mpc52xx-gpt";
+ compatible = "mpc5200-gpt";
device_type = "gpt";
+ cell-index = <2>;
reg = <620 10>;
interrupts = <1 b 0>;
interrupt-parent = <500>;
};
gpt@630 { // General Purpose Timer
- compatible = "mpc5200-gpt\0mpc52xx-gpt";
+ compatible = "mpc5200-gpt";
device_type = "gpt";
+ cell-index = <3>;
reg = <630 10>;
interrupts = <1 c 0>;
interrupt-parent = <500>;
};
gpt@640 { // General Purpose Timer
- compatible = "mpc5200-gpt\0mpc52xx-gpt";
+ compatible = "mpc5200-gpt";
device_type = "gpt";
+ cell-index = <4>;
reg = <640 10>;
interrupts = <1 d 0>;
interrupt-parent = <500>;
};
gpt@650 { // General Purpose Timer
- compatible = "mpc5200-gpt\0mpc52xx-gpt";
+ compatible = "mpc5200-gpt";
device_type = "gpt";
+ cell-index = <5>;
reg = <650 10>;
interrupts = <1 e 0>;
interrupt-parent = <500>;
};
gpt@660 { // General Purpose Timer
- compatible = "mpc5200-gpt\0mpc52xx-gpt";
+ compatible = "mpc5200-gpt";
device_type = "gpt";
+ cell-index = <6>;
reg = <660 10>;
interrupts = <1 f 0>;
interrupt-parent = <500>;
};
gpt@670 { // General Purpose Timer
- compatible = "mpc5200-gpt\0mpc52xx-gpt";
+ compatible = "mpc5200-gpt";
device_type = "gpt";
+ cell-index = <7>;
reg = <670 10>;
interrupts = <1 10 0>;
interrupt-parent = <500>;
};
rtc@800 { // Real time clock
- compatible = "mpc5200-rtc\0mpc52xx-rtc";
+ compatible = "mpc5200-rtc";
device_type = "rtc";
reg = <800 100>;
interrupts = <1 5 0 1 6 0>;
@@ -143,7 +156,8 @@
mscan@900 {
device_type = "mscan";
- compatible = "mpc5200-mscan\0mpc52xx-mscan";
+ compatible = "mpc5200-mscan";
+ cell-index = <0>;
interrupts = <2 11 0>;
interrupt-parent = <500>;
reg = <900 80>;
@@ -151,21 +165,22 @@
mscan@980 {
device_type = "mscan";
- compatible = "mpc5200-mscan\0mpc52xx-mscan";
+ compatible = "mpc5200-mscan";
+ cell-index = <1>;
interrupts = <1 12 0>;
interrupt-parent = <500>;
reg = <980 80>;
};
gpio@b00 {
- compatible = "mpc5200-gpio\0mpc52xx-gpio";
+ compatible = "mpc5200-gpio";
reg = <b00 40>;
interrupts = <1 7 0>;
interrupt-parent = <500>;
};
gpio-wkup@b00 {
- compatible = "mpc5200-gpio-wkup\0mpc52xx-gpio-wkup";
+ compatible = "mpc5200-gpio-wkup";
reg = <c00 40>;
interrupts = <1 8 0 0 3 0>;
interrupt-parent = <500>;
@@ -176,7 +191,7 @@
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
- compatible = "mpc5200-pci\0mpc52xx-pci";
+ compatible = "mpc5200-pci";
reg = <d00 100>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <c000 0 0 1 500 0 0 3
@@ -194,7 +209,7 @@
spi@f00 {
device_type = "spi";
- compatible = "mpc5200-spi\0mpc52xx-spi";
+ compatible = "mpc5200-spi";
reg = <f00 20>;
interrupts = <2 d 0 2 e 0>;
interrupt-parent = <500>;
@@ -202,7 +217,7 @@
usb@1000 {
device_type = "usb-ohci-be";
- compatible = "mpc5200-ohci\0mpc52xx-ohci\0ohci-be";
+ compatible = "mpc5200-ohci\0ohci-be";
reg = <1000 ff>;
interrupts = <2 6 0>;
interrupt-parent = <500>;
@@ -210,7 +225,7 @@
bestcomm@1200 {
device_type = "dma-controller";
- compatible = "mpc5200-bestcomm\0mpc52xx-bestcomm";
+ compatible = "mpc5200-bestcomm";
reg = <1200 80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
@@ -220,67 +235,73 @@
};
xlb@1f00 {
- compatible = "mpc5200-xlb\0mpc52xx-xlb";
+ compatible = "mpc5200-xlb";
reg = <1f00 100>;
};
serial@2000 { // PSC1
device_type = "serial";
- compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart";
+ compatible = "mpc5200-psc-uart";
port-number = <0>; // Logical port assignment
+ cell-index = <0>;
reg = <2000 100>;
interrupts = <2 1 0>;
interrupt-parent = <500>;
};
- // PSC2 in spi mode example
- spi@2200 { // PSC2
- device_type = "spi";
- compatible = "mpc5200-psc-spi\0mpc52xx-psc-spi";
- reg = <2200 100>;
- interrupts = <2 2 0>;
- interrupt-parent = <500>;
- };
+ // PSC2 in ac97 mode example
+ //ac97@2200 { // PSC2
+ // device_type = "sound";
+ // compatible = "mpc5200-psc-ac97";
+ // cell-index = <1>;
+ // reg = <2200 100>;
+ // interrupts = <2 2 0>;
+ // interrupt-parent = <500>;
+ //};
// PSC3 in CODEC mode example
- i2s@2400 { // PSC3
- device_type = "sound";
- compatible = "mpc5200-psc-i2s\0mpc52xx-psc-i2s";
- reg = <2400 100>;
- interrupts = <2 3 0>;
- interrupt-parent = <500>;
- };
+ //i2s@2400 { // PSC3
+ // device_type = "sound";
+ // compatible = "mpc5200-psc-i2s";
+ // cell-index = <2>;
+ // reg = <2400 100>;
+ // interrupts = <2 3 0>;
+ // interrupt-parent = <500>;
+ //};
- // PSC4 unconfigured
+ // PSC4 in uart mode example
//serial@2600 { // PSC4
// device_type = "serial";
- // compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart";
+ // compatible = "mpc5200-psc-uart";
+ // cell-index = <3>;
// reg = <2600 100>;
// interrupts = <2 b 0>;
// interrupt-parent = <500>;
//};
- // PSC5 unconfigured
+ // PSC5 in uart mode example
//serial@2800 { // PSC5
// device_type = "serial";
- // compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart";
+ // compatible = "mpc5200-psc-uart";
+ // cell-index = <4>;
// reg = <2800 100>;
// interrupts = <2 c 0>;
// interrupt-parent = <500>;
//};
- // PSC6 in AC97 mode example
- ac97@2c00 { // PSC6
- device_type = "sound";
- compatible = "mpc5200-psc-ac97\0mpc52xx-psc-ac97";
- reg = <2c00 100>;
- interrupts = <2 4 0>;
- interrupt-parent = <500>;
- };
+ // PSC6 in spi mode example
+ //spi@2c00 { // PSC6
+ // device_type = "spi";
+ // compatible = "mpc5200-psc-spi";
+ // cell-index = <5>;
+ // reg = <2c00 100>;
+ // interrupts = <2 4 0>;
+ // interrupt-parent = <500>;
+ //};
ethernet@3000 {
device_type = "network";
- compatible = "mpc5200-fec\0mpc52xx-fec";
+ compatible = "mpc5200-fec";
reg = <3000 800>;
mac-address = [ 02 03 04 05 06 07 ]; // Bad!
interrupts = <2 5 0>;
@@ -289,7 +310,7 @@
ata@3a00 {
device_type = "ata";
- compatible = "mpc5200-ata\0mpc52xx-ata";
+ compatible = "mpc5200-ata";
reg = <3a00 100>;
interrupts = <2 7 0>;
interrupt-parent = <500>;
@@ -297,7 +318,8 @@
i2c@3d00 {
device_type = "i2c";
- compatible = "mpc5200-i2c\0mpc52xx-i2c";
+ compatible = "mpc5200-i2c";
+ cell-index = <0>;
reg = <3d00 40>;
interrupts = <2 f 0>;
interrupt-parent = <500>;
@@ -305,14 +327,15 @@
i2c@3d40 {
device_type = "i2c";
- compatible = "mpc5200-i2c\0mpc52xx-i2c";
+ compatible = "mpc5200-i2c";
+ cell-index = <1>;
reg = <3d40 40>;
interrupts = <2 10 0>;
interrupt-parent = <500>;
};
sram@8000 {
device_type = "sram";
- compatible = "mpc5200-sram\0mpc52xx-sram\0sram";
+ compatible = "mpc5200-sram\0sram";
reg = <8000 4000>;
};
};
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index 5bb2760d7c3..3875ca9a9a6 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -1,7 +1,7 @@
/*
* Lite5200B board Device Tree Source
*
- * Copyright 2006 Secret Lab Technologies Ltd.
+ * Copyright 2006-2007 Secret Lab Technologies Ltd.
* Grant Likely <grant.likely@secretlab.ca>
*
* This program is free software; you can redistribute it and/or modify it
@@ -17,8 +17,9 @@
*/
/ {
- model = "Lite5200b";
- compatible = "lite5200b\0lite52xx\0mpc5200b\0mpc52xx";
+ model = "fsl,lite5200b";
+ // revision = "1.0";
+ compatible = "fsl,lite5200b\0generic-mpc5200";
#address-cells = <1>;
#size-cells = <1>;
@@ -47,14 +48,17 @@
};
soc5200@f0000000 {
+ model = "fsl,mpc5200b";
+ revision = ""; // from bootloader
#interrupt-cells = <3>;
device_type = "soc";
ranges = <0 f0000000 f0010000>;
reg = <f0000000 00010000>;
bus-frequency = <0>; // from bootloader
+ system-frequency = <0>; // from bootloader
cdm@200 {
- compatible = "mpc5200b-cdm\0mpc52xx-cdm";
+ compatible = "mpc5200b-cdm\0mpc5200-cdm";
reg = <200 38>;
};
@@ -64,77 +68,86 @@
interrupt-controller;
#interrupt-cells = <3>;
device_type = "interrupt-controller";
- compatible = "mpc5200b-pic\0mpc52xx-pic";
+ compatible = "mpc5200b-pic\0mpc5200-pic";
reg = <500 80>;
built-in;
};
gpt@600 { // General Purpose Timer
- compatible = "mpc5200b-gpt\0mpc52xx-gpt";
+ compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
+ cell-index = <0>;
reg = <600 10>;
interrupts = <1 9 0>;
interrupt-parent = <500>;
+ has-wdt;
};
gpt@610 { // General Purpose Timer
- compatible = "mpc5200b-gpt\0mpc52xx-gpt";
+ compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
+ cell-index = <1>;
reg = <610 10>;
interrupts = <1 a 0>;
interrupt-parent = <500>;
};
gpt@620 { // General Purpose Timer
- compatible = "mpc5200b-gpt\0mpc52xx-gpt";
+ compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
+ cell-index = <2>;
reg = <620 10>;
interrupts = <1 b 0>;
interrupt-parent = <500>;
};
gpt@630 { // General Purpose Timer
- compatible = "mpc5200b-gpt\0mpc52xx-gpt";
+ compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
+ cell-index = <3>;
reg = <630 10>;
interrupts = <1 c 0>;
interrupt-parent = <500>;
};
gpt@640 { // General Purpose Timer
- compatible = "mpc5200b-gpt\0mpc52xx-gpt";
+ compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
+ cell-index = <4>;
reg = <640 10>;
interrupts = <1 d 0>;
interrupt-parent = <500>;
};
gpt@650 { // General Purpose Timer
- compatible = "mpc5200b-gpt\0mpc52xx-gpt";
+ compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
+ cell-index = <5>;
reg = <650 10>;
interrupts = <1 e 0>;
interrupt-parent = <500>;
};
gpt@660 { // General Purpose Timer
- compatible = "mpc5200b-gpt\0mpc52xx-gpt";
+ compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
+ cell-index = <6>;
reg = <660 10>;
interrupts = <1 f 0>;
interrupt-parent = <500>;
};
gpt@670 { // General Purpose Timer
- compatible = "mpc5200b-gpt\0mpc52xx-gpt";
+ compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
+ cell-index = <7>;
reg = <670 10>;
interrupts = <1 10 0>;
interrupt-parent = <500>;
};
rtc@800 { // Real time clock
- compatible = "mpc5200b-rtc\0mpc52xx-rtc";
+ compatible = "mpc5200b-rtc\0mpc5200-rtc";
device_type = "rtc";
reg = <800 100>;
interrupts = <1 5 0 1 6 0>;
@@ -143,7 +156,8 @@
mscan@900 {
device_type = "mscan";
- compatible = "mpc5200b-mscan\0mpc52xx-mscan";
+ compatible = "mpc5200b-mscan\0mpc5200-mscan";
+ cell-index = <0>;
interrupts = <2 11 0>;
interrupt-parent = <500>;
reg = <900 80>;
@@ -151,21 +165,22 @@
mscan@980 {
device_type = "mscan";
- compatible = "mpc5200b-mscan\0mpc52xx-mscan";
+ compatible = "mpc5200b-mscan\0mpc5200-mscan";
+ cell-index = <1>;
interrupts = <1 12 0>;
interrupt-parent = <500>;
reg = <980 80>;
};
gpio@b00 {
- compatible = "mpc5200b-gpio\0mpc52xx-gpio";
+ compatible = "mpc5200b-gpio\0mpc5200-gpio";
reg = <b00 40>;
interrupts = <1 7 0>;
interrupt-parent = <500>;
};
gpio-wkup@b00 {
- compatible = "mpc5200b-gpio-wkup\0mpc52xx-gpio-wkup";
+ compatible = "mpc5200b-gpio-wkup\0mpc5200-gpio-wkup";
reg = <c00 40>;
interrupts = <1 8 0 0 3 0>;
interrupt-parent = <500>;
@@ -176,7 +191,7 @@
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
- compatible = "mpc5200b-pci\0mpc52xx-pci";
+ compatible = "mpc5200b-pci\0mpc5200-pci";
reg = <d00 100>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <c000 0 0 1 500 0 0 3 // 1st slot
@@ -199,7 +214,7 @@
spi@f00 {
device_type = "spi";
- compatible = "mpc5200b-spi\0mpc52xx-spi";
+ compatible = "mpc5200b-spi\0mpc5200-spi";
reg = <f00 20>;
interrupts = <2 d 0 2 e 0>;
interrupt-parent = <500>;
@@ -207,7 +222,7 @@
usb@1000 {
device_type = "usb-ohci-be";
- compatible = "mpc5200b-ohci\0mpc52xx-ohci\0ohci-be";
+ compatible = "mpc5200b-ohci\0mpc5200-ohci\0ohci-be";
reg = <1000 ff>;
interrupts = <2 6 0>;
interrupt-parent = <500>;
@@ -215,7 +230,7 @@
bestcomm@1200 {
device_type = "dma-controller";
- compatible = "mpc5200b-bestcomm\0mpc52xx-bestcomm";
+ compatible = "mpc5200b-bestcomm\0mpc5200-bestcomm";
reg = <1200 80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
@@ -225,67 +240,73 @@
};
xlb@1f00 {
- compatible = "mpc5200b-xlb\0mpc52xx-xlb";
+ compatible = "mpc5200b-xlb\0mpc5200-xlb";
reg = <1f00 100>;
};
serial@2000 { // PSC1
device_type = "serial";
- compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart";
+ compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
port-number = <0>; // Logical port assignment
+ cell-index = <0>;
reg = <2000 100>;
interrupts = <2 1 0>;
interrupt-parent = <500>;
};
- // PSC2 in spi mode example
- spi@2200 { // PSC2
- device_type = "spi";
- compatible = "mpc5200b-psc-spi\0mpc52xx-psc-spi";
- reg = <2200 100>;
- interrupts = <2 2 0>;
- interrupt-parent = <500>;
- };
+ // PSC2 in ac97 mode example
+ //ac97@2200 { // PSC2
+ // device_type = "sound";
+ // compatible = "mpc5200b-psc-ac97\0mpc5200-psc-ac97";
+ // cell-index = <1>;
+ // reg = <2200 100>;
+ // interrupts = <2 2 0>;
+ // interrupt-parent = <500>;
+ //};
// PSC3 in CODEC mode example
- i2s@2400 { // PSC3
- device_type = "sound";
- compatible = "mpc5200b-psc-i2s\0mpc52xx-psc-i2s";
- reg = <2400 100>;
- interrupts = <2 3 0>;
- interrupt-parent = <500>;
- };
+ //i2s@2400 { // PSC3
+ // device_type = "sound";
+ // compatible = "mpc5200b-psc-i2s"; //not 5200 compatible
+ // cell-index = <2>;
+ // reg = <2400 100>;
+ // interrupts = <2 3 0>;
+ // interrupt-parent = <500>;
+ //};
- // PSC4 unconfigured
+ // PSC4 in uart mode example
//serial@2600 { // PSC4
// device_type = "serial";
- // compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart";
+ // compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
+ // cell-index = <3>;
// reg = <2600 100>;
// interrupts = <2 b 0>;
// interrupt-parent = <500>;
//};
- // PSC5 unconfigured
+ // PSC5 in uart mode example
//serial@2800 { // PSC5
// device_type = "serial";
- // compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart";
+ // compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
+ // cell-index = <4>;
// reg = <2800 100>;
// interrupts = <2 c 0>;
// interrupt-parent = <500>;
//};
- // PSC6 in AC97 mode example
- ac97@2c00 { // PSC6
- device_type = "sound";
- compatible = "mpc5200b-psc-ac97\0mpc52xx-psc-ac97";
- reg = <2c00 100>;
- interrupts = <2 4 0>;
- interrupt-parent = <500>;
- };
+ // PSC6 in spi mode example
+ //spi@2c00 { // PSC6
+ // device_type = "spi";
+ // compatible = "mpc5200b-psc-spi\0mpc5200-psc-spi";
+ // cell-index = <5>;
+ // reg = <2c00 100>;
+ // interrupts = <2 4 0>;
+ // interrupt-parent = <500>;
+ //};
ethernet@3000 {
device_type = "network";
- compatible = "mpc5200b-fec\0mpc52xx-fec";
+ compatible = "mpc5200b-fec\0mpc5200-fec";
reg = <3000 800>;
mac-address = [ 02 03 04 05 06 07 ]; // Bad!
interrupts = <2 5 0>;
@@ -294,7 +315,7 @@
ata@3a00 {
device_type = "ata";
- compatible = "mpc5200b-ata\0mpc52xx-ata";
+ compatible = "mpc5200b-ata\0mpc5200-ata";
reg = <3a00 100>;
interrupts = <2 7 0>;
interrupt-parent = <500>;
@@ -302,7 +323,8 @@
i2c@3d00 {
device_type = "i2c";
- compatible = "mpc5200b-i2c\0mpc52xx-i2c";
+ compatible = "mpc5200b-i2c\0mpc5200-i2c";
+ cell-index = <0>;
reg = <3d00 40>;
interrupts = <2 f 0>;
interrupt-parent = <500>;
@@ -310,14 +332,15 @@
i2c@3d40 {
device_type = "i2c";
- compatible = "mpc5200b-i2c\0mpc52xx-i2c";
+ compatible = "mpc5200b-i2c\0mpc5200-i2c";
+ cell-index = <1>;
reg = <3d40 40>;
interrupts = <2 10 0>;
interrupt-parent = <500>;
};
sram@8000 {
device_type = "sram";
- compatible = "mpc5200b-sram\0mpc52xx-sram\0sram";
+ compatible = "mpc5200b-sram\0mpc5200-sram\0sram";
reg = <8000 4000>;
};
};
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
new file mode 100644
index 00000000000..3d2f5a06df3
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -0,0 +1,219 @@
+/*
+ * MPC8313E RDB Device Tree Source
+ *
+ * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/ {
+ model = "MPC8313ERDB";
+ compatible = "MPC83xx";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #cpus = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8313@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <20>; // 32 bytes
+ i-cache-line-size = <20>; // 32 bytes
+ d-cache-size = <4000>; // L1, 16K
+ i-cache-size = <4000>; // L1, 16K
+ timebase-frequency = <0>; // from bootloader
+ bus-frequency = <0>; // from bootloader
+ clock-frequency = <0>; // from bootloader
+ 32-bit;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <00000000 08000000>; // 128MB at 0
+ };
+
+ soc8313@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <2>;
+ device_type = "soc";
+ ranges = <0 e0000000 00100000>;
+ reg = <e0000000 00000200>;
+ bus-frequency = <0>;
+
+ wdt@200 {
+ device_type = "watchdog";
+ compatible = "mpc83xx_wdt";
+ reg = <200 100>;
+ };
+
+ i2c@3000 {
+ device_type = "i2c";
+ compatible = "fsl-i2c";
+ reg = <3000 100>;
+ interrupts = <e 8>;
+ interrupt-parent = <700>;
+ dfsrr;
+ };
+
+ i2c@3100 {
+ device_type = "i2c";
+ compatible = "fsl-i2c";
+ reg = <3100 100>;
+ interrupts = <f 8>;
+ interrupt-parent = <700>;
+ dfsrr;
+ };
+
+ spi@7000 {
+ device_type = "spi";
+ compatible = "mpc83xx_spi";
+ reg = <7000 1000>;
+ interrupts = <10 8>;
+ interrupt-parent = <700>;
+ mode = <0>;
+ };
+
+ /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
+ usb@23000 {
+ device_type = "usb";
+ compatible = "fsl-usb2-dr";
+ reg = <23000 1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <700>;
+ interrupts = <26 2>;
+ phy_type = "utmi_wide";
+ };
+
+ mdio@24520 {
+ device_type = "mdio";
+ compatible = "gianfar";
+ reg = <24520 20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ linux,phandle = <24520>;
+ ethernet-phy@1 {
+ linux,phandle = <2452001>;
+ interrupt-parent = <700>;
+ interrupts = <13 2>;
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ ethernet-phy@4 {
+ linux,phandle = <2452004>;
+ interrupt-parent = <700>;
+ interrupts = <14 2>;
+ reg = <4>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ ethernet@24000 {
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <24000 1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <25 8 24 8 23 8>;
+ interrupt-parent = <700>;
+ phy-handle = <2452001>;
+ };
+
+ ethernet@25000 {
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <25000 1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <22 8 21 8 20 8>;
+ interrupt-parent = <700>;
+ phy-handle = <2452004>;
+ };
+
+ serial@4500 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4500 100>;
+ clock-frequency = <0>;
+ interrupts = <9 8>;
+ interrupt-parent = <700>;
+ };
+
+ serial@4600 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4600 100>;
+ clock-frequency = <0>;
+ interrupts = <a 8>;
+ interrupt-parent = <700>;
+ };
+
+ pci@8500 {
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+
+ /* IDSEL 0x0E -mini PCI */
+ 7000 0 0 1 700 12 8
+ 7000 0 0 2 700 12 8
+ 7000 0 0 3 700 12 8
+ 7000 0 0 4 700 12 8
+
+ /* IDSEL 0x0F - PCI slot */
+ 7800 0 0 1 700 11 8
+ 7800 0 0 2 700 12 8
+ 7800 0 0 3 700 11 8
+ 7800 0 0 4 700 12 8>;
+ interrupt-parent = <700>;
+ interrupts = <42 8>;
+ bus-range = <0 0>;
+ ranges = <02000000 0 90000000 90000000 0 10000000
+ 42000000 0 80000000 80000000 0 10000000
+ 01000000 0 00000000 e2000000 0 00100000>;
+ clock-frequency = <3f940aa>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <8500 100>;
+ compatible = "83xx";
+ device_type = "pci";
+ };
+
+ crypto@30000 {
+ device_type = "crypto";
+ model = "SEC2";
+ compatible = "talitos";
+ reg = <30000 7000>;
+ interrupts = <b 8>;
+ interrupt-parent = <700>;
+ /* Rev. 2.2 */
+ num-channels = <1>;
+ channel-fifo-len = <18>;
+ exec-units-mask = <0000004c>;
+ descriptor-types-mask = <0122003f>;
+ };
+
+ /* IPIC
+ * interrupts cell = <intr #, sense>
+ * sense values match linux IORESOURCE_IRQ_* defines:
+ * sense == 8: Level, low assertion
+ * sense == 2: Edge, high-to-low change
+ */
+ pic@700 {
+ linux,phandle = <700>;
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <700 100>;
+ built-in;
+ device_type = "ipic";
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
new file mode 100644
index 00000000000..3190774de1d
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -0,0 +1,187 @@
+/*
+ * MPC8349E-mITX-GP Device Tree Source
+ *
+ * Copyright 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+/ {
+ model = "MPC8349EMITXGP";
+ compatible = "MPC834xMITXGP";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #cpus = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8349@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <20>;
+ i-cache-line-size = <20>;
+ d-cache-size = <8000>;
+ i-cache-size = <8000>;
+ timebase-frequency = <0>; // from bootloader
+ bus-frequency = <0>; // from bootloader
+ clock-frequency = <0>; // from bootloader
+ 32-bit;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <00000000 10000000>;
+ };
+
+ soc8349@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <2>;
+ device_type = "soc";
+ ranges = <0 e0000000 00100000>;
+ reg = <e0000000 00000200>;
+ bus-frequency = <0>; // from bootloader
+
+ wdt@200 {
+ device_type = "watchdog";
+ compatible = "mpc83xx_wdt";
+ reg = <200 100>;
+ };
+
+ i2c@3000 {
+ device_type = "i2c";
+ compatible = "fsl-i2c";
+ reg = <3000 100>;
+ interrupts = <e 8>;
+ interrupt-parent = <700>;
+ dfsrr;
+ };
+
+ i2c@3100 {
+ device_type = "i2c";
+ compatible = "fsl-i2c";
+ reg = <3100 100>;
+ interrupts = <f 8>;
+ interrupt-parent = <700>;
+ dfsrr;
+ };
+
+ spi@7000 {
+ device_type = "spi";
+ compatible = "mpc83xx_spi";
+ reg = <7000 1000>;
+ interrupts = <10 8>;
+ interrupt-parent = <700>;
+ mode = <0>;
+ };
+
+ usb@23000 {
+ device_type = "usb";
+ compatible = "fsl-usb2-dr";
+ reg = <23000 1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <700>;
+ interrupts = <26 2>;
+ dr_mode = "otg";
+ phy_type = "ulpi";
+ };
+
+ mdio@24520 {
+ device_type = "mdio";
+ compatible = "gianfar";
+ reg = <24520 20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ linux,phandle = <24520>;
+
+ /* Vitesse 8201 */
+ ethernet-phy@1c {
+ linux,phandle = <245201c>;
+ interrupt-parent = <700>;
+ interrupts = <12 2>;
+ reg = <1c>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ ethernet@24000 {
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <24000 1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <20 8 21 8 22 8>;
+ interrupt-parent = <700>;
+ phy-handle = <245201c>;
+ };
+
+ serial@4500 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4500 100>;
+ clock-frequency = <0>; // from bootloader
+ interrupts = <9 8>;
+ interrupt-parent = <700>;
+ };
+
+ serial@4600 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4600 100>;
+ clock-frequency = <0>; // from bootloader
+ interrupts = <a 8>;
+ interrupt-parent = <700>;
+ };
+
+ pci@8600 {
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x0F - PCI Slot */
+ 7800 0 0 1 700 14 8 /* PCI_INTA */
+ 7800 0 0 2 700 15 8 /* PCI_INTB */
+ >;
+ interrupt-parent = <700>;
+ interrupts = <43 8>;
+ bus-range = <1 1>;
+ ranges = <42000000 0 a0000000 a0000000 0 10000000
+ 02000000 0 b0000000 b0000000 0 10000000
+ 01000000 0 00000000 e3000000 0 01000000>;
+ clock-frequency = <3f940aa>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <8600 100>;
+ compatible = "83xx";
+ device_type = "pci";
+ };
+
+ crypto@30000 {
+ device_type = "crypto";
+ model = "SEC2";
+ compatible = "talitos";
+ reg = <30000 10000>;
+ interrupts = <b 8>;
+ interrupt-parent = <700>;
+ num-channels = <4>;
+ channel-fifo-len = <18>;
+ exec-units-mask = <0000007e>;
+ descriptor-types-mask = <01010ebf>;
+ };
+
+ pic@700 {
+ linux,phandle = <700>;
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <700 100>;
+ built-in;
+ device_type = "ipic";
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/mpc8349emds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index efceb343265..dc121b3cb4a 100644
--- a/arch/powerpc/boot/dts/mpc8349emds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -39,6 +39,11 @@
reg = <00000000 10000000>; // 256MB at 0
};
+ bcsr@e2400000 {
+ device_type = "board-control";
+ reg = <e2400000 8000>;
+ };
+
soc8349@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
@@ -103,6 +108,7 @@
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <26 2>;
+ dr_mode = "otg";
phy_type = "ulpi";
};
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
new file mode 100644
index 00000000000..06d24653e42
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -0,0 +1,380 @@
+/*
+ * MPC8568E MDS Device Tree Source
+ *
+ * Copyright 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+
+/*
+/memreserve/ 00000000 1000000;
+*/
+
+/ {
+ model = "MPC8568EMDS";
+ compatible = "MPC85xxMDS";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ linux,phandle = <100>;
+
+ cpus {
+ #cpus = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ linux,phandle = <200>;
+
+ PowerPC,8568@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <20>; // 32 bytes
+ i-cache-line-size = <20>; // 32 bytes
+ d-cache-size = <8000>; // L1, 32K
+ i-cache-size = <8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ 32-bit;
+ linux,phandle = <201>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ linux,phandle = <300>;
+ reg = <00000000 10000000>;
+ };
+
+ bcsr@f8000000 {
+ device_type = "board-control";
+ reg = <f8000000 8000>;
+ };
+
+ soc8568@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <2>;
+ device_type = "soc";
+ ranges = <0 e0000000 00100000>;
+ reg = <e0000000 00100000>;
+ bus-frequency = <0>;
+
+ i2c@3000 {
+ device_type = "i2c";
+ compatible = "fsl-i2c";
+ reg = <3000 100>;
+ interrupts = <1b 2>;
+ interrupt-parent = <40000>;
+ dfsrr;
+ };
+
+ i2c@3100 {
+ device_type = "i2c";
+ compatible = "fsl-i2c";
+ reg = <3100 100>;
+ interrupts = <1b 2>;
+ interrupt-parent = <40000>;
+ dfsrr;
+ };
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ device_type = "mdio";
+ compatible = "gianfar";
+ reg = <24520 20>;
+ linux,phandle = <24520>;
+ ethernet-phy@0 {
+ linux,phandle = <2452000>;
+ interrupt-parent = <40000>;
+ interrupts = <31 1>;
+ reg = <0>;
+ device_type = "ethernet-phy";
+ };
+ ethernet-phy@1 {
+ linux,phandle = <2452001>;
+ interrupt-parent = <40000>;
+ interrupts = <32 1>;
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+
+ ethernet-phy@2 {
+ linux,phandle = <2452002>;
+ interrupt-parent = <40000>;
+ interrupts = <31 1>;
+ reg = <2>;
+ device_type = "ethernet-phy";
+ };
+ ethernet-phy@3 {
+ linux,phandle = <2452003>;
+ interrupt-parent = <40000>;
+ interrupts = <32 1>;
+ reg = <3>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ ethernet@24000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <24000 1000>;
+ mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <d 2 e 2 12 2>;
+ interrupt-parent = <40000>;
+ phy-handle = <2452002>;
+ };
+
+ ethernet@25000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <25000 1000>;
+ mac-address = [ 00 00 00 00 00 00];
+ interrupts = <13 2 14 2 18 2>;
+ interrupt-parent = <40000>;
+ phy-handle = <2452003>;
+ };
+
+ serial@4500 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4500 100>;
+ clock-frequency = <0>;
+ interrupts = <1a 2>;
+ interrupt-parent = <40000>;
+ };
+
+ serial@4600 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4600 100>;
+ clock-frequency = <0>;
+ interrupts = <1a 2>;
+ interrupt-parent = <40000>;
+ };
+
+ crypto@30000 {
+ device_type = "crypto";
+ model = "SEC2";
+ compatible = "talitos";
+ reg = <30000 f000>;
+ interrupts = <1d 2>;
+ interrupt-parent = <40000>;
+ num-channels = <4>;
+ channel-fifo-len = <18>;
+ exec-units-mask = <000000fe>;
+ descriptor-types-mask = <012b0ebf>;
+ };
+
+ pic@40000 {
+ linux,phandle = <40000>;
+ clock-frequency = <0>;
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <40000 40000>;
+ built-in;
+ compatible = "chrp,open-pic";
+ device_type = "open-pic";
+ big-endian;
+ };
+ par_io@e0100 {
+ reg = <e0100 100>;
+ device_type = "par_io";
+ num-ports = <7>;
+
+ ucc_pin@01 {
+ linux,phandle = <e010001>;
+ pio-map = <
+ /* port pin dir open_drain assignment has_irq */
+ 4 0a 1 0 2 0 /* TxD0 */
+ 4 09 1 0 2 0 /* TxD1 */
+ 4 08 1 0 2 0 /* TxD2 */
+ 4 07 1 0 2 0 /* TxD3 */
+ 4 17 1 0 2 0 /* TxD4 */
+ 4 16 1 0 2 0 /* TxD5 */
+ 4 15 1 0 2 0 /* TxD6 */
+ 4 14 1 0 2 0 /* TxD7 */
+ 4 0f 2 0 2 0 /* RxD0 */
+ 4 0e 2 0 2 0 /* RxD1 */
+ 4 0d 2 0 2 0 /* RxD2 */
+ 4 0c 2 0 2 0 /* RxD3 */
+ 4 1d 2 0 2 0 /* RxD4 */
+ 4 1c 2 0 2 0 /* RxD5 */
+ 4 1b 2 0 2 0 /* RxD6 */
+ 4 1a 2 0 2 0 /* RxD7 */
+ 4 0b 1 0 2 0 /* TX_EN */
+ 4 18 1 0 2 0 /* TX_ER */
+ 4 0f 2 0 2 0 /* RX_DV */
+ 4 1e 2 0 2 0 /* RX_ER */
+ 4 11 2 0 2 0 /* RX_CLK */
+ 4 13 1 0 2 0 /* GTX_CLK */
+ 1 1f 2 0 3 0>; /* GTX125 */
+ };
+ ucc_pin@02 {
+ linux,phandle = <e010002>;
+ pio-map = <
+ /* port pin dir open_drain assignment has_irq */
+ 5 0a 1 0 2 0 /* TxD0 */
+ 5 09 1 0 2 0 /* TxD1 */
+ 5 08 1 0 2 0 /* TxD2 */
+ 5 07 1 0 2 0 /* TxD3 */
+ 5 17 1 0 2 0 /* TxD4 */
+ 5 16 1 0 2 0 /* TxD5 */
+ 5 15 1 0 2 0 /* TxD6 */
+ 5 14 1 0 2 0 /* TxD7 */
+ 5 0f 2 0 2 0 /* RxD0 */
+ 5 0e 2 0 2 0 /* RxD1 */
+ 5 0d 2 0 2 0 /* RxD2 */
+ 5 0c 2 0 2 0 /* RxD3 */
+ 5 1d 2 0 2 0 /* RxD4 */
+ 5 1c 2 0 2 0 /* RxD5 */
+ 5 1b 2 0 2 0 /* RxD6 */
+ 5 1a 2 0 2 0 /* RxD7 */
+ 5 0b 1 0 2 0 /* TX_EN */
+ 5 18 1 0 2 0 /* TX_ER */
+ 5 10 2 0 2 0 /* RX_DV */
+ 5 1e 2 0 2 0 /* RX_ER */
+ 5 11 2 0 2 0 /* RX_CLK */
+ 5 13 1 0 2 0 /* GTX_CLK */
+ 1 1f 2 0 3 0 /* GTX125 */
+ 4 06 3 0 2 0 /* MDIO */
+ 4 05 1 0 2 0>; /* MDC */
+ };
+ };
+ };
+
+ qe@e0080000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "qe";
+ model = "QE";
+ ranges = <0 e0080000 00040000>;
+ reg = <e0080000 480>;
+ brg-frequency = <0>;
+ bus-frequency = <179A7B00>;
+
+ muram@10000 {
+ device_type = "muram";
+ ranges = <0 00010000 0000c000>;
+
+ data-only@0{
+ reg = <0 c000>;
+ };
+ };
+
+ spi@4c0 {
+ device_type = "spi";
+ compatible = "fsl_spi";
+ reg = <4c0 40>;
+ interrupts = <2>;
+ interrupt-parent = <80>;
+ mode = "cpu";
+ };
+
+ spi@500 {
+ device_type = "spi";
+ compatible = "fsl_spi";
+ reg = <500 40>;
+ interrupts = <1>;
+ interrupt-parent = <80>;
+ mode = "cpu";
+ };
+
+ ucc@2000 {
+ device_type = "network";
+ compatible = "ucc_geth";
+ model = "UCC";
+ device-id = <1>;
+ reg = <2000 200>;
+ interrupts = <20>;
+ interrupt-parent = <80>;
+ mac-address = [ 00 04 9f 00 23 23 ];
+ rx-clock = <0>;
+ tx-clock = <19>;
+ phy-handle = <212000>;
+ pio-handle = <e010001>;
+ };
+
+ ucc@3000 {
+ device_type = "network";
+ compatible = "ucc_geth";
+ model = "UCC";
+ device-id = <2>;
+ reg = <3000 200>;
+ interrupts = <21>;
+ interrupt-parent = <80>;
+ mac-address = [ 00 11 22 33 44 55 ];
+ rx-clock = <0>;
+ tx-clock = <14>;
+ phy-handle = <212001>;
+ pio-handle = <e010002>;
+ };
+
+ mdio@2120 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2120 18>;
+ device_type = "mdio";
+ compatible = "ucc_geth_phy";
+
+ /* These are the same PHYs as on
+ * gianfar's MDIO bus */
+ ethernet-phy@00 {
+ linux,phandle = <212000>;
+ interrupt-parent = <40000>;
+ interrupts = <31 1>;
+ reg = <0>;
+ device_type = "ethernet-phy";
+ interface = <6>; //ENET_1000_GMII
+ };
+ ethernet-phy@01 {
+ linux,phandle = <212001>;
+ interrupt-parent = <40000>;
+ interrupts = <32 1>;
+ reg = <1>;
+ device_type = "ethernet-phy";
+ interface = <6>;
+ };
+ ethernet-phy@02 {
+ linux,phandle = <212002>;
+ interrupt-parent = <40000>;
+ interrupts = <31 1>;
+ reg = <2>;
+ device_type = "ethernet-phy";
+ interface = <6>; //ENET_1000_GMII
+ };
+ ethernet-phy@03 {
+ linux,phandle = <212003>;
+ interrupt-parent = <40000>;
+ interrupts = <32 1>;
+ reg = <3>;
+ device_type = "ethernet-phy";
+ interface = <6>; //ENET_1000_GMII
+ };
+ };
+
+ qeic@80 {
+ linux,phandle = <80>;
+ interrupt-controller;
+ device_type = "qeic";
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ reg = <80 80>;
+ built-in;
+ big-endian;
+ interrupts = <1e 2 1e 2>; //high:30 low:30
+ interrupt-parent = <40000>;
+ };
+
+ };
+};
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-11 17:15:00 +0000