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-rw-r--r--arch/sh/kernel/cpu/irq/intc2.c275
-rw-r--r--arch/sh/kernel/cpu/irq/ipr.c183
-rw-r--r--arch/sh/kernel/cpu/irq/pint.c8
-rw-r--r--arch/sh/kernel/cpu/sh3/ex.S204
-rw-r--r--arch/sh/kernel/cpu/sh4/ex.S507
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7760.c63
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7780.c27
-rw-r--r--arch/sh/kernel/entry.S43
-rw-r--r--arch/sh/kernel/irq.c42
-rw-r--r--arch/sh/kernel/process.c42
-rw-r--r--arch/sh/kernel/syscalls.S3
-rw-r--r--arch/sh/kernel/time.c9
-rw-r--r--arch/sh/kernel/timers/timer-tmu.c63
-rw-r--r--arch/sh/kernel/traps.c167
-rw-r--r--arch/sh/kernel/vmlinux.lds.S8
15 files changed, 402 insertions, 1242 deletions
diff --git a/arch/sh/kernel/cpu/irq/intc2.c b/arch/sh/kernel/cpu/irq/intc2.c
index e30e4b7aa70..74ca576a7ce 100644
--- a/arch/sh/kernel/cpu/irq/intc2.c
+++ b/arch/sh/kernel/cpu/irq/intc2.c
@@ -10,93 +10,31 @@
* These are the "new Hitachi style" interrupts, as present on the
* Hitachi 7751, the STM ST40 STB1, SH7760, and SH7780.
*/
-
#include <linux/kernel.h>
-#include <linux/init.h>
#include <linux/irq.h>
+#include <linux/io.h>
#include <asm/system.h>
-#include <asm/io.h>
-#include <asm/machvec.h>
-
-struct intc2_data {
- unsigned char msk_offset;
- unsigned char msk_shift;
-
- int (*clear_irq) (int);
-};
-
-static struct intc2_data intc2_data[NR_INTC2_IRQS];
-
-static void enable_intc2_irq(unsigned int irq);
-static void disable_intc2_irq(unsigned int irq);
-
-/* shutdown is same as "disable" */
-#define shutdown_intc2_irq disable_intc2_irq
-
-static void mask_and_ack_intc2(unsigned int);
-static void end_intc2_irq(unsigned int irq);
-
-static unsigned int startup_intc2_irq(unsigned int irq)
-{
- enable_intc2_irq(irq);
- return 0; /* never anything pending */
-}
-
-static struct hw_interrupt_type intc2_irq_type = {
- .typename = "INTC2-IRQ",
- .startup = startup_intc2_irq,
- .shutdown = shutdown_intc2_irq,
- .enable = enable_intc2_irq,
- .disable = disable_intc2_irq,
- .ack = mask_and_ack_intc2,
- .end = end_intc2_irq
-};
static void disable_intc2_irq(unsigned int irq)
{
- int irq_offset = irq - INTC2_FIRST_IRQ;
- int msk_shift, msk_offset;
-
- /* Sanity check */
- if (unlikely(irq_offset < 0 || irq_offset >= NR_INTC2_IRQS))
- return;
-
- msk_shift = intc2_data[irq_offset].msk_shift;
- msk_offset = intc2_data[irq_offset].msk_offset;
-
- ctrl_outl(1 << msk_shift,
- INTC2_BASE + INTC2_INTMSK_OFFSET + msk_offset);
+ struct intc2_data *p = get_irq_chip_data(irq);
+ ctrl_outl(1 << p->msk_shift,
+ INTC2_BASE + INTC2_INTMSK_OFFSET + p->msk_offset);
}
static void enable_intc2_irq(unsigned int irq)
{
- int irq_offset = irq - INTC2_FIRST_IRQ;
- int msk_shift, msk_offset;
-
- /* Sanity check */
- if (unlikely(irq_offset < 0 || irq_offset >= NR_INTC2_IRQS))
- return;
-
- msk_shift = intc2_data[irq_offset].msk_shift;
- msk_offset = intc2_data[irq_offset].msk_offset;
-
- ctrl_outl(1 << msk_shift,
- INTC2_BASE + INTC2_INTMSKCLR_OFFSET + msk_offset);
+ struct intc2_data *p = get_irq_chip_data(irq);
+ ctrl_outl(1 << p->msk_shift,
+ INTC2_BASE + INTC2_INTMSKCLR_OFFSET + p->msk_offset);
}
-static void mask_and_ack_intc2(unsigned int irq)
-{
- disable_intc2_irq(irq);
-}
-
-static void end_intc2_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_intc2_irq(irq);
-
- if (unlikely(intc2_data[irq - INTC2_FIRST_IRQ].clear_irq))
- intc2_data[irq - INTC2_FIRST_IRQ].clear_irq(irq);
-}
+static struct irq_chip intc2_irq_chip = {
+ .name = "INTC2",
+ .mask = disable_intc2_irq,
+ .unmask = enable_intc2_irq,
+ .mask_ack = disable_intc2_irq,
+};
/*
* Setup an INTC2 style interrupt.
@@ -106,179 +44,36 @@ static void end_intc2_irq(unsigned int irq)
* PIO1 which is INTPRI00[19,16] and INTMSK00[13]
* would be: ^ ^ ^ ^
* | | | |
- * make_intc2_irq(84, 0, 16, 0, 13);
+ * { 84, 0, 16, 0, 13 },
+ *
+ * in the intc2_data table.
*/
-void make_intc2_irq(unsigned int irq,
- unsigned int ipr_offset, unsigned int ipr_shift,
- unsigned int msk_offset, unsigned int msk_shift,
- unsigned int priority)
+void make_intc2_irq(struct intc2_data *table, unsigned int nr_irqs)
{
- int irq_offset = irq - INTC2_FIRST_IRQ;
- unsigned int flags;
- unsigned long ipr;
-
- if (unlikely(irq_offset < 0 || irq_offset >= NR_INTC2_IRQS))
- return;
-
- disable_irq_nosync(irq);
-
- /* Fill the data we need */
- intc2_data[irq_offset].msk_offset = msk_offset;
- intc2_data[irq_offset].msk_shift = msk_shift;
- intc2_data[irq_offset].clear_irq = NULL;
-
- /* Set the priority level */
- local_irq_save(flags);
-
- ipr = ctrl_inl(INTC2_BASE + INTC2_INTPRI_OFFSET + ipr_offset);
- ipr &= ~(0xf << ipr_shift);
- ipr |= priority << ipr_shift;
- ctrl_outl(ipr, INTC2_BASE + INTC2_INTPRI_OFFSET + ipr_offset);
-
- local_irq_restore(flags);
+ int i;
- irq_desc[irq].chip = &intc2_irq_type;
+ for (i = 0; i < nr_irqs; i++) {
+ unsigned long ipr, flags;
+ struct intc2_data *p = table + i;
- disable_intc2_irq(irq);
-}
+ disable_irq_nosync(p->irq);
-static struct intc2_init {
- unsigned short irq;
- unsigned char ipr_offset, ipr_shift;
- unsigned char msk_offset, msk_shift;
- unsigned char priority;
-} intc2_init_data[] __initdata = {
-#if defined(CONFIG_CPU_SUBTYPE_ST40)
- {64, 0, 0, 0, 0, 13}, /* PCI serr */
- {65, 0, 4, 0, 1, 13}, /* PCI err */
- {66, 0, 4, 0, 2, 13}, /* PCI ad */
- {67, 0, 4, 0, 3, 13}, /* PCI pwd down */
- {72, 0, 8, 0, 5, 13}, /* DMAC INT0 */
- {73, 0, 8, 0, 6, 13}, /* DMAC INT1 */
- {74, 0, 8, 0, 7, 13}, /* DMAC INT2 */
- {75, 0, 8, 0, 8, 13}, /* DMAC INT3 */
- {76, 0, 8, 0, 9, 13}, /* DMAC INT4 */
- {78, 0, 8, 0, 11, 13}, /* DMAC ERR */
- {80, 0, 12, 0, 12, 13}, /* PIO0 */
- {84, 0, 16, 0, 13, 13}, /* PIO1 */
- {88, 0, 20, 0, 14, 13}, /* PIO2 */
- {112, 4, 0, 4, 0, 13}, /* Mailbox */
- #ifdef CONFIG_CPU_SUBTYPE_ST40GX1
- {116, 4, 4, 4, 4, 13}, /* SSC0 */
- {120, 4, 8, 4, 8, 13}, /* IR Blaster */
- {124, 4, 12, 4, 12, 13}, /* USB host */
- {128, 4, 16, 4, 16, 13}, /* Video processor BLITTER */
- {132, 4, 20, 4, 20, 13}, /* UART0 */
- {134, 4, 20, 4, 22, 13}, /* UART2 */
- {136, 4, 24, 4, 24, 13}, /* IO_PIO0 */
- {140, 4, 28, 4, 28, 13}, /* EMPI */
- {144, 8, 0, 8, 0, 13}, /* MAFE */
- {148, 8, 4, 8, 4, 13}, /* PWM */
- {152, 8, 8, 8, 8, 13}, /* SSC1 */
- {156, 8, 12, 8, 12, 13}, /* IO_PIO1 */
- {160, 8, 16, 8, 16, 13}, /* USB target */
- {164, 8, 20, 8, 20, 13}, /* UART1 */
- {168, 8, 24, 8, 24, 13}, /* Teletext */
- {172, 8, 28, 8, 28, 13}, /* VideoSync VTG */
- {173, 8, 28, 8, 29, 13}, /* VideoSync DVP0 */
- {174, 8, 28, 8, 30, 13}, /* VideoSync DVP1 */
-#endif
-#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
-/*
- * SH7760 INTC2-Style interrupts, vectors IRQ48-111 INTEVT 0x800-0xFE0
- */
- /* INTPRIO0 | INTMSK0 */
- {48, 0, 28, 0, 31, 3}, /* IRQ 4 */
- {49, 0, 24, 0, 30, 3}, /* IRQ 3 */
- {50, 0, 20, 0, 29, 3}, /* IRQ 2 */
- {51, 0, 16, 0, 28, 3}, /* IRQ 1 */
- /* 52-55 (INTEVT 0x880-0x8E0) unused/reserved */
- /* INTPRIO4 | INTMSK0 */
- {56, 4, 28, 0, 25, 3}, /* HCAN2_CHAN0 */
- {57, 4, 24, 0, 24, 3}, /* HCAN2_CHAN1 */
- {58, 4, 20, 0, 23, 3}, /* I2S_CHAN0 */
- {59, 4, 16, 0, 22, 3}, /* I2S_CHAN1 */
- {60, 4, 12, 0, 21, 3}, /* AC97_CHAN0 */
- {61, 4, 8, 0, 20, 3}, /* AC97_CHAN1 */
- {62, 4, 4, 0, 19, 3}, /* I2C_CHAN0 */
- {63, 4, 0, 0, 18, 3}, /* I2C_CHAN1 */
- /* INTPRIO8 | INTMSK0 */
- {52, 8, 16, 0, 11, 3}, /* SCIF0_ERI_IRQ */
- {53, 8, 16, 0, 10, 3}, /* SCIF0_RXI_IRQ */
- {54, 8, 16, 0, 9, 3}, /* SCIF0_BRI_IRQ */
- {55, 8, 16, 0, 8, 3}, /* SCIF0_TXI_IRQ */
- {64, 8, 28, 0, 17, 3}, /* USBHI_IRQ */
- {65, 8, 24, 0, 16, 3}, /* LCDC */
- /* 66, 67 unused */
- {68, 8, 20, 0, 14, 13}, /* DMABRGI0_IRQ */
- {69, 8, 20, 0, 13, 13}, /* DMABRGI1_IRQ */
- {70, 8, 20, 0, 12, 13}, /* DMABRGI2_IRQ */
- /* 71 unused */
- {72, 8, 12, 0, 7, 3}, /* SCIF1_ERI_IRQ */
- {73, 8, 12, 0, 6, 3}, /* SCIF1_RXI_IRQ */
- {74, 8, 12, 0, 5, 3}, /* SCIF1_BRI_IRQ */
- {75, 8, 12, 0, 4, 3}, /* SCIF1_TXI_IRQ */
- {76, 8, 8, 0, 3, 3}, /* SCIF2_ERI_IRQ */
- {77, 8, 8, 0, 2, 3}, /* SCIF2_RXI_IRQ */
- {78, 8, 8, 0, 1, 3}, /* SCIF2_BRI_IRQ */
- {79, 8, 8, 0, 0, 3}, /* SCIF2_TXI_IRQ */
- /* | INTMSK4 */
- {80, 8, 4, 4, 23, 3}, /* SIM_ERI */
- {81, 8, 4, 4, 22, 3}, /* SIM_RXI */
- {82, 8, 4, 4, 21, 3}, /* SIM_TXI */
- {83, 8, 4, 4, 20, 3}, /* SIM_TEI */
- {84, 8, 0, 4, 19, 3}, /* HSPII */
- /* INTPRIOC | INTMSK4 */
- /* 85-87 unused/reserved */
- {88, 12, 20, 4, 18, 3}, /* MMCI0 */
- {89, 12, 20, 4, 17, 3}, /* MMCI1 */
- {90, 12, 20, 4, 16, 3}, /* MMCI2 */
- {91, 12, 20, 4, 15, 3}, /* MMCI3 */
- {92, 12, 12, 4, 6, 3}, /* MFI (unsure, bug? in my 7760 manual*/
- /* 93-107 reserved/undocumented */
- {108,12, 4, 4, 1, 3}, /* ADC */
- {109,12, 0, 4, 0, 3}, /* CMTI */
- /* 110-111 reserved/unused */
-#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
- { TIMER_IRQ, 0, 24, 0, INTC_TMU0_MSK, 2},
- { 21, 1, 0, 0, INTC_RTC_MSK, TIMER_PRIORITY },
- { 22, 1, 1, 0, INTC_RTC_MSK, TIMER_PRIORITY },
- { 23, 1, 2, 0, INTC_RTC_MSK, TIMER_PRIORITY },
- { SCIF0_ERI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
- { SCIF0_RXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
- { SCIF0_BRI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
- { SCIF0_TXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
+ /* Set the priority level */
+ local_irq_save(flags);
- { SCIF1_ERI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
- { SCIF1_RXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
- { SCIF1_BRI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
- { SCIF1_TXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
+ ipr = ctrl_inl(INTC2_BASE + INTC2_INTPRI_OFFSET +
+ p->ipr_offset);
+ ipr &= ~(0xf << p->ipr_shift);
+ ipr |= p->priority << p->ipr_shift;
+ ctrl_outl(ipr, INTC2_BASE + INTC2_INTPRI_OFFSET +
+ p->ipr_offset);
- { PCIC0_IRQ, 0x10, 8, 0, INTC_PCIC0_MSK, PCIC0_PRIORITY },
- { PCIC1_IRQ, 0x10, 0, 0, INTC_PCIC1_MSK, PCIC1_PRIORITY },
- { PCIC2_IRQ, 0x14, 24, 0, INTC_PCIC2_MSK, PCIC2_PRIORITY },
- { PCIC3_IRQ, 0x14, 16, 0, INTC_PCIC3_MSK, PCIC3_PRIORITY },
- { PCIC4_IRQ, 0x14, 8, 0, INTC_PCIC4_MSK, PCIC4_PRIORITY },
-#endif
-};
+ local_irq_restore(flags);
-void __init init_IRQ_intc2(void)
-{
- int i;
+ set_irq_chip_and_handler_name(p->irq, &intc2_irq_chip,
+ handle_level_irq, "level");
+ set_irq_chip_data(p->irq, p);
- for (i = 0; i < ARRAY_SIZE(intc2_init_data); i++) {
- struct intc2_init *p = intc2_init_data + i;
- make_intc2_irq(p->irq, p->ipr_offset, p->ipr_shift,
- p-> msk_offset, p->msk_shift, p->priority);
+ enable_intc2_irq(p->irq);
}
}
-
-/* Adds a termination callback to the interrupt */
-void intc2_add_clear_irq(int irq, int (*fn)(int))
-{
- if (unlikely(irq < INTC2_FIRST_IRQ))
- return;
-
- intc2_data[irq - INTC2_FIRST_IRQ].clear_irq = fn;
-}
-
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c
index f785822cd5d..a0089563cbf 100644
--- a/arch/sh/kernel/cpu/irq/ipr.c
+++ b/arch/sh/kernel/cpu/irq/ipr.c
@@ -1,11 +1,10 @@
/*
- * arch/sh/kernel/cpu/irq/ipr.c
+ * Interrupt handling for IPR-based IRQ.
*
* Copyright (C) 1999 Niibe Yutaka & Takeshi Yaegashi
* Copyright (C) 2000 Kazumoto Kojima
- * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
- *
- * Interrupt handling for IPR-based IRQ.
+ * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
+ * Copyright (C) 2006 Paul Mundt
*
* Supported system:
* On-chip supporting modules (TMU, RTC, etc.).
@@ -13,151 +12,92 @@
* Hitachi SolutionEngine external I/O:
* MS7709SE01, MS7709ASE01, and MS7750SE01
*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
*/
-
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/module.h>
-
#include <asm/system.h>
#include <asm/io.h>
#include <asm/machvec.h>
-struct ipr_data {
- unsigned int addr; /* Address of Interrupt Priority Register */
- int shift; /* Shifts of the 16-bit data */
- int priority; /* The priority */
-};
-static struct ipr_data ipr_data[NR_IRQS];
-
-static void enable_ipr_irq(unsigned int irq);
-static void disable_ipr_irq(unsigned int irq);
-
-/* shutdown is same as "disable" */
-#define shutdown_ipr_irq disable_ipr_irq
-
-static void mask_and_ack_ipr(unsigned int);
-static void end_ipr_irq(unsigned int irq);
-
-static unsigned int startup_ipr_irq(unsigned int irq)
-{
- enable_ipr_irq(irq);
- return 0; /* never anything pending */
-}
-
-static struct hw_interrupt_type ipr_irq_type = {
- .typename = "IPR-IRQ",
- .startup = startup_ipr_irq,
- .shutdown = shutdown_ipr_irq,
- .enable = enable_ipr_irq,
- .disable = disable_ipr_irq,
- .ack = mask_and_ack_ipr,
- .end = end_ipr_irq
-};
static void disable_ipr_irq(unsigned int irq)
{
- unsigned long val;
- unsigned int addr = ipr_data[irq].addr;
- unsigned short mask = 0xffff ^ (0x0f << ipr_data[irq].shift);
-
+ struct ipr_data *p = get_irq_chip_data(irq);
+ int shift = p->shift*4;
/* Set the priority in IPR to 0 */
- val = ctrl_inw(addr);
- val &= mask;
- ctrl_outw(val, addr);
+ ctrl_outw(ctrl_inw(p->addr) & (0xffff ^ (0xf << shift)), p->addr);
}
static void enable_ipr_irq(unsigned int irq)
{
- unsigned long val;
- unsigned int addr = ipr_data[irq].addr;
- int priority = ipr_data[irq].priority;
- unsigned short value = (priority << ipr_data[irq].shift);
-
+ struct ipr_data *p = get_irq_chip_data(irq);
+ int shift = p->shift*4;
/* Set priority in IPR back to original value */
- val = ctrl_inw(addr);
- val |= value;
- ctrl_outw(val, addr);
+ ctrl_outw(ctrl_inw(p->addr) | (p->priority << shift), p->addr);
}
-static void mask_and_ack_ipr(unsigned int irq)
-{
- disable_ipr_irq(irq);
-
-#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \
- defined(CONFIG_CPU_SUBTYPE_SH7706) || \
- defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705)
- /* This is needed when we use edge triggered setting */
- /* XXX: Is it really needed? */
- if (IRQ0_IRQ <= irq && irq <= IRQ5_IRQ) {
- /* Clear external interrupt request */
- int a = ctrl_inb(INTC_IRR0);
- a &= ~(1 << (irq - IRQ0_IRQ));
- ctrl_outb(a, INTC_IRR0);
- }
-#endif
-}
+static struct irq_chip ipr_irq_chip = {
+ .name = "IPR",
+ .mask = disable_ipr_irq,
+ .unmask = enable_ipr_irq,
+ .mask_ack = disable_ipr_irq,
+};
-static void end_ipr_irq(unsigned int irq)
+void make_ipr_irq(struct ipr_data *table, unsigned int nr_irqs)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ int i;
+
+ for (i = 0; i < nr_irqs; i++) {
+ unsigned int irq = table[i].irq;
+ disable_irq_nosync(irq);
+ set_irq_chip_and_handler_name(irq, &ipr_irq_chip,
+ handle_level_irq, "level");
+ set_irq_chip_data(irq, &table[i]);
enable_ipr_irq(irq);
+ }
}
+EXPORT_SYMBOL(make_ipr_irq);
-void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, int priority)
-{
- disable_irq_nosync(irq);
- ipr_data[irq].addr = addr;
- ipr_data[irq].shift = pos*4; /* POSition (0-3) x 4 means shift */
- ipr_data[irq].priority = priority;
-
- irq_desc[irq].chip = &ipr_irq_type;
- disable_ipr_irq(irq);
-}
-
-void __init init_IRQ(void)
-{
+static struct ipr_data sys_ipr_map[] = {
#ifndef CONFIG_CPU_SUBTYPE_SH7780
- make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY);
- make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY);
+ { TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY },
+ { TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY },
#ifdef RTC_IRQ
- make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY);
+ { RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY },
#endif
-
#ifdef SCI_ERI_IRQ
- make_ipr_irq(SCI_ERI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY);
- make_ipr_irq(SCI_RXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY);
- make_ipr_irq(SCI_TXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY);
+ { SCI_ERI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY },
+ { SCI_RXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY },
+ { SCI_TXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY },
#endif
-
#ifdef SCIF1_ERI_IRQ
- make_ipr_irq(SCIF1_ERI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
- make_ipr_irq(SCIF1_RXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
- make_ipr_irq(SCIF1_BRI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
- make_ipr_irq(SCIF1_TXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
+ { SCIF1_ERI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY },
+ { SCIF1_RXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY },
+ { SCIF1_BRI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY },
+ { SCIF1_TXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY },
#endif
-
#if defined(CONFIG_CPU_SUBTYPE_SH7300)
- make_ipr_irq(SCIF0_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY);
- make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
- make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
- make_ipr_irq(VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
+ { SCIF0_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY },
+ { DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
+ { DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
+ { VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
#endif
-
#ifdef SCIF_ERI_IRQ
- make_ipr_irq(SCIF_ERI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
- make_ipr_irq(SCIF_RXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
- make_ipr_irq(SCIF_BRI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
- make_ipr_irq(SCIF_TXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
+ { SCIF_ERI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY },
+ { SCIF_RXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY },
+ { SCIF_BRI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY },
+ { SCIF_TXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY },
#endif
-
#ifdef IRDA_ERI_IRQ
- make_ipr_irq(IRDA_ERI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
- make_ipr_irq(IRDA_RXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
- make_ipr_irq(IRDA_BRI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
- make_ipr_irq(IRDA_TXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
+ { IRDA_ERI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY },
+ { IRDA_RXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY },
+ { IRDA_BRI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY },
+ { IRDA_TXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY },
#endif
-
#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \
defined(CONFIG_CPU_SUBTYPE_SH7706) || \
defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705)
@@ -171,14 +111,19 @@ void __init init_IRQ(void)
* You should set corresponding bits of PFC to "00"
* to enable these interrupts.
*/
- make_ipr_irq(IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, IRQ0_PRIORITY);
- make_ipr_irq(IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY);
- make_ipr_irq(IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY);
- make_ipr_irq(IRQ3_IRQ, IRQ3_IPR_ADDR, IRQ3_IPR_POS, IRQ3_PRIORITY);
- make_ipr_irq(IRQ4_IRQ, IRQ4_IPR_ADDR, IRQ4_IPR_POS, IRQ4_PRIORITY);
- make_ipr_irq(IRQ5_IRQ, IRQ5_IPR_ADDR, IRQ5_IPR_POS, IRQ5_PRIORITY);
+ { IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, IRQ0_PRIORITY },
+ { IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY },
+ { IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY },
+ { IRQ3_IRQ, IRQ3_IPR_ADDR, IRQ3_IPR_POS, IRQ3_PRIORITY },
+ { IRQ4_IRQ, IRQ4_IPR_ADDR, IRQ4_IPR_POS, IRQ4_PRIORITY },
+ { IRQ5_IRQ, IRQ5_IPR_ADDR, IRQ5_IPR_POS, IRQ5_PRIORITY },
#endif
#endif
+};
+
+void __init init_IRQ(void)
+{
+ make_ipr_irq(sys_ipr_map, ARRAY_SIZE(sys_ipr_map));
#ifdef CONFIG_CPU_HAS_PINT_IRQ
init_IRQ_pint();
@@ -200,5 +145,3 @@ int ipr_irq_demux(int irq)
return irq;
}
#endif
-
-EXPORT_SYMBOL(make_ipr_irq);
diff --git a/arch/sh/kernel/cpu/irq/pint.c b/arch/sh/kernel/cpu/irq/pint.c
index 17f47b373d6..f60007783a2 100644
--- a/arch/sh/kernel/cpu/irq/pint.c
+++ b/arch/sh/kernel/cpu/irq/pint.c
@@ -84,12 +84,16 @@ void make_pint_irq(unsigned int irq)
disable_pint_irq(irq);
}
+static struct ipr_data pint_ipr_map[] = {
+ { PINT0_IRQ, PINT0_IPR_ADDR, PINT0_IPR_POS, PINT0_PRIORITY },
+ { PINT8_IRQ, PINT8_IPR_ADDR, PINT8_IPR_POS, PINT8_PRIORITY },
+};
+
void __init init_IRQ_pint(void)
{
int i;
- make_ipr_irq(PINT0_IRQ, PINT0_IPR_ADDR, PINT0_IPR_POS, PINT0_PRIORITY);
- make_ipr_irq(PINT8_IRQ, PINT8_IPR_ADDR, PINT8_IPR_POS, PINT8_PRIORITY);
+ make_ipr_irq(pint_ipr_map, ARRAY_SIZE(pint_ipr_map));
enable_irq(PINT0_IRQ);
enable_irq(PINT8_IRQ);
diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S
index 44daf44833f..ba3082d640b 100644
--- a/arch/sh/kernel/cpu/sh3/ex.S
+++ b/arch/sh/kernel/cpu/sh3/ex.S
@@ -4,7 +4,7 @@
* The SH-3 exception vector table.
* Copyright (C) 1999, 2000, 2002 Niibe Yutaka
- * Copyright (C) 2003 Paul Mundt
+ * Copyright (C) 2003 - 2006 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -49,198 +49,10 @@ ENTRY(nmi_slot)
#endif
ENTRY(user_break_point_trap)
.long break_point_trap /* 1E0 */
-ENTRY(interrupt_table)
- ! external hardware
- .long do_IRQ ! 0000 /* 200 */
- .long do_IRQ ! 0001
- .long do_IRQ ! 0010
- .long do_IRQ ! 0011
- .long do_IRQ ! 0100
- .long do_IRQ ! 0101
- .long do_IRQ ! 0110
- .long do_IRQ ! 0111
- .long do_IRQ ! 1000 /* 300 */
- .long do_IRQ ! 1001
- .long do_IRQ ! 1010
- .long do_IRQ ! 1011
- .long do_IRQ ! 1100
- .long do_IRQ ! 1101
- .long do_IRQ ! 1110
- .long exception_error
- ! Internal hardware
- .long do_IRQ ! TMU0 tuni0 /* 400 */
- .long do_IRQ ! TMU1 tuni1
- .long do_IRQ ! TMU2 tuni2
- .long do_IRQ ! ticpi2
- .long do_IRQ ! RTC ati
- .long do_IRQ ! pri
- .long do_IRQ ! cui
- .long do_IRQ ! SCI eri
- .long do_IRQ ! rxi /* 500 */
- .long do_IRQ ! txi
- .long do_IRQ ! tei
- .long do_IRQ ! WDT iti /* 560 */
- .long do_IRQ ! REF rcmi
- .long do_IRQ ! rovi
- .long do_IRQ
- .long do_IRQ /* 5E0 */
-#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
- defined(CONFIG_CPU_SUBTYPE_SH7709) || \
- defined(CONFIG_CPU_SUBTYPE_SH7706) || \
- defined(CONFIG_CPU_SUBTYPE_SH7300) || \
- defined(CONFIG_CPU_SUBTYPE_SH7705) || \
- defined(CONFIG_CPU_SUBTYPE_SH7710)
- .long do_IRQ ! 32 IRQ irq0 /* 600 */
- .long do_IRQ ! 33 irq1
- .long do_IRQ ! 34 irq2
- .long do_IRQ ! 35 irq3
- .long do_IRQ ! 36 irq4
- .long do_IRQ ! 37 irq5
- .long do_IRQ ! 38
- .long do_IRQ ! 39
- .long do_IRQ ! 40 PINT pint0-7 /* 700 */
- .long do_IRQ ! 41 pint8-15
- .long do_IRQ ! 42
- .long do_IRQ ! 43
- .long do_IRQ ! 44
- .long do_IRQ ! 45
- .long do_IRQ ! 46
- .long do_IRQ ! 47
- .long do_IRQ ! 48 DMAC dei0 /* 800 */
- .long do_IRQ ! 49 dei1
- .long do_IRQ ! 50 dei2
- .long do_IRQ ! 51 dei3
- .long do_IRQ ! 52 IrDA eri1
- .long do_IRQ ! 53 rxi1
- .long do_IRQ ! 54 bri1
- .long do_IRQ ! 55 txi1
- .long do_IRQ ! 56 SCIF eri2
- .long do_IRQ ! 57 rxi2
- .long do_IRQ ! 58 bri2
- .long do_IRQ ! 59 txi2
- .long do_IRQ ! 60 ADC adi /* 980 */
-#if defined(CONFIG_CPU_SUBTYPE_SH7705)
- .long exception_none ! 61 /* 9A0 */
- .long exception_none ! 62
- .long exception_none ! 63
- .long exception_none ! 64 /* A00 */
- .long do_IRQ ! 65 USB usi0
- .long do_IRQ ! 66 usi1
- .long exception_none ! 67
- .long exception_none ! 68
- .long exception_none ! 69
- .long exception_none ! 70
- .long exception_none ! 71
- .long exception_none ! 72 /* B00 */
- .long exception_none ! 73
- .long exception_none ! 74
- .long exception_none ! 75
- .long exception_none ! 76
- .long exception_none ! 77
- .long exception_none ! 78
- .long exception_none ! 79
- .long do_IRQ ! 80 TPU0 tpi0 /* C00 */
- .long do_IRQ ! 81 TPU1 tpi1
- .long exception_none ! 82
- .long exception_none ! 83
- .long do_IRQ ! 84 TPU2 tpi2
- .long do_IRQ ! 85 TPU3 tpi3 /* CA0 */
-#endif
-#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7300)
- .long do_IRQ ! 61 LCDC lcdi /* 9A0 */
- .long do_IRQ ! 62 PCC pcc0i
- .long do_IRQ ! 63 pcc1i /* 9E0 */
-#endif
-#if defined(CONFIG_CPU_SUBTYPE_SH7710)
- .long exception_none ! 61 /* 9A0 */
- .long exception_none ! 62
- .long exception_none ! 63
- .long exception_none ! 64 /* A00 */
- .long exception_none ! 65
- .long exception_none ! 66
- .long exception_none ! 67
- .long exception_none ! 68
- .long exception_none ! 69
- .long exception_none ! 70
- .long exception_none ! 71
- .long exception_none ! 72 /* B00 */
- .long exception_none ! 73
- .long exception_none ! 74
- .long exception_none ! 75
- .long do_IRQ ! 76 DMAC2 dei4 /* B80 */
- .long do_IRQ ! 77 DMAC2 dei5
- .long exception_none ! 78
- .long do_IRQ ! 79 IPSEC ipseci /* BE0 */
- .long do_IRQ ! 80 EDMAC eint0 /* C00 */
- .long do_IRQ ! 81 EDMAC eint1
- .long do_IRQ ! 82 EDMAC eint2
- .long exception_none ! 83 /* C60 */
- .long exception_none ! 84
- .long exception_none ! 85
- .long exception_none ! 86
- .long exception_none ! 87
- .long exception_none ! 88 /* D00 */
- .long exception_none ! 89
- .long exception_none ! 90
- .long exception_none ! 91
- .long exception_none ! 92
- .long exception_none ! 93
- .long exception_none ! 94
- .long exception_none ! 95
- .long do_IRQ ! 96 SIOF eri0 /* E00 */
- .long do_IRQ ! 97 txi0
- .long do_IRQ ! 98 rxi0
- .long do_IRQ ! 99 cci0
- .long do_IRQ ! 100 eri1 /* E80 */
- .long do_IRQ ! 101 txi1
- .long do_IRQ ! 102 rxi2
- .long do_IRQ ! 103 cci3
-#endif
-#if defined(CONFIG_CPU_SUBTYPE_SH7300)
- .long do_IRQ ! 64
- .long do_IRQ ! 65
- .long do_IRQ ! 66
- .long do_IRQ ! 67
- .long do_IRQ ! 68
- .long do_IRQ ! 69
- .long do_IRQ ! 70
- .long do_IRQ ! 71
- .long do_IRQ ! 72
- .long do_IRQ ! 73
- .long do_IRQ ! 74
- .long do_IRQ ! 75
- .long do_IRQ ! 76
- .long do_IRQ ! 77
- .long do_IRQ ! 78
- .long do_IRQ ! 79
- .long do_IRQ ! 80 SCIF0(SH7300)
- .long do_IRQ ! 81
- .long do_IRQ ! 82
- .long do_IRQ ! 83
- .long do_IRQ ! 84
- .long do_IRQ ! 85
- .long do_IRQ ! 86
- .long do_IRQ ! 87
- .long do_IRQ ! 88
- .long do_IRQ ! 89
- .long do_IRQ ! 90
- .long do_IRQ ! 91
- .long do_IRQ ! 92
- .long do_IRQ ! 93
- .long do_IRQ ! 94
- .long do_IRQ ! 95
- .long do_IRQ ! 96
- .long do_IRQ ! 97
- .long do_IRQ ! 98
- .long do_IRQ ! 99
- .long do_IRQ ! 100
- .long do_IRQ ! 101
- .long do_IRQ ! 102
- .long do_IRQ ! 103
- .long do_IRQ ! 104
- .long do_IRQ ! 105
- .long do_IRQ ! 106
- .long do_IRQ ! 107
- .long do_IRQ ! 108
-#endif
-#endif
+
+ /*
+ * Pad the remainder of the table out, exceptions residing in far
+ * away offsets can be manually inserted in to their appropriate
+ * location via set_exception_table_{evt,vec}().
+ */
+ .balign 4096,0,4096
diff --git a/arch/sh/kernel/cpu/sh4/ex.S b/arch/sh/kernel/cpu/sh4/ex.S
index 7146893a6cc..ac8ab57413c 100644
--- a/arch/sh/kernel/cpu/sh4/ex.S
+++ b/arch/sh/kernel/cpu/sh4/ex.S
@@ -4,7 +4,7 @@
* The SH-4 exception vector table.
* Copyright (C) 1999, 2000, 2002 Niibe Yutaka
- * Copyright (C) 2003 Paul Mundt
+ * Copyright (C) 2003 - 2006 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -53,503 +53,10 @@ ENTRY(nmi_slot)
#endif
ENTRY(user_break_point_trap)
.long break_point_trap /* 1E0 */
-ENTRY(interrupt_table)
- ! external hardware
- .long do_IRQ ! 0000 /* 200 */
- .long do_IRQ ! 0001
- .long do_IRQ ! 0010
- .long do_IRQ ! 0011
- .long do_IRQ ! 0100
- .long do_IRQ ! 0101
- .long do_IRQ ! 0110
- .long do_IRQ ! 0111
- .long do_IRQ ! 1000 /* 300 */
- .long do_IRQ ! 1001
- .long do_IRQ ! 1010
- .long do_IRQ ! 1011
- .long do_IRQ ! 1100
- .long do_IRQ ! 1101
- .long do_IRQ ! 1110
- .long exception_error
- ! Internal hardware
-#ifndef CONFIG_CPU_SUBTYPE_SH7780
- .long do_IRQ ! TMU0 tuni0 /* 400 */
- .long do_IRQ ! TMU1 tuni1
- .long do_IRQ ! TMU2 tuni2
- .long do_IRQ ! ticpi2
-#if defined(CONFIG_CPU_SUBTYPE_SH7760)
- .long exception_error
- .long exception_error
- .long exception_error
- .long exception_error
- .long exception_error /* 500 */
- .long exception_error
- .long exception_error
-#else
- .long do_IRQ ! RTC ati
- .long do_IRQ ! pri
- .long do_IRQ ! cui
- .long do_IRQ ! SCI eri
- .long do_IRQ ! rxi /* 500 */
- .long do_IRQ ! txi
- .long do_IRQ ! tei
-#endif
- .long do_IRQ ! WDT iti /* 560 */
- .long do_IRQ ! REF rcmi
- .long do_IRQ ! rovi
- .long do_IRQ
- .long do_IRQ /* 5E0 */
- .long do_IRQ ! 32 Hitachi UDI /* 600 */
- .long do_IRQ ! 33 GPIO
- .long do_IRQ ! 34 DMAC dmte0
- .long do_IRQ ! 35 dmte1
- .long do_IRQ ! 36 dmte2
- .long do_IRQ ! 37 dmte3
- .long do_IRQ ! 38 dmae
- .long exception_error ! 39 /* 6E0 */
-#if defined(CONFIG_CPU_SUBTYPE_SH7760)
- .long exception_error /* 700 */
- .long exception_error
- .long exception_error
- .long exception_error /* 760 */
-#else
- .long do_IRQ ! 40 SCIF eri /* 700 */
- .long do_IRQ ! 41 rxi
- .long do_IRQ ! 42 bri
- .long do_IRQ ! 43 txi
-#endif
-#if CONFIG_NR_ONCHIP_DMA_CHANNELS == 8
- .long do_IRQ ! 44 DMAC dmte4 /* 780 */
- .long do_IRQ ! 45 dmte5
- .long do_IRQ ! 46 dmte6
- .long do_IRQ ! 47 dmte7 /* 7E0 */
-#elif defined(CONFIG_CPU_SUBTYPE_SH7343)
- .long do_IRQ ! 44 IIC1 ali /* 780 */
- .long do_IRQ ! 45 tacki
- .long do_IRQ ! 46 waiti
- .long do_IRQ ! 47 dtei /* 7E0 */
- .long do_IRQ ! 48 DMAC dei0 /* 800 */
- .long do_IRQ ! 49 dei1 /* 820 */
-#else
- .long exception_error ! 44 /* 780 */
- .long exception_error ! 45
- .long exception_error ! 46
- .long exception_error ! 47
-#endif
-#if defined(CONFIG_SH_FPU)
- .long do_fpu_state_restore ! 48 /* 800 */
- .long do_fpu_state_restore ! 49 /* 820 */
-#elif !defined(CONFIG_CPU_SUBTYPE_SH7343) && \
- !defined(CONFIG_CPU_SUBTYPE_SH73180)
- .long exception_error
- .long exception_error
-#endif
-#if defined(CONFIG_CPU_SUBTYPE_SH7751)
- .long exception_error /* 840 */
- .long exception_error
- .long exception_error
- .long exception_error
- .long exception_error
- .long exception_error
- .long exception_error /* 900 */
- .long exception_error
- .long exception_error
- .long exception_error
- .long exception_error
- .long exception_error
- .long exception_error
- .long exception_error
- .long do_IRQ ! PCI serr /* A00 */
- .long do_IRQ ! dma3
- .long do_IRQ ! dma2
- .long do_IRQ ! dma1
- .long do_IRQ ! dma0
- .long do_IRQ ! pwon
- .long do_IRQ ! pwdwn
- .long do_IRQ ! err
- .long do_IRQ ! TMU3 tuni3 /* B00 */
- .long exception_error
- .long exception_error
- .long exception_error
- .long do_IRQ ! TMU4 tuni4 /* B80 */
-#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
- .long do_IRQ ! IRQ irq6 /* 840 */
- .long do_IRQ ! irq7
- .long do_IRQ ! SCIF eri0
- .long do_IRQ ! rxi0
- .long do_IRQ ! bri0
- .long do_IRQ ! txi0
- .long do_IRQ ! HCAN2 cani0 /* 900 */
- .long do_IRQ ! cani1
- .long do_IRQ ! SSI ssii0
- .long do_IRQ ! ssii1
- .long do_IRQ ! HAC haci0
- .long do_IRQ ! haci1
- .long do_IRQ ! IIC iici0
- .long do_IRQ ! iici1
- .long do_IRQ ! USB usbi /* A00 */
- .long do_IRQ ! LCDC vint
- .long exception_error
- .long exception_error
- .long do_IRQ ! DMABRG dmabrgi0
- .long do_IRQ ! dmabrgi1
- .long do_IRQ ! dmabrgi2
- .long exception_error
- .long do_IRQ ! SCIF eri1 /* B00 */
- .long do_IRQ ! rxi1
- .long do_IRQ ! bri1
- .long do_IRQ ! txi1
- .long do_IRQ ! eri2
- .long do_IRQ ! rxi2
- .long do_IRQ ! bri2
- .long do_IRQ ! txi2
- .long do_IRQ ! SIM simeri /* C00 */
- .long do_IRQ ! simrxi
- .long do_IRQ ! simtxi
- .long do_IRQ ! simtei
- .long do_IRQ ! HSPI spii
- .long exception_error
- .long exception_error
- .long exception_error
- .long do_IRQ ! MMCIF mmci0 /* D00 */
- .long do_IRQ ! mmci1
- .long do_IRQ ! mmci2
- .long do_IRQ ! mmci3
- .long exception_error
- .long exception_error
- .long exception_error
- .long exception_error
- .long exception_error /* E00 */
- .long exception_error
- .long exception_error
- .long exception_error
- .long do_IRQ ! MFI mfii
- .long exception_error
- .long exception_error
- .long exception_error
- .long exception_error /* F00 */
- .long exception_error
- .long exception_error
- .long exception_error
- .long do_IRQ ! ADC adi
- .long do_IRQ ! CMT cmti /* FA0 */
-#elif defined(CONFIG_CPU_SUBTYPE_SH73180) || defined(CONFIG_CPU_SUBTYPE_SH7343)
- .long do_IRQ ! 50 0x840
- .long do_IRQ ! 51 0x860
- .long do_IRQ ! 52 0x880
- .long do_IRQ ! 53 0x8a0
- .long do_IRQ ! 54 0x8c0
- .long do_IRQ ! 55 0x8e0
- .long do_IRQ ! 56 0x900
- .long do_IRQ ! 57 0x920
- .long do_IRQ ! 58 0x940
- .long do_IRQ ! 59 0x960
- .long do_IRQ ! 60 0x980
- .long do_IRQ ! 61 0x9a0
- .long do_IRQ ! 62 0x9c0
- .long do_IRQ ! 63 0x9e0
- .long do_IRQ ! 64 0xa00
- .long do_IRQ ! 65 0xa20
- .long do_IRQ ! 66 0xa40
- .long do_IRQ ! 67 0xa60
- .long do_IRQ ! 68 0xa80
- .long do_IRQ ! 69 0xaa0
- .long do_IRQ ! 70 0xac0
- .long do_IRQ ! 71 0xae0
- .long do_IRQ ! 72 0xb00
- .long do_IRQ ! 73 0xb20
- .long do_IRQ ! 74 0xb40
- .long do_IRQ ! 75 0xb60
- .long do_IRQ ! 76 0xb80
- .long do_IRQ ! 77 0xba0
- .long do_IRQ ! 78 0xbc0
- .long do_IRQ ! 79 0xbe0
- .long do_IRQ ! 80 0xc00
- .long do_IRQ ! 81 0xc20
- .long do_IRQ ! 82 0xc40
- .long do_IRQ ! 83 0xc60
- .long do_IRQ ! 84 0xc80
- .long do_IRQ ! 85 0xca0
- .long do_IRQ ! 86 0xcc0
- .long do_IRQ ! 87 0xce0
- .long do_IRQ ! 88 0xd00
- .long do_IRQ ! 89 0xd20
- .long do_IRQ ! 90 0xd40
- .long do_IRQ ! 91 0xd60
- .long do_IRQ ! 92 0xd80
- .long do_IRQ ! 93 0xda0
- .long do_IRQ ! 94 0xdc0
- .long do_IRQ ! 95 0xde0
- .long do_IRQ ! 96 0xe00
- .long do_IRQ ! 97 0xe20
- .long do_IRQ ! 98 0xe40
- .long do_IRQ ! 99 0xe60
- .long do_IRQ ! 100 0xe80
- .long do_IRQ ! 101 0xea0
- .long do_IRQ ! 102 0xec0
- .long do_IRQ ! 103 0xee0
- .long do_IRQ ! 104 0xf00
- .long do_IRQ ! 105 0xf20
- .long do_IRQ ! 106 0xf40
- .long do_IRQ ! 107 0xf60
- .long do_IRQ ! 108 0xf80
-#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1)
- .long exception_error ! 50 0x840
- .long exception_error ! 51 0x860
- .long exception_error ! 52 0x880
- .long exception_error ! 53 0x8a0
- .long exception_error ! 54 0x8c0
- .long exception_error ! 55 0x8e0
- .long exception_error ! 56 0x900
- .long exception_error ! 57 0x920
- .long exception_error ! 58 0x940
- .long exception_error ! 59 0x960
- .long exception_error ! 60 0x980
- .long exception_error ! 61 0x9a0
- .long exception_error ! 62 0x9c0
- .long exception_error ! 63 0x9e0
- .long do_IRQ ! 64 0xa00 PCI serr
- .long do_IRQ ! 65 0xa20 err
- .long do_IRQ ! 66 0xa40 ad
- .long do_IRQ ! 67 0xa60 pwr_dwn
- .long exception_error ! 68 0xa80
- .long exception_error ! 69 0xaa0
- .long exception_error ! 70 0xac0
- .long exception_error ! 71 0xae0
- .long do_IRQ ! 72 0xb00 DMA INT0
- .long do_IRQ ! 73 0xb20 INT1
- .long do_IRQ ! 74 0xb40 INT2
- .long do_IRQ ! 75 0xb60 INT3
- .long do_IRQ ! 76 0xb80 INT4
- .long exception_error ! 77 0xba0
- .long do_IRQ ! 78 0xbc0 DMA ERR
- .long exception_error ! 79 0xbe0
- .long do_IRQ ! 80 0xc00 PIO0
- .long do_IRQ ! 81 0xc20 PIO1
- .long do_IRQ ! 82 0xc40 PIO2
- .long exception_error ! 83 0xc60
- .long exception_error ! 84 0xc80
- .long exception_error ! 85 0xca0
- .long exception_error ! 86 0xcc0
- .long exception_error ! 87 0xce0
- .long exception_error ! 88 0xd00
- .long exception_error ! 89 0xd20
- .long exception_error ! 90 0xd40
- .long exception_error ! 91 0xd60
- .long exception_error ! 92 0xd80
- .long exception_error ! 93 0xda0
- .long exception_error ! 94 0xdc0
- .long exception_error ! 95 0xde0
- .long exception_error ! 96 0xe00
- .long exception_error ! 97 0xe20
- .long exception_error ! 98 0xe40
- .long exception_error ! 99 0xe60
- .long exception_error ! 100 0xe80
- .long exception_error ! 101 0xea0
- .long exception_error ! 102 0xec0
- .long exception_error ! 103 0xee0
- .long exception_error ! 104 0xf00
- .long exception_error ! 105 0xf20
- .long exception_error ! 106 0xf40
- .long exception_error ! 107 0xf60
- .long exception_error ! 108 0xf80
- .long exception_error ! 109 0xfa0
- .long exception_error ! 110 0xfc0
- .long exception_error ! 111 0xfe0
- .long do_IRQ ! 112 0x1000 Mailbox
- .long exception_error ! 113 0x1020
- .long exception_error ! 114 0x1040
- .long exception_error ! 115 0x1060
- .long exception_error ! 116 0x1080
- .long exception_error ! 117 0x10a0
- .long exception_error ! 118 0x10c0
- .long exception_error ! 119 0x10e0
- .long exception_error ! 120 0x1100
- .long exception_error ! 121 0x1120
- .long exception_error ! 122 0x1140
- .long exception_error ! 123 0x1160
- .long exception_error ! 124 0x1180
- .long exception_error ! 125 0x11a0
- .long exception_error ! 126 0x11c0
- .long exception_error ! 127 0x11e0
- .long exception_error ! 128 0x1200
- .long exception_error ! 129 0x1220
- .long exception_error ! 130 0x1240
- .long exception_error ! 131 0x1260
- .long exception_error ! 132 0x1280
- .long exception_error ! 133 0x12a0
- .long exception_error ! 134 0x12c0
- .long exception_error ! 135 0x12e0
- .long exception_error ! 136 0x1300
- .long exception_error ! 137 0x1320
- .long exception_error ! 138 0x1340
- .long exception_error ! 139 0x1360
- .long do_IRQ ! 140 0x1380 EMPI INV_ADDR
- .long exception_error ! 141 0x13a0
- .long exception_error ! 142 0x13c0
- .long exception_error ! 143 0x13e0
-#elif defined(CONFIG_CPU_SUBTYPE_SH7770)
- .long do_IRQ ! 50 0x840
- .long do_IRQ ! 51 0x860
- .long do_IRQ ! 52 0x880
- .long do_IRQ ! 53 0x8a0
- .long do_IRQ ! 54 0x8c0
- .long do_IRQ ! 55 0x8e0
- .long do_IRQ ! 56 0x900
- .long do_IRQ ! 57 0x920
- .long do_IRQ ! 58 0x940
- .long do_IRQ ! 59 0x960
- .long do_IRQ ! 60 0x980
- .long do_IRQ ! 61 0x9a0
- .long do_IRQ ! 62 0x9c0
- .long do_IRQ ! 63 0x9e0
- .long do_IRQ ! 64 0xa00
- .long do_IRQ ! 65 0xa20
- .long do_IRQ ! 66 0xa4d
- .long do_IRQ ! 67 0xa60
- .long do_IRQ ! 68 0xa80
- .long do_IRQ ! 69 0xaa0
- .long do_IRQ ! 70 0xac0
- .long do_IRQ ! 71 0xae0
- .long do_IRQ ! 72 0xb00
- .long do_IRQ ! 73 0xb20
- .long do_IRQ ! 74 0xb40
- .long do_IRQ ! 75 0xb60
- .long do_IRQ ! 76 0xb80
- .long do_IRQ ! 77 0xba0
- .long do_IRQ ! 78 0xbc0
- .long do_IRQ ! 79 0xbe0
- .long do_IRQ ! 80 0xc00
- .long do_IRQ ! 81 0xc20
- .long do_IRQ ! 82 0xc40
- .long do_IRQ ! 83 0xc60
- .long do_IRQ ! 84 0xc80
- .long do_IRQ ! 85 0xca0
- .long do_IRQ ! 86 0xcc0
- .long do_IRQ ! 87 0xce0
- .long do_IRQ ! 88 0xd00
- .long do_IRQ ! 89 0xd20
- .long do_IRQ ! 90 0xd40
- .long do_IRQ ! 91 0xd60
- .long do_IRQ ! 92 0xd80
- .long do_IRQ ! 93 0xda0
- .long do_IRQ ! 94 0xdc0
- .long do_IRQ ! 95 0xde0
- .long do_IRQ ! 96 0xe00
- .long do_IRQ ! 97 0xe20
- .long do_IRQ ! 98 0xe40
- .long do_IRQ ! 99 0xe60
- .long do_IRQ ! 100 0xe80
- .long do_IRQ ! 101 0xea0
- .long do_IRQ ! 102 0xec0
- .long do_IRQ ! 103 0xee0
- .long do_IRQ ! 104 0xf00
- .long do_IRQ ! 105 0xf20
- .long do_IRQ ! 106 0xf40
- .long do_IRQ ! 107 0xf60
- .long do_IRQ ! 108 0xf80
-#endif
-#else
- .long exception_error /* 400 */
- .long exception_error
- .long exception_error
- .long exception_error
- .long do_IRQ ! RTC ati
- .long do_IRQ ! pri
- .long do_IRQ ! cui
- .long exception_error
- .long exception_error /* 500 */
- .long exception_error
- .long exception_error
- .long do_IRQ ! WDT iti /* 560 */
- .long do_IRQ ! TMU-ch0
- .long do_IRQ ! TMU-ch1
- .long do_IRQ ! TMU-ch2
- .long do_IRQ ! ticpi2 /* 5E0 */
- .long do_IRQ ! 32 Hitachi UDI /* 600 */
- .long exception_error
- .long do_IRQ ! 34 DMAC dmte0
- .long do_IRQ ! 35 dmte1
- .long do_IRQ ! 36 dmte2
- .long do_IRQ ! 37 dmte3
- .long do_IRQ ! 38 dmae
- .long exception_error ! 39 /* 6E0 */
- .long do_IRQ ! 40 SCIF-ch0 eri /* 700 */
- .long do_IRQ ! 41 rxi
- .long do_IRQ ! 42 bri
- .long do_IRQ ! 43 txi
- .long do_IRQ ! 44 DMAC dmte4 /* 780 */
- .long do_IRQ ! 45 dmte5
- .long do_IRQ ! 46 dmte6
- .long do_IRQ ! 47 dmte7 /* 7E0 */
-#if defined(CONFIG_SH_FPU)
- .long do_fpu_state_restore ! 48 /* 800 */
- .long do_fpu_state_restore ! 49 /* 820 */
-#else
- .long exception_error
- .long exception_error
-#endif
- .long exception_error /* 840 */
- .long exception_error
- .long exception_error
- .long exception_error
- .long exception_error
- .long exception_error
- .long do_IRQ ! 56 CMT /* 900 */
- .long exception_error
- .long exception_error
- .long exception_error
- .long do_IRQ ! 60 HAC
- .long exception_error
- .long exception_error
- .long exception_error
- .long do_IRQ ! PCI serr /* A00 */
- .long do_IRQ ! INTA
- .long do_IRQ ! INTB
- .long do_IRQ ! INTC
- .long do_IRQ ! INTD
- .long do_IRQ ! err
- .long do_IRQ ! pwd3
- .long do_IRQ ! pwd2
- .long do_IRQ ! pwd1 /* B00 */
- .long do_IRQ ! pwd0
- .long exception_error
- .long exception_error
- .long do_IRQ ! SCIF-ch1 eri /* B80 */
- .long do_IRQ ! rxi
- .long do_IRQ ! bri
- .long do_IRQ ! txi
- .long do_IRQ ! SIOF /* C00 */
- .long exception_error
- .long exception_error
- .long exception_error
- .long do_IRQ ! HSPI /* C80 */
- .long exception_error
- .long exception_error
- .long exception_error
- .long do_IRQ ! MMCIF fatat /* D00 */
- .long do_IRQ ! tran
- .long do_IRQ ! err
- .long do_IRQ ! frdy
- .long do_IRQ ! DMAC dmint8 /* D80 */
- .long do_IRQ ! dmint9
- .long do_IRQ ! dmint10
- .long do_IRQ ! dmint11
- .long do_IRQ ! TMU-ch3 /* E00 */
- .long do_IRQ ! TMU-ch4
- .long do_IRQ ! TMU-ch5
- .long exception_error
- .long do_IRQ ! SSI
- .long exception_error
- .long exception_error
- .long exception_error
- .long do_IRQ ! FLCTL flste /* F00 */
- .long do_IRQ ! fltend
- .long do_IRQ ! fltrq0
- .long do_IRQ ! fltrq1
- .long do_IRQ ! GPIO gpioi0 /* F80 */
- .long do_IRQ ! gpioi1
- .long do_IRQ ! gpioi2
- .long do_IRQ ! gpioi3
-#endif
+ /*
+ * Pad the remainder of the table out, exceptions residing in far
+ * away offsets can be manually inserted in to their appropriate
+ * location via set_exception_table_{evt,vec}().
+ */
+ .balign 4096,0,4096
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index 97f1c9af35d..07e5377bf55 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -51,3 +51,66 @@ static int __init sh7760_devices_setup(void)
ARRAY_SIZE(sh7760_devices));
}
__initcall(sh7760_devices_setup);
+
+/*
+ * SH7760 INTC2-Style interrupts, vectors IRQ48-111 INTEVT 0x800-0xFE0
+ */
+static struct intc2_data intc2_irq_table[] = {
+ /* INTPRIO0 | INTMSK0 */
+ {48, 0, 28, 0, 31, 3}, /* IRQ 4 */
+ {49, 0, 24, 0, 30, 3}, /* IRQ 3 */
+ {50, 0, 20, 0, 29, 3}, /* IRQ 2 */
+ {51, 0, 16, 0, 28, 3}, /* IRQ 1 */
+ /* 52-55 (INTEVT 0x880-0x8E0) unused/reserved */
+ /* INTPRIO4 | INTMSK0 */
+ {56, 4, 28, 0, 25, 3}, /* HCAN2_CHAN0 */
+ {57, 4, 24, 0, 24, 3}, /* HCAN2_CHAN1 */
+ {58, 4, 20, 0, 23, 3}, /* I2S_CHAN0 */
+ {59, 4, 16, 0, 22, 3}, /* I2S_CHAN1 */
+ {60, 4, 12, 0, 21, 3}, /* AC97_CHAN0 */
+ {61, 4, 8, 0, 20, 3}, /* AC97_CHAN1 */
+ {62, 4, 4, 0, 19, 3}, /* I2C_CHAN0 */
+ {63, 4, 0, 0, 18, 3}, /* I2C_CHAN1 */
+ /* INTPRIO8 | INTMSK0 */
+ {52, 8, 16, 0, 11, 3}, /* SCIF0_ERI_IRQ */
+ {53, 8, 16, 0, 10, 3}, /* SCIF0_RXI_IRQ */
+ {54, 8, 16, 0, 9, 3}, /* SCIF0_BRI_IRQ */
+ {55, 8, 16, 0, 8, 3}, /* SCIF0_TXI_IRQ */
+ {64, 8, 28, 0, 17, 3}, /* USBHI_IRQ */
+ {65, 8, 24, 0, 16, 3}, /* LCDC */
+ /* 66, 67 unused */
+ {68, 8, 20, 0, 14, 13}, /* DMABRGI0_IRQ */
+ {69, 8, 20, 0, 13, 13}, /* DMABRGI1_IRQ */
+ {70, 8, 20, 0, 12, 13}, /* DMABRGI2_IRQ */
+ /* 71 unused */
+ {72, 8, 12, 0, 7, 3}, /* SCIF1_ERI_IRQ */
+ {73, 8, 12, 0, 6, 3}, /* SCIF1_RXI_IRQ */
+ {74, 8, 12, 0, 5, 3}, /* SCIF1_BRI_IRQ */
+ {75, 8, 12, 0, 4, 3}, /* SCIF1_TXI_IRQ */
+ {76, 8, 8, 0, 3, 3}, /* SCIF2_ERI_IRQ */
+ {77, 8, 8, 0, 2, 3}, /* SCIF2_RXI_IRQ */
+ {78, 8, 8, 0, 1, 3}, /* SCIF2_BRI_IRQ */
+ {79, 8, 8, 0, 0, 3}, /* SCIF2_TXI_IRQ */
+ /* | INTMSK4 */
+ {80, 8, 4, 4, 23, 3}, /* SIM_ERI */
+ {81, 8, 4, 4, 22, 3}, /* SIM_RXI */
+ {82, 8, 4, 4, 21, 3}, /* SIM_TXI */
+ {83, 8, 4, 4, 20, 3}, /* SIM_TEI */
+ {84, 8, 0, 4, 19, 3}, /* HSPII */
+ /* INTPRIOC | INTMSK4 */
+ /* 85-87 unused/reserved */
+ {88, 12, 20, 4, 18, 3}, /* MMCI0 */
+ {89, 12, 20, 4, 17, 3}, /* MMCI1 */
+ {90, 12, 20, 4, 16, 3}, /* MMCI2 */
+ {91, 12, 20, 4, 15, 3}, /* MMCI3 */
+ {92, 12, 12, 4, 6, 3}, /* MFI (unsure, bug? in my 7760 manual*/
+ /* 93-107 reserved/undocumented */
+ {108,12, 4, 4, 1, 3}, /* ADC */
+ {109,12, 0, 4, 0, 3}, /* CMTI */
+ /* 110-111 reserved/unused */
+};
+
+void __init init_IRQ_intc2(void)
+{
+ make_intc2_irq(intc2_irq_table, ARRAY_SIZE(intc2_irq_table));
+}
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7780.c b/arch/sh/kernel/cpu/sh4/setup-sh7780.c
index 72493f259ed..814ddb22653 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7780.c
@@ -77,3 +77,30 @@ static int __init sh7780_devices_setup(void)
ARRAY_SIZE(sh7780_devices));
}
__initcall(sh7780_devices_setup);
+
+static struct intc2_data intc2_irq_table[] = {
+ { TIMER_IRQ, 0, 24, 0, INTC_TMU0_MSK, 2 },
+ { 21, 1, 0, 0, INTC_RTC_MSK, TIMER_PRIORITY },
+ { 22, 1, 1, 0, INTC_RTC_MSK, TIMER_PRIORITY },
+ { 23, 1, 2, 0, INTC_RTC_MSK, TIMER_PRIORITY },
+ { SCIF0_ERI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
+ { SCIF0_RXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
+ { SCIF0_BRI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
+ { SCIF0_TXI_IRQ, 8, 24, 0, INTC_SCIF0_MSK, SCIF0_PRIORITY },
+
+ { SCIF1_ERI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
+ { SCIF1_RXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
+ { SCIF1_BRI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
+ { SCIF1_TXI_IRQ, 8, 16, 0, INTC_SCIF1_MSK, SCIF1_PRIORITY },
+
+ { PCIC0_IRQ, 0x10, 8, 0, INTC_PCIC0_MSK, PCIC0_PRIORITY },
+ { PCIC1_IRQ, 0x10, 0, 0, INTC_PCIC1_MSK, PCIC1_PRIORITY },
+ { PCIC2_IRQ, 0x14, 24, 0, INTC_PCIC2_MSK, PCIC2_PRIORITY },
+ { PCIC3_IRQ, 0x14, 16, 0, INTC_PCIC3_MSK, PCIC3_PRIORITY },
+ { PCIC4_IRQ, 0x14, 8, 0, INTC_PCIC4_MSK, PCIC4_PRIORITY },
+};
+
+void __init init_IRQ_intc2(void)
+{
+ make_intc2_irq(intc2_irq_table, ARRAY_SIZE(intc2_irq_table));
+}
diff --git a/arch/sh/kernel/entry.S b/arch/sh/kernel/entry.S
index 97c571fbcdf..39aaefb2d83 100644
--- a/arch/sh/kernel/entry.S
+++ b/arch/sh/kernel/entry.S
@@ -1,9 +1,8 @@
-/* $Id: entry.S,v 1.37 2004/06/11 13:02:46 doyu Exp $
- *
+/*
* linux/arch/sh/entry.S
*
* Copyright (C) 1999, 2000, 2002 Niibe Yutaka
- * Copyright (C) 2003 Paul Mundt
+ * Copyright (C) 2003 - 2006 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -78,7 +77,6 @@ OFF_TRA = (16*4+6*4)
#define k3 r3
#define k4 r4
-#define k_ex_code r2_bank /* r2_bank1 */
#define g_imask r6 /* r6_bank1 */
#define k_g_imask r6_bank /* r6_bank1 */
#define current r7 /* r7_bank1 */
@@ -691,7 +689,7 @@ interrupt:
0:
#endif /* defined(CONFIG_KGDB_NMI) */
bra handle_exception
- mov.l @k2, k2
+ mov #-1, k2 ! interrupt exception marker
.align 2
1: .long EXPEVT
@@ -717,8 +715,7 @@ ENTRY(handle_exception)
add current, k1
mov k1, r15 ! change to kernel stack
!
-1: mov #-1, k4
- mov.l 2f, k1
+1: mov.l 2f, k1
!
#ifdef CONFIG_SH_DSP
mov.l r2, @-r15 ! Save r2, we need another reg
@@ -763,6 +760,8 @@ skip_save:
#endif
! Save the user registers on the stack.
mov.l k2, @-r15 ! EXPEVT
+
+ mov #-1, k4
mov.l k4, @-r15 ! set TRA (default: -1)
!
sts.l macl, @-r15
@@ -797,8 +796,21 @@ skip_save:
mov.l r2, @-r15
mov.l r1, @-r15
mov.l r0, @-r15
- ! Then, dispatch to the handler, according to the exception code.
- stc k_ex_code, r8
+
+ /*
+ * This gets a bit tricky.. in the INTEVT case we don't want to use
+ * the VBR offset as a destination in the jump call table, since all
+ * of the destinations are the same. In this case, (interrupt) sets
+ * a marker in r2 (now r2_bank since SR.RB changed), which we check
+ * to determine the exception type. For all other exceptions, we
+ * forcibly read EXPEVT from memory and fix up the jump address, in
+ * the interrupt exception case we jump to do_IRQ() and defer the
+ * INTEVT read until there. As a bonus, we can also clean up the SR.RB
+ * checks that do_IRQ() was doing..
+ */
+ stc r2_bank, r8
+ cmp/pz r8
+ bf interrupt_exception
shlr2 r8
shlr r8
mov.l 4f, r9
@@ -806,6 +818,8 @@ skip_save:
mov.l @r9, r9
jmp @r9
nop
+ rts
+ nop
.align 2
1: .long 0x00001000 ! DSP=1
@@ -813,8 +827,17 @@ skip_save:
3: .long 0xcfffffff ! RB=0, BL=0
4: .long exception_handling_table
+interrupt_exception:
+ mov.l 1f, r9
+ jmp @r9
+ nop
+ rts
+ nop
+
+ .align 2
+1: .long do_IRQ
+
.align 2
ENTRY(exception_none)
rts
nop
-
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index c7ebd6aec95..944128ce970 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -11,12 +11,15 @@
#include <linux/module.h>
#include <linux/kernel_stat.h>
#include <linux/seq_file.h>
+#include <linux/io.h>
#include <asm/irq.h>
#include <asm/processor.h>
#include <asm/uaccess.h>
#include <asm/thread_info.h>
#include <asm/cpu/mmu_context.h>
+atomic_t irq_err_count;
+
/*
* 'what should we do if we get a hw irq event on an illegal vector'.
* each architecture has to answer this themselves, it doesn't deserve
@@ -24,6 +27,7 @@
*/
void ack_bad_irq(unsigned int irq)
{
+ atomic_inc(&irq_err_count);
printk("unexpected IRQ trap at vector %02x\n", irq);
}
@@ -47,8 +51,10 @@ int show_interrupts(struct seq_file *p, void *v)
if (!action)
goto unlock;
seq_printf(p, "%3d: ",i);
- seq_printf(p, "%10u ", kstat_irqs(i));
- seq_printf(p, " %14s", irq_desc[i].chip->typename);
+ for_each_online_cpu(j)
+ seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+ seq_printf(p, " %14s", irq_desc[i].chip->name);
+ seq_printf(p, "-%-8s", irq_desc[i].name);
seq_printf(p, " %s", action->name);
for (action=action->next; action; action = action->next)
@@ -56,7 +62,9 @@ int show_interrupts(struct seq_file *p, void *v)
seq_putc(p, '\n');
unlock:
spin_unlock_irqrestore(&irq_desc[i].lock, flags);
- }
+ } else if (i == NR_IRQS)
+ seq_printf(p, "Err: %10u\n", atomic_read(&irq_err_count));
+
return 0;
}
#endif
@@ -78,7 +86,8 @@ asmlinkage int do_IRQ(unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs regs)
{
- int irq = r4;
+ struct pt_regs *old_regs = set_irq_regs(&regs);
+ int irq;
#ifdef CONFIG_4KSTACKS
union irq_ctx *curctx, *irqctx;
#endif
@@ -102,20 +111,9 @@ asmlinkage int do_IRQ(unsigned long r4, unsigned long r5,
#endif
#ifdef CONFIG_CPU_HAS_INTEVT
- __asm__ __volatile__ (
-#ifdef CONFIG_CPU_HAS_SR_RB
- "stc r2_bank, %0\n\t"
+ irq = (ctrl_inl(INTEVT) >> 5) - 16;
#else
- "mov.l @%1, %0\n\t"
-#endif
- "shlr2 %0\n\t"
- "shlr2 %0\n\t"
- "shlr %0\n\t"
- "add #-16, %0\n\t"
- : "=z" (irq), "=r" (r4)
- : "1" (INTEVT)
- : "memory"
- );
+ irq = r4;
#endif
irq = irq_demux(irq);
@@ -139,25 +137,25 @@ asmlinkage int do_IRQ(unsigned long r4, unsigned long r5,
__asm__ __volatile__ (
"mov %0, r4 \n"
- "mov %1, r5 \n"
"mov r15, r9 \n"
- "jsr @%2 \n"
+ "jsr @%1 \n"
/* swith to the irq stack */
- " mov %3, r15 \n"
+ " mov %2, r15 \n"
/* restore the stack (ring zero) */
"mov r9, r15 \n"
: /* no outputs */
- : "r" (irq), "r" (&regs), "r" (__do_IRQ), "r" (isp)
+ : "r" (irq), "r" (generic_handle_irq), "r" (isp)
/* XXX: A somewhat excessive clobber list? -PFM */
: "memory", "r0", "r1", "r2", "r3", "r4",
"r5", "r6", "r7", "r8", "t", "pr"
);
} else
#endif
- __do_IRQ(irq, &regs);
+ generic_handle_irq(irq);
irq_exit();
+ set_irq_regs(old_regs);
return 1;
}
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c
index 0b1d5dd7a93..a52b13ac6b7 100644
--- a/arch/sh/kernel/process.c
+++ b/arch/sh/kernel/process.c
@@ -5,6 +5,7 @@
* Copyright (C) 1995 Linus Torvalds
*
* SuperH version: Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima
+ * Copyright (C) 2006 Lineo Solutions Inc. support SH4A UBC
*/
/*
@@ -104,7 +105,7 @@ void show_regs(struct pt_regs * regs)
{
printk("\n");
printk("Pid : %d, Comm: %20s\n", current->pid, current->comm);
- print_symbol("PC is at %s\n", regs->pc);
+ print_symbol("PC is at %s\n", instruction_pointer(regs));
printk("PC : %08lx SP : %08lx SR : %08lx ",
regs->pc, regs->regs[15], regs->sr);
#ifdef CONFIG_MMU
@@ -129,15 +130,7 @@ void show_regs(struct pt_regs * regs)
printk("MACH: %08lx MACL: %08lx GBR : %08lx PR : %08lx\n",
regs->mach, regs->macl, regs->gbr, regs->pr);
- /*
- * If we're in kernel mode, dump the stack too..
- */
- if (!user_mode(regs)) {
- extern void show_task(unsigned long *sp);
- unsigned long sp = regs->regs[15];
-
- show_task((unsigned long *)sp);
- }
+ show_trace(NULL, (unsigned long *)regs->regs[15], regs);
}
/*
@@ -290,6 +283,24 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
static void
ubc_set_tracing(int asid, unsigned long pc)
{
+#if defined(CONFIG_CPU_SH4A)
+ unsigned long val;
+
+ val = (UBC_CBR_ID_INST | UBC_CBR_RW_READ | UBC_CBR_CE);
+ val |= (UBC_CBR_AIE | UBC_CBR_AIV_SET(asid));
+
+ ctrl_outl(val, UBC_CBR0);
+ ctrl_outl(pc, UBC_CAR0);
+ ctrl_outl(0x0, UBC_CAMR0);
+ ctrl_outl(0x0, UBC_CBCR);
+
+ val = (UBC_CRR_RES | UBC_CRR_PCB | UBC_CRR_BIE);
+ ctrl_outl(val, UBC_CRR0);
+
+ /* Read UBC register that we writed last. For chekking UBC Register changed */
+ val = ctrl_inl(UBC_CRR0);
+
+#else /* CONFIG_CPU_SH4A */
ctrl_outl(pc, UBC_BARA);
#ifdef CONFIG_MMU
@@ -307,6 +318,7 @@ ubc_set_tracing(int asid, unsigned long pc)
ctrl_outw(BBR_INST | BBR_READ, UBC_BBRA);
ctrl_outw(BRCR_PCBA, UBC_BRCR);
}
+#endif /* CONFIG_CPU_SH4A */
}
/*
@@ -359,8 +371,13 @@ struct task_struct *__switch_to(struct task_struct *prev, struct task_struct *ne
#endif
ubc_set_tracing(asid, next->thread.ubc_pc);
} else {
+#if defined(CONFIG_CPU_SH4A)
+ ctrl_outl(UBC_CBR_INIT, UBC_CBR0);
+ ctrl_outl(UBC_CRR_INIT, UBC_CRR0);
+#else
ctrl_outw(0, UBC_BBRA);
ctrl_outw(0, UBC_BBRB);
+#endif
}
return prev;
@@ -460,8 +477,13 @@ asmlinkage void break_point_trap(unsigned long r4, unsigned long r5,
struct pt_regs regs)
{
/* Clear tracing. */
+#if defined(CONFIG_CPU_SH4A)
+ ctrl_outl(UBC_CBR_INIT, UBC_CBR0);
+ ctrl_outl(UBC_CRR_INIT, UBC_CRR0);
+#else
ctrl_outw(0, UBC_BBRA);
ctrl_outw(0, UBC_BBRB);
+#endif
current->thread.ubc_pc = 0;
ubc_usercnt -= 1;
diff --git a/arch/sh/kernel/syscalls.S b/arch/sh/kernel/syscalls.S
index 768334e9507..ca81976e9e3 100644
--- a/arch/sh/kernel/syscalls.S
+++ b/arch/sh/kernel/syscalls.S
@@ -351,3 +351,6 @@ ENTRY(sys_call_table)
.long sys_sync_file_range
.long sys_tee /* 315 */
.long sys_vmsplice
+ .long sys_move_pages
+ .long sys_getcpu
+ .long sys_epoll_pwait
diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c
index 450c68f1df0..57e708d7b52 100644
--- a/arch/sh/kernel/time.c
+++ b/arch/sh/kernel/time.c
@@ -47,6 +47,7 @@ unsigned long long __attribute__ ((weak)) sched_clock(void)
return (unsigned long long)jiffies * (1000000000 / HZ);
}
+#ifndef CONFIG_GENERIC_TIME
void do_gettimeofday(struct timeval *tv)
{
unsigned long seq;
@@ -99,6 +100,7 @@ int do_settimeofday(struct timespec *tv)
return 0;
}
EXPORT_SYMBOL(do_settimeofday);
+#endif /* !CONFIG_GENERIC_TIME */
/* last time the RTC clock got updated */
static long last_rtc_update;
@@ -107,13 +109,14 @@ static long last_rtc_update;
* handle_timer_tick() needs to keep up the real-time clock,
* as well as call the "do_timer()" routine every clocktick
*/
-void handle_timer_tick(struct pt_regs *regs)
+void handle_timer_tick(void)
{
do_timer(1);
#ifndef CONFIG_SMP
- update_process_times(user_mode(regs));
+ update_process_times(user_mode(get_irq_regs()));
#endif
- profile_tick(CPU_PROFILING, regs);
+ if (current->pid)
+ profile_tick(CPU_PROFILING);
#ifdef CONFIG_HEARTBEAT
if (sh_mv.mv_heartbeat != NULL)
diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c
index 205816fcf0d..24927015dc3 100644
--- a/arch/sh/kernel/timers/timer-tmu.c
+++ b/arch/sh/kernel/timers/timer-tmu.c
@@ -80,8 +80,7 @@ static unsigned long tmu_timer_get_offset(void)
return count;
}
-static irqreturn_t tmu_timer_interrupt(int irq, void *dev_id,
- struct pt_regs *regs)
+static irqreturn_t tmu_timer_interrupt(int irq, void *dummy)
{
unsigned long timer_status;
@@ -98,7 +97,7 @@ static irqreturn_t tmu_timer_interrupt(int irq, void *dev_id,
* locally disabled. -arca
*/
write_seqlock(&xtime_lock);
- handle_timer_tick(regs);
+ handle_timer_tick();
write_sequnlock(&xtime_lock);
return IRQ_HANDLED;
@@ -111,60 +110,6 @@ static struct irqaction tmu_irq = {
.mask = CPU_MASK_NONE,
};
-/*
- * Hah! We'll see if this works (switching from usecs to nsecs).
- */
-static unsigned long tmu_timer_get_frequency(void)
-{
- u32 freq;
- struct timespec ts1, ts2;
- unsigned long diff_nsec;
- unsigned long factor;
-
- /* Setup the timer: We don't want to generate interrupts, just
- * have it count down at its natural rate.
- */
- ctrl_outb(0, TMU_TSTR);
-#if !defined(CONFIG_CPU_SUBTYPE_SH7300) && !defined(CONFIG_CPU_SUBTYPE_SH7760)
- ctrl_outb(TMU_TOCR_INIT, TMU_TOCR);
-#endif
- ctrl_outw(TMU0_TCR_CALIB, TMU0_TCR);
- ctrl_outl(0xffffffff, TMU0_TCOR);
- ctrl_outl(0xffffffff, TMU0_TCNT);
-
- rtc_sh_get_time(&ts2);
-
- do {
- rtc_sh_get_time(&ts1);
- } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec);
-
- /* actually start the timer */
- ctrl_outb(TMU_TSTR_INIT, TMU_TSTR);
-
- do {
- rtc_sh_get_time(&ts2);
- } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec);
-
- freq = 0xffffffff - ctrl_inl(TMU0_TCNT);
- if (ts2.tv_nsec < ts1.tv_nsec) {
- ts2.tv_nsec += 1000000000;
- ts2.tv_sec--;
- }
-
- diff_nsec = (ts2.tv_sec - ts1.tv_sec) * 1000000000 + (ts2.tv_nsec - ts1.tv_nsec);
-
- /* this should work well if the RTC has a precision of n Hz, where
- * n is an integer. I don't think we have to worry about the other
- * cases. */
- factor = (1000000000 + diff_nsec/2) / diff_nsec;
-
- if (factor * diff_nsec > 1100000000 ||
- factor * diff_nsec < 900000000)
- panic("weird RTC (diff_nsec %ld)", diff_nsec);
-
- return freq * factor;
-}
-
static void tmu_clk_init(struct clk *clk)
{
u8 divisor = TMU0_TCR_INIT & 0x7;
@@ -232,12 +177,12 @@ struct sys_timer_ops tmu_timer_ops = {
.init = tmu_timer_init,
.start = tmu_timer_start,
.stop = tmu_timer_stop,
- .get_frequency = tmu_timer_get_frequency,
+#ifndef CONFIG_GENERIC_TIME
.get_offset = tmu_timer_get_offset,
+#endif
};
struct sys_timer tmu_timer = {
.name = "tmu",
.ops = &tmu_timer_ops,
};
-
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c
index c2c597e0948..53dfa55f315 100644
--- a/arch/sh/kernel/traps.c
+++ b/arch/sh/kernel/traps.c
@@ -1,38 +1,25 @@
-/* $Id: traps.c,v 1.17 2004/05/02 01:46:30 sugioka Exp $
- *
- * linux/arch/sh/traps.c
+/*
+ * 'traps.c' handles hardware traps and faults after we have saved some
+ * state in 'entry.S'.
*
* SuperH version: Copyright (C) 1999 Niibe Yutaka
* Copyright (C) 2000 Philipp Rumpf
* Copyright (C) 2000 David Howells
- * Copyright (C) 2002, 2003 Paul Mundt
- */
-
-/*
- * 'Traps.c' handles hardware traps and faults after we have saved some
- * state in 'entry.S'.
+ * Copyright (C) 2002 - 2006 Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
*/
-#include <linux/sched.h>
#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/errno.h>
#include <linux/ptrace.h>
-#include <linux/timer.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/smp_lock.h>
#include <linux/init.h>
-#include <linux/delay.h>
#include <linux/spinlock.h>
#include <linux/module.h>
#include <linux/kallsyms.h>
-
+#include <linux/io.h>
#include <asm/system.h>
#include <asm/uaccess.h>
-#include <asm/io.h>
-#include <asm/atomic.h>
-#include <asm/processor.h>
-#include <asm/sections.h>
#ifdef CONFIG_SH_KGDB
#include <asm/kgdb.h>
@@ -53,13 +40,32 @@
#define TRAP_ILLEGAL_SLOT_INST 13
#endif
-/*
- * These constants are for searching for possible module text
- * segments. VMALLOC_OFFSET comes from mm/vmalloc.c; MODULE_RANGE is
- * a guess of how much space is likely to be vmalloced.
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define MODULE_RANGE (8*1024*1024)
+static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
+{
+ unsigned long p;
+ int i;
+
+ printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top);
+
+ for (p = bottom & ~31; p < top; ) {
+ printk("%04lx: ", p & 0xffff);
+
+ for (i = 0; i < 8; i++, p += 4) {
+ unsigned int val;
+
+ if (p < bottom || p >= top)
+ printk(" ");
+ else {
+ if (__get_user(val, (unsigned int __user *)p)) {
+ printk("\n");
+ return;
+ }
+ printk("%08x ", val);
+ }
+ }
+ printk("\n");
+ }
+}
DEFINE_SPINLOCK(die_lock);
@@ -69,14 +75,28 @@ void die(const char * str, struct pt_regs * regs, long err)
console_verbose();
spin_lock_irq(&die_lock);
+ bust_spinlocks(1);
+
printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
+
CHK_REMOTE_DEBUG(regs);
+ print_modules();
show_regs(regs);
+
+ printk("Process: %s (pid: %d, stack limit = %p)\n",
+ current->comm, current->pid, task_stack_page(current) + 1);
+
+ if (!user_mode(regs) || in_interrupt())
+ dump_mem("Stack: ", regs->regs[15], THREAD_SIZE +
+ (unsigned long)task_stack_page(current));
+
+ bust_spinlocks(0);
spin_unlock_irq(&die_lock);
do_exit(SIGSEGV);
}
-static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err)
+static inline void die_if_kernel(const char *str, struct pt_regs *regs,
+ long err)
{
if (!user_mode(regs))
die(str, regs, err);
@@ -93,8 +113,7 @@ static int handle_unaligned_notify_count = 10;
*/
static int die_if_no_fixup(const char * str, struct pt_regs * regs, long err)
{
- if (!user_mode(regs))
- {
+ if (!user_mode(regs)) {
const struct exception_table_entry *fixup;
fixup = search_exception_tables(regs->pc);
if (fixup) {
@@ -550,7 +569,10 @@ int is_dsp_inst(struct pt_regs *regs)
#define is_dsp_inst(regs) (0)
#endif /* CONFIG_SH_DSP */
-extern int do_fpu_inst(unsigned short, struct pt_regs*);
+/* arch/sh/kernel/cpu/sh4/fpu.c */
+extern int do_fpu_inst(unsigned short, struct pt_regs *);
+extern asmlinkage void do_fpu_state_restore(unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7, struct pt_regs regs);
asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
@@ -709,14 +731,20 @@ void __init per_cpu_trap_init(void)
: "memory");
}
-void __init trap_init(void)
+void *set_exception_table_vec(unsigned int vec, void *handler)
{
extern void *exception_handling_table[];
+ void *old_handler;
+
+ old_handler = exception_handling_table[vec];
+ exception_handling_table[vec] = handler;
+ return old_handler;
+}
- exception_handling_table[TRAP_RESERVED_INST]
- = (void *)do_reserved_inst;
- exception_handling_table[TRAP_ILLEGAL_SLOT_INST]
- = (void *)do_illegal_slot_inst;
+void __init trap_init(void)
+{
+ set_exception_table_vec(TRAP_RESERVED_INST, do_reserved_inst);
+ set_exception_table_vec(TRAP_ILLEGAL_SLOT_INST, do_illegal_slot_inst);
#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_FPU) || \
defined(CONFIG_SH_FPU_EMU)
@@ -725,61 +753,54 @@ void __init trap_init(void)
* reserved. They'll be handled in the math-emu case, or faulted on
* otherwise.
*/
- /* entry 64 corresponds to EXPEVT=0x800 */
- exception_handling_table[64] = (void *)do_reserved_inst;
- exception_handling_table[65] = (void *)do_illegal_slot_inst;
+ set_exception_table_evt(0x800, do_reserved_inst);
+ set_exception_table_evt(0x820, do_illegal_slot_inst);
+#elif defined(CONFIG_SH_FPU)
+ set_exception_table_evt(0x800, do_fpu_state_restore);
+ set_exception_table_evt(0x820, do_fpu_state_restore);
#endif
/* Setup VBR for boot cpu */
per_cpu_trap_init();
}
-void show_stack(struct task_struct *tsk, unsigned long *sp)
+void show_trace(struct task_struct *tsk, unsigned long *sp,
+ struct pt_regs *regs)
{
- unsigned long *stack, addr;
- unsigned long module_start = VMALLOC_START;
- unsigned long module_end = VMALLOC_END;
- int i = 1;
-
- if (!tsk)
- tsk = current;
- if (tsk == current)
- sp = (unsigned long *)current_stack_pointer;
- else
- sp = (unsigned long *)tsk->thread.sp;
+ unsigned long addr;
- stack = sp;
+ if (regs && user_mode(regs))
+ return;
printk("\nCall trace: ");
#ifdef CONFIG_KALLSYMS
printk("\n");
#endif
- while (!kstack_end(stack)) {
- addr = *stack++;
- if (((addr >= (unsigned long)_text) &&
- (addr <= (unsigned long)_etext)) ||
- ((addr >= module_start) && (addr <= module_end))) {
- /*
- * For 80-columns display, 6 entry is maximum.
- * NOTE: '[<8c00abcd>] ' consumes 13 columns .
- */
-#ifndef CONFIG_KALLSYMS
- if (i && ((i % 6) == 0))
- printk("\n ");
-#endif
- printk("[<%08lx>] ", addr);
- print_symbol("%s\n", addr);
- i++;
- }
+ while (!kstack_end(sp)) {
+ addr = *sp++;
+ if (kernel_text_address(addr))
+ print_ip_sym(addr);
}
printk("\n");
}
-void show_task(unsigned long *sp)
+void show_stack(struct task_struct *tsk, unsigned long *sp)
{
- show_stack(NULL, sp);
+ unsigned long stack;
+
+ if (!tsk)
+ tsk = current;
+ if (tsk == current)
+ sp = (unsigned long *)current_stack_pointer;
+ else
+ sp = (unsigned long *)tsk->thread.sp;
+
+ stack = (unsigned long)sp;
+ dump_mem("Stack: ", stack, THREAD_SIZE +
+ (unsigned long)task_stack_page(tsk));
+ show_trace(tsk, sp, NULL);
}
void dump_stack(void)
diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S
index 5eb93091818..77b4026d568 100644
--- a/arch/sh/kernel/vmlinux.lds.S
+++ b/arch/sh/kernel/vmlinux.lds.S
@@ -76,13 +76,7 @@ SECTIONS
__setup_end = .;
__initcall_start = .;
.initcall.init : {
- *(.initcall1.init)
- *(.initcall2.init)
- *(.initcall3.init)
- *(.initcall4.init)
- *(.initcall5.init)
- *(.initcall6.init)
- *(.initcall7.init)
+ INITCALLS
}
__initcall_end = .;
__con_initcall_start = .;
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-19 22:57:39 +0000