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-rw-r--r--arch/i386/math-emu/fpu_entry.c2
-rw-r--r--arch/ppc/syslib/qspan_pci.c4
-rw-r--r--arch/sh64/kernel/pci_sh5.c8
3 files changed, 7 insertions, 7 deletions
diff --git a/arch/i386/math-emu/fpu_entry.c b/arch/i386/math-emu/fpu_entry.c
index ddf8fa3bbd0..1853524c8b5 100644
--- a/arch/i386/math-emu/fpu_entry.c
+++ b/arch/i386/math-emu/fpu_entry.c
@@ -754,7 +754,7 @@ int save_i387_soft(void *s387, struct _fpstate __user * buf)
return -1;
if ( offset )
if (__copy_to_user(d+other, (u_char *)&S387->st_space, offset))
- return -1
+ return -1;
RE_ENTRANT_CHECK_ON;
return 1;
diff --git a/arch/ppc/syslib/qspan_pci.c b/arch/ppc/syslib/qspan_pci.c
index 85053b2816a..7a97c7440b3 100644
--- a/arch/ppc/syslib/qspan_pci.c
+++ b/arch/ppc/syslib/qspan_pci.c
@@ -365,13 +365,13 @@ int qspan_pcibios_find_class(unsigned int class_code, unsigned short index,
}
void __init
-m8xx_pcibios_fixup(void))
+m8xx_pcibios_fixup(void)
{
/* Lots to do here, all board and configuration specific. */
}
void __init
-m8xx_setup_pci_ptrs(void))
+m8xx_setup_pci_ptrs(void)
{
set_config_access_method(qspan);
diff --git a/arch/sh64/kernel/pci_sh5.c b/arch/sh64/kernel/pci_sh5.c
index fb51660847c..3334f99b583 100644
--- a/arch/sh64/kernel/pci_sh5.c
+++ b/arch/sh64/kernel/pci_sh5.c
@@ -521,10 +521,10 @@ void __init pcibios_fixup_bus(struct pci_bus *bus)
bus->resource[0]->start = PCIBIOS_MIN_IO;
bus->resource[1]->start = PCIBIOS_MIN_MEM;
#else
- bus->resource[0]->end = 0
- bus->resource[1]->end = 0
- bus->resource[0]->start =0
- bus->resource[1]->start = 0;
+ bus->resource[0]->end = 0;
+ bus->resource[1]->end = 0;
+ bus->resource[0]->start =0;
+ bus->resource[1]->start = 0;
#endif
/* Turn off downstream PF memory address range by default */
bus->resource[2]->start = 1024*1024;