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-rw-r--r--drivers/mfd/glamo/glamo-cmdq.c2
-rw-r--r--drivers/mfd/glamo/glamo-core.c17
2 files changed, 19 insertions, 0 deletions
diff --git a/drivers/mfd/glamo/glamo-cmdq.c b/drivers/mfd/glamo/glamo-cmdq.c
index f3dcc83b00f..3dd9362f44d 100644
--- a/drivers/mfd/glamo/glamo-cmdq.c
+++ b/drivers/mfd/glamo/glamo-cmdq.c
@@ -460,6 +460,8 @@ int glamo_cmdq_init(struct glamodrm_handle *gdrm)
/* Enable 2D and 3D */
glamo_engine_enable(gdrm->glamo_core, GLAMO_ENGINE_2D);
glamo_engine_reset(gdrm->glamo_core, GLAMO_ENGINE_2D);
+ glamo_engine_enable(gdrm->glamo_core, GLAMO_ENGINE_3D);
+ glamo_engine_reset(gdrm->glamo_core, GLAMO_ENGINE_3D);
/* Start by zeroing the command queue memory */
for ( i=0; i<GLAMO_CMDQ_SIZE; i+=2 ) {
diff --git a/drivers/mfd/glamo/glamo-core.c b/drivers/mfd/glamo/glamo-core.c
index 3dcb3589084..556ae3c15e6 100644
--- a/drivers/mfd/glamo/glamo-core.c
+++ b/drivers/mfd/glamo/glamo-core.c
@@ -487,6 +487,19 @@ int __glamo_engine_enable(struct glamo_core *glamo, enum glamo_engine engine)
__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1,
GLAMO_CLOCK_GEN51_EN_DIV_GCLK, 0xffff);
break;
+ case GLAMO_ENGINE_3D:
+ __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_3D,
+ GLAMO_CLOCK_3D_EN_M8CLK |
+ GLAMO_CLOCK_3D_EN_ECLK |
+ GLAMO_CLOCK_3D_EN_RCLK |
+ GLAMO_CLOCK_3D_DG_M8CLK |
+ GLAMO_CLOCK_3D_DG_RCLK |
+ GLAMO_CLOCK_3D_DG_ECLK, 0xffff);
+ /* Enable 3D MMIO */
+ __reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2),
+ GLAMO_HOSTBUS2_MMIO_EN_3D,
+ GLAMO_HOSTBUS2_MMIO_EN_3D);
+ break;
case GLAMO_ENGINE_CMDQ:
__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_2D,
GLAMO_CLOCK_2D_EN_M6CLK, 0xffff);
@@ -622,6 +635,10 @@ struct glamo_script reset_regs[] = {
[GLAMO_ENGINE_2D] = {
GLAMO_REG_CLOCK_2D, GLAMO_CLOCK_2D_RESET
},
+ [GLAMO_ENGINE_3D] = {
+ GLAMO_REG_CLOCK_3D, GLAMO_CLOCK_3D_BACK_RESET |
+ GLAMO_CLOCK_3D_FRONT_RESET
+ },
[GLAMO_ENGINE_JPEG] = {
GLAMO_REG_CLOCK_JPEG, GLAMO_CLOCK_JPEG_RESET
},