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path: root/drivers/net/chelsio/regs.h
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Diffstat (limited to 'drivers/net/chelsio/regs.h')
-rw-r--r--drivers/net/chelsio/regs.h21
1 files changed, 18 insertions, 3 deletions
diff --git a/drivers/net/chelsio/regs.h b/drivers/net/chelsio/regs.h
index 5a70803eb1b..b90e11f40d1 100644
--- a/drivers/net/chelsio/regs.h
+++ b/drivers/net/chelsio/regs.h
@@ -1,8 +1,8 @@
/*****************************************************************************
* *
* File: regs.h *
- * $Revision: 1.4 $ *
- * $Date: 2005/03/23 07:15:59 $ *
+ * $Revision: 1.8 $ *
+ * $Date: 2005/06/21 18:29:48 $ *
* Description: *
* part of the Chelsio 10Gb Ethernet Driver. *
* *
@@ -36,7 +36,8 @@
* *
****************************************************************************/
-/* Do not edit this file */
+#ifndef _CXGB_REGS_H_
+#define _CXGB_REGS_H_
/* SGE registers */
#define A_SG_CONTROL 0x0
@@ -74,6 +75,14 @@
#define V_DISABLE_CMDQ1_GTS(x) ((x) << S_DISABLE_CMDQ1_GTS)
#define F_DISABLE_CMDQ1_GTS V_DISABLE_CMDQ1_GTS(1U)
+#define S_DISABLE_FL0_GTS 10
+#define V_DISABLE_FL0_GTS(x) ((x) << S_DISABLE_FL0_GTS)
+#define F_DISABLE_FL0_GTS V_DISABLE_FL0_GTS(1U)
+
+#define S_DISABLE_FL1_GTS 11
+#define V_DISABLE_FL1_GTS(x) ((x) << S_DISABLE_FL1_GTS)
+#define F_DISABLE_FL1_GTS V_DISABLE_FL1_GTS(1U)
+
#define S_ENABLE_BIG_ENDIAN 12
#define V_ENABLE_BIG_ENDIAN(x) ((x) << S_ENABLE_BIG_ENDIAN)
#define F_ENABLE_BIG_ENDIAN V_ENABLE_BIG_ENDIAN(1U)
@@ -132,6 +141,7 @@
#define F_PACKET_MISMATCH V_PACKET_MISMATCH(1U)
#define A_SG_INT_CAUSE 0xbc
+#define A_SG_RESPACCUTIMER 0xc0
/* MC3 registers */
@@ -247,6 +257,10 @@
#define V_SYN_COOKIE_PARAMETER(x) ((x) << S_SYN_COOKIE_PARAMETER)
#define A_TP_PC_CONFIG 0x348
+#define S_DIS_TX_FILL_WIN_PUSH 12
+#define V_DIS_TX_FILL_WIN_PUSH(x) ((x) << S_DIS_TX_FILL_WIN_PUSH)
+#define F_DIS_TX_FILL_WIN_PUSH V_DIS_TX_FILL_WIN_PUSH(1U)
+
#define S_TP_PC_REV 30
#define M_TP_PC_REV 0x3
#define G_TP_PC_REV(x) (((x) >> S_TP_PC_REV) & M_TP_PC_REV)
@@ -451,3 +465,4 @@
#define M_PCI_MODE_CLK 0x3
#define G_PCI_MODE_CLK(x) (((x) >> S_PCI_MODE_CLK) & M_PCI_MODE_CLK)
+#endif /* _CXGB_REGS_H_ */