diff options
Diffstat (limited to 'drivers/video')
50 files changed, 3891 insertions, 9692 deletions
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 4e83f01e894..8874cf2fd27 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -85,6 +85,14 @@ config FB_CFB_IMAGEBLIT blitting. This is used by drivers that don't provide their own (accelerated) version. +config FB_SVGALIB + tristate + depends on FB + default n + ---help--- + Common utility functions useful to fbdev drivers of VGA-based + cards. + config FB_MACMODES tristate depends on FB @@ -346,42 +354,6 @@ config FB_AMIGA_AGA and CD32. If you intend to run Linux on any of these systems, say Y; otherwise say N. -config FB_CYBER - tristate "Amiga CyberVision 64 support" - depends on FB && ZORRO && BROKEN - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT - help - This enables support for the Cybervision 64 graphics card from - Phase5. Please note that its use is not all that intuitive (i.e. if - you have any questions, be sure to ask!). Say N unless you have a - Cybervision 64 or plan to get one before you next recompile the - kernel. Please note that this driver DOES NOT support the - Cybervision 64/3D card, as they use incompatible video chips. - -config FB_VIRGE - bool "Amiga CyberVision 64/3D support " - depends on (FB = y) && ZORRO && BROKEN - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT - help - This enables support for the Cybervision 64/3D graphics card from - Phase5. Please note that its use is not all that intuitive (i.e. if - you have any questions, be sure to ask!). Say N unless you have a - Cybervision 64/3D or plan to get one before you next recompile the - kernel. Please note that this driver DOES NOT support the older - Cybervision 64 card, as they use incompatible video chips. - -config FB_RETINAZ3 - tristate "Amiga Retina Z3 support" - depends on (FB = y) && ZORRO && BROKEN - help - This enables support for the Retina Z3 graphics card. Say N unless - you have a Retina Z3 or plan to get one before you next recompile - the kernel. - config FB_FM2 bool "Amiga FrameMaster II/Rainbow II support" depends on (FB = y) && ZORRO @@ -617,10 +589,6 @@ config FB_GBE_MEM This is the amount of memory reserved for the framebuffer, which can be any value between 1MB and 8MB. -config FB_SUN3 - bool "Sun3 framebuffer support" - depends on (FB = y) && (SUN3 || SUN3X) && BROKEN - config FB_SBUS bool "SBUS and UPA framebuffers" depends on (FB = y) && SPARC @@ -629,7 +597,7 @@ config FB_SBUS config FB_BW2 bool "BWtwo support" - depends on (FB = y) && (SPARC && FB_SBUS || (SUN3 || SUN3X) && FB_SUN3) + depends on (FB = y) && (SPARC && FB_SBUS) select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT @@ -638,7 +606,7 @@ config FB_BW2 config FB_CG3 bool "CGthree support" - depends on (FB = y) && (SPARC && FB_SBUS || (SUN3 || SUN3X) && FB_SUN3) + depends on (FB = y) && (SPARC && FB_SBUS) select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT @@ -647,7 +615,7 @@ config FB_CG3 config FB_CG6 bool "CGsix (GX,TurboGX) support" - depends on (FB = y) && (SPARC && FB_SBUS || (SUN3 || SUN3X) && FB_SUN3) + depends on (FB = y) && (SPARC && FB_SBUS) select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT help @@ -1141,11 +1109,16 @@ config FB_ATY_BACKLIGHT help Say Y here if you want to control the backlight of your display. -config FB_S3TRIO - bool "S3 Trio display support" - depends on (FB = y) && PPC && BROKEN - help - If you have a S3 Trio say Y. Say N for S3 Virge. +config FB_S3 + tristate "S3 Trio/Virge support" + depends on FB && PCI + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT + select FB_TILEBLITTING + select FB_SVGALIB + ---help--- + Driver for graphics boards with S3 Trio / S3 Virge chip. config FB_SAVAGE tristate "S3 Savage support" @@ -1444,8 +1417,8 @@ config FB_PMAG_AA used mainly in the MIPS-based DECstation series. config FB_PMAG_BA - bool "PMAG-BA TURBOchannel framebuffer support" - depends on (FB = y) && TC + tristate "PMAG-BA TURBOchannel framebuffer support" + depends on FB && TC select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT @@ -1454,8 +1427,8 @@ config FB_PMAG_BA used mainly in the MIPS-based DECstation series. config FB_PMAGB_B - bool "PMAGB-B TURBOchannel framebuffer support" - depends on (FB = y) && TC + tristate "PMAGB-B TURBOchannel framebuffer support" + depends on TC select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT @@ -1625,6 +1598,26 @@ config FB_IBM_GXT4500 Say Y here to enable support for the IBM GXT4500P display adaptor, found on some IBM System P (pSeries) machines. +config FB_PS3 + bool "PS3 GPU framebuffer driver" + depends on FB && PPC_PS3 + select PS3_PS3AV + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT + ---help--- + Include support for the virtual frame buffer in the PS3 platform. + +config FB_PS3_DEFAULT_SIZE_M + int "PS3 default frame buffer size (in MiB)" + depends on FB_PS3 + default 18 + ---help--- + This is the default size (in MiB) of the virtual frame buffer in + the PS3. + The default value can be overridden on the kernel command line + using the "ps3fb" option (e.g. "ps3fb=9M"); + config FB_VIRTUAL tristate "Virtual Frame Buffer support (ONLY FOR TESTING!)" depends on FB diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 309a26dd164..6801edff36d 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -17,15 +17,14 @@ obj-$(CONFIG_SYSFS) += backlight/ obj-$(CONFIG_FB_CFB_FILLRECT) += cfbfillrect.o obj-$(CONFIG_FB_CFB_COPYAREA) += cfbcopyarea.o obj-$(CONFIG_FB_CFB_IMAGEBLIT) += cfbimgblt.o +obj-$(CONFIG_FB_SVGALIB) += svgalib.o obj-$(CONFIG_FB_MACMODES) += macmodes.o obj-$(CONFIG_FB_DDC) += fb_ddc.o # Hardware specific drivers go first -obj-$(CONFIG_FB_RETINAZ3) += retz3fb.o obj-$(CONFIG_FB_AMIGA) += amifb.o c2p.o obj-$(CONFIG_FB_ARC) += arcfb.o obj-$(CONFIG_FB_CLPS711X) += clps711xfb.o -obj-$(CONFIG_FB_CYBER) += cyberfb.o obj-$(CONFIG_FB_CYBER2000) += cyber2000fb.o obj-$(CONFIG_FB_PM2) += pm2fb.o obj-$(CONFIG_FB_PM3) += pm3fb.o @@ -43,17 +42,16 @@ obj-$(CONFIG_FB_GEODE) += geode/ obj-$(CONFIG_FB_MBX) += mbx/ obj-$(CONFIG_FB_I810) += vgastate.o obj-$(CONFIG_FB_NEOMAGIC) += neofb.o vgastate.o -obj-$(CONFIG_FB_VIRGE) += virgefb.o obj-$(CONFIG_FB_3DFX) += tdfxfb.o obj-$(CONFIG_FB_CONTROL) += controlfb.o obj-$(CONFIG_FB_PLATINUM) += platinumfb.o obj-$(CONFIG_FB_VALKYRIE) += valkyriefb.o obj-$(CONFIG_FB_CT65550) += chipsfb.o obj-$(CONFIG_FB_IMSTT) += imsttfb.o -obj-$(CONFIG_FB_S3TRIO) += S3triofb.o obj-$(CONFIG_FB_FM2) += fm2fb.o obj-$(CONFIG_FB_CYBLA) += cyblafb.o obj-$(CONFIG_FB_TRIDENT) += tridentfb.o +obj-$(CONFIG_FB_S3) += s3fb.o vgastate.o obj-$(CONFIG_FB_STI) += stifb.o obj-$(CONFIG_FB_FFB) += ffb.o sbuslib.o obj-$(CONFIG_FB_CG6) += cg6.o sbuslib.o @@ -75,7 +73,6 @@ obj-$(CONFIG_FB_TGA) += tgafb.o obj-$(CONFIG_FB_HP300) += hpfb.o obj-$(CONFIG_FB_G364) += g364fb.o obj-$(CONFIG_FB_SA1100) += sa1100fb.o -obj-$(CONFIG_FB_SUN3) += sun3fb.o obj-$(CONFIG_FB_HIT) += hitfb.o obj-$(CONFIG_FB_EPSON1355) += epson1355fb.o obj-$(CONFIG_FB_PVR2) += pvr2fb.o @@ -100,6 +97,7 @@ obj-$(CONFIG_FB_S3C2410) += s3c2410fb.o obj-$(CONFIG_FB_PNX4008_DUM) += pnx4008/ obj-$(CONFIG_FB_PNX4008_DUM_RGB) += pnx4008/ obj-$(CONFIG_FB_IBM_GXT4500) += gxt4500.o +obj-$(CONFIG_FB_PS3) += ps3fb.o # Platform or fallback drivers go here obj-$(CONFIG_FB_VESA) += vesafb.o diff --git a/drivers/video/S3triofb.c b/drivers/video/S3triofb.c deleted file mode 100644 index b3717c8f1bc..00000000000 --- a/drivers/video/S3triofb.c +++ /dev/null @@ -1,790 +0,0 @@ -/* - * linux/drivers/video/S3Triofb.c -- Open Firmware based frame buffer device - * - * Copyright (C) 1997 Peter De Schrijver - * - * This driver is partly based on the PowerMac console driver: - * - * Copyright (C) 1996 Paul Mackerras - * - * and on the Open Firmware based frame buffer device: - * - * Copyright (C) 1997 Geert Uytterhoeven - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -/* - Bugs : + OF dependencies should be removed. - + This driver should be merged with the CyberVision driver. The - CyberVision is a Zorro III implementation of the S3Trio64 chip. - -*/ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/errno.h> -#include <linux/string.h> -#include <linux/mm.h> -#include <linux/slab.h> -#include <linux/vmalloc.h> -#include <linux/delay.h> -#include <linux/interrupt.h> -#include <linux/fb.h> -#include <linux/init.h> -#include <linux/selection.h> -#include <asm/io.h> -#include <asm/prom.h> -#include <asm/pci-bridge.h> -#include <linux/pci.h> - -#include <video/fbcon.h> -#include <video/fbcon-cfb8.h> -#include <video/s3blit.h> - - -#define mem_in8(addr) in_8((void *)(addr)) -#define mem_in16(addr) in_le16((void *)(addr)) -#define mem_in32(addr) in_le32((void *)(addr)) - -#define mem_out8(val, addr) out_8((void *)(addr), val) -#define mem_out16(val, addr) out_le16((void *)(addr), val) -#define mem_out32(val, addr) out_le32((void *)(addr), val) - -#define IO_OUT16VAL(v, r) (((v) << 8) | (r)) - -static struct display disp; -static struct fb_info fb_info; -static struct { u_char red, green, blue, pad; } palette[256]; -static char s3trio_name[16] = "S3Trio "; -static char *s3trio_base; - -static struct fb_fix_screeninfo fb_fix; -static struct fb_var_screeninfo fb_var = { 0, }; - - - /* - * Interface used by the world - */ - -static void __init s3triofb_of_init(struct device_node *dp); -static int s3trio_get_fix(struct fb_fix_screeninfo *fix, int con, - struct fb_info *info); -static int s3trio_get_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info); -static int s3trio_set_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info); -static int s3trio_get_cmap(struct fb_cmap *cmap, int kspc, int con, - struct fb_info *info); -static int s3trio_setcolreg(u_int regno, u_int red, u_int green, u_int blue, - u_int transp, struct fb_info *info); -static int s3trio_pan_display(struct fb_var_screeninfo *var, int con, - struct fb_info *info); -static void s3triofb_blank(int blank, struct fb_info *info); - - /* - * Interface to the low level console driver - */ - -int s3triofb_init(void); -static int s3triofbcon_switch(int con, struct fb_info *info); -static int s3triofbcon_updatevar(int con, struct fb_info *info); - - /* - * Text console acceleration - */ - -#ifdef FBCON_HAS_CFB8 -static struct display_switch fbcon_trio8; -#endif - - /* - * Accelerated Functions used by the low level console driver - */ - -static void Trio_WaitQueue(u_short fifo); -static void Trio_WaitBlit(void); -static void Trio_BitBLT(u_short curx, u_short cury, u_short destx, - u_short desty, u_short width, u_short height, - u_short mode); -static void Trio_RectFill(u_short x, u_short y, u_short width, u_short height, - u_short mode, u_short color); -static void Trio_MoveCursor(u_short x, u_short y); - - - /* - * Internal routines - */ - -static int s3trio_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue, - u_int *transp, struct fb_info *info); - -static struct fb_ops s3trio_ops = { - .owner = THIS_MODULE, - .fb_get_fix = s3trio_get_fix, - .fb_get_var = s3trio_get_var, - .fb_set_var = s3trio_set_var, - .fb_get_cmap = s3trio_get_cmap, - .fb_set_cmap = gen_set_cmap, - .fb_setcolreg = s3trio_setcolreg, - .fb_pan_display =s3trio_pan_display, - .fb_blank = s3triofb_blank, -}; - - /* - * Get the Fixed Part of the Display - */ - -static int s3trio_get_fix(struct fb_fix_screeninfo *fix, int con, - struct fb_info *info) -{ - memcpy(fix, &fb_fix, sizeof(fb_fix)); - return 0; -} - - - /* - * Get the User Defined Part of the Display - */ - -static int s3trio_get_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info) -{ - memcpy(var, &fb_var, sizeof(fb_var)); - return 0; -} - - - /* - * Set the User Defined Part of the Display - */ - -static int s3trio_set_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info) -{ - if (var->xres > fb_var.xres || var->yres > fb_var.yres || - var->bits_per_pixel > fb_var.bits_per_pixel ) - /* || var->nonstd || var->vmode != FB_VMODE_NONINTERLACED) */ - return -EINVAL; - if (var->xres_virtual > fb_var.xres_virtual) { - outw(IO_OUT16VAL((var->xres_virtual /8) & 0xff, 0x13), 0x3d4); - outw(IO_OUT16VAL(((var->xres_virtual /8 ) & 0x300) >> 3, 0x51), 0x3d4); - fb_var.xres_virtual = var->xres_virtual; - fb_fix.line_length = var->xres_virtual; - } - fb_var.yres_virtual = var->yres_virtual; - memcpy(var, &fb_var, sizeof(fb_var)); - return 0; -} - - - /* - * Pan or Wrap the Display - * - * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag - */ - -static int s3trio_pan_display(struct fb_var_screeninfo *var, int con, - struct fb_info *info) -{ - unsigned int base; - - if (var->xoffset > (var->xres_virtual - var->xres)) - return -EINVAL; - if (var->yoffset > (var->yres_virtual - var->yres)) - return -EINVAL; - - fb_var.xoffset = var->xoffset; - fb_var.yoffset = var->yoffset; - - base = var->yoffset * fb_fix.line_length + var->xoffset; - - outw(IO_OUT16VAL((base >> 8) & 0xff, 0x0c),0x03D4); - outw(IO_OUT16VAL(base & 0xff, 0x0d),0x03D4); - outw(IO_OUT16VAL((base >> 16) & 0xf, 0x69),0x03D4); - return 0; -} - - - /* - * Get the Colormap - */ - -static int s3trio_get_cmap(struct fb_cmap *cmap, int kspc, int con, - struct fb_info *info) -{ - if (con == info->currcon) /* current console? */ - return fb_get_cmap(cmap, kspc, s3trio_getcolreg, info); - else if (fb_display[con].cmap.len) /* non default colormap? */ - fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2); - else - fb_copy_cmap(fb_default_cmap(1 << fb_display[con].var.bits_per_pixel), - cmap, kspc ? 0 : 2); - return 0; -} - -int __init s3triofb_init(void) -{ - struct device_node *dp; - - dp = find_devices("S3Trio"); - if (dp != 0) - s3triofb_of_init(dp); - return 0; -} - -void __init s3trio_resetaccel(void){ - - -#define EC01_ENH_ENB 0x0005 -#define EC01_LAW_ENB 0x0010 -#define EC01_MMIO_ENB 0x0020 - -#define EC00_RESET 0x8000 -#define EC00_ENABLE 0x4000 -#define MF_MULT_MISC 0xE000 -#define SRC_FOREGROUND 0x0020 -#define SRC_BACKGROUND 0x0000 -#define MIX_SRC 0x0007 -#define MF_T_CLIP 0x1000 -#define MF_L_CLIP 0x2000 -#define MF_B_CLIP 0x3000 -#define MF_R_CLIP 0x4000 -#define MF_PIX_CONTROL 0xA000 -#define MFA_SRC_FOREGR_MIX 0x0000 -#define MF_PIX_CONTROL 0xA000 - - outw(EC00_RESET, 0x42e8); - inw( 0x42e8); - outw(EC00_ENABLE, 0x42e8); - inw( 0x42e8); - outw(EC01_ENH_ENB | EC01_LAW_ENB, - 0x4ae8); - outw(MF_MULT_MISC, 0xbee8); /* 16 bit I/O registers */ - - /* Now set some basic accelerator registers */ - Trio_WaitQueue(0x0400); - outw(SRC_FOREGROUND | MIX_SRC, 0xbae8); - outw(SRC_BACKGROUND | MIX_SRC, 0xb6e8);/* direct color*/ - outw(MF_T_CLIP | 0, 0xbee8 ); /* clip virtual area */ - outw(MF_L_CLIP | 0, 0xbee8 ); - outw(MF_R_CLIP | (640 - 1), 0xbee8); - outw(MF_B_CLIP | (480 - 1), 0xbee8); - Trio_WaitQueue(0x0400); - outw(0xffff, 0xaae8); /* Enable all planes */ - outw(0xffff, 0xaae8); /* Enable all planes */ - outw( MF_PIX_CONTROL | MFA_SRC_FOREGR_MIX, 0xbee8); -} - -int __init s3trio_init(struct device_node *dp){ - - u_char bus, dev; - unsigned int t32; - unsigned short cmd; - - pci_device_loc(dp,&bus,&dev); - pcibios_read_config_dword(bus, dev, PCI_VENDOR_ID, &t32); - if(t32 == (PCI_DEVICE_ID_S3_TRIO << 16) + PCI_VENDOR_ID_S3) { - pcibios_read_config_dword(bus, dev, PCI_BASE_ADDRESS_0, &t32); - pcibios_read_config_dword(bus, dev, PCI_BASE_ADDRESS_1, &t32); - pcibios_read_config_word(bus, dev, PCI_COMMAND,&cmd); - - pcibios_write_config_word(bus, dev, PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY); - - pcibios_write_config_dword(bus, dev, PCI_BASE_ADDRESS_0,0xffffffff); - pcibios_read_config_dword(bus, dev, PCI_BASE_ADDRESS_0, &t32); - -/* This is a gross hack as OF only maps enough memory for the framebuffer and - we want to use MMIO too. We should find out which chunk of address space - we can use here */ - pcibios_write_config_dword(bus,dev,PCI_BASE_ADDRESS_0,0xc6000000); - - /* unlock s3 */ - - outb(0x01, 0x3C3); - - outb(inb(0x03CC) | 1, 0x3c2); - - outw(IO_OUT16VAL(0x48, 0x38),0x03D4); - outw(IO_OUT16VAL(0xA0, 0x39),0x03D4); - outb(0x33,0x3d4); - outw(IO_OUT16VAL((inb(0x3d5) & ~(0x2 | 0x10 | 0x40)) | - 0x20, 0x33), 0x3d4); - - outw(IO_OUT16VAL(0x6, 0x8), 0x3c4); - - /* switch to MMIO only mode */ - - outb(0x58, 0x3d4); - outw(IO_OUT16VAL(inb(0x3d5) | 3 | 0x10, 0x58), 0x3d4); - outw(IO_OUT16VAL(8, 0x53), 0x3d4); - - /* switch off I/O accesses */ - -#if 0 - pcibios_write_config_word(bus, dev, PCI_COMMAND, - PCI_COMMAND_IO | PCI_COMMAND_MEMORY); -#endif - return 1; - } - - return 0; -} - - - /* - * Initialisation - * We heavily rely on OF for the moment. This needs fixing. - */ - -static void __init s3triofb_of_init(struct device_node *dp) -{ - int i, *pp, len; - unsigned long address, size; - u_long *CursorBase; - - strncat(s3trio_name, dp->name, sizeof(s3trio_name)); - s3trio_name[sizeof(s3trio_name)-1] = '\0'; - strcpy(fb_fix.id, s3trio_name); - - if((pp = get_property(dp, "vendor-id", &len)) != NULL - && *pp!=PCI_VENDOR_ID_S3) { - printk("%s: can't find S3 Trio board\n", dp->full_name); - return; - } - - if((pp = get_property(dp, "device-id", &len)) != NULL - && *pp!=PCI_DEVICE_ID_S3_TRIO) { - printk("%s: can't find S3 Trio board\n", dp->full_name); - return; - } - - if ((pp = get_property(dp, "depth", &len)) != NULL - && len == sizeof(int) && *pp != 8) { - printk("%s: can't use depth = %d\n", dp->full_name, *pp); - return; - } - if ((pp = get_property(dp, "width", &len)) != NULL - && len == sizeof(int)) - fb_var.xres = fb_var.xres_virtual = *pp; - if ((pp = get_property(dp, "height", &len)) != NULL - && len == sizeof(int)) - fb_var.yres = fb_var.yres_virtual = *pp; - if ((pp = get_property(dp, "linebytes", &len)) != NULL - && len == sizeof(int)) - fb_fix.line_length = *pp; - else - fb_fix.line_length = fb_var.xres_virtual; - fb_fix.smem_len = fb_fix.line_length*fb_var.yres; - - address = 0xc6000000; - size = 64*1024*1024; - if (!request_mem_region(address, size, "S3triofb")) - return; - - s3trio_init(dp); - s3trio_base = ioremap(address, size); - fb_fix.smem_start = address; - fb_fix.type = FB_TYPE_PACKED_PIXELS; - fb_fix.type_aux = 0; - fb_fix.accel = FB_ACCEL_S3_TRIO64; - fb_fix.mmio_start = address+0x1000000; - fb_fix.mmio_len = 0x1000000; - - fb_fix.xpanstep = 1; - fb_fix.ypanstep = 1; - - s3trio_resetaccel(); - - mem_out8(0x30, s3trio_base+0x1008000 + 0x03D4); - mem_out8(0x2d, s3trio_base+0x1008000 + 0x03D4); - mem_out8(0x2e, s3trio_base+0x1008000 + 0x03D4); - - mem_out8(0x50, s3trio_base+0x1008000 + 0x03D4); - - /* disable HW cursor */ - - mem_out8(0x39, s3trio_base+0x1008000 + 0x03D4); - mem_out8(0xa0, s3trio_base+0x1008000 + 0x03D5); - - mem_out8(0x45, s3trio_base+0x1008000 + 0x03D4); - mem_out8(0, s3trio_base+0x1008000 + 0x03D5); - - mem_out8(0x4e, s3trio_base+0x1008000 + 0x03D4); - mem_out8(0, s3trio_base+0x1008000 + 0x03D5); - - mem_out8(0x4f, s3trio_base+0x1008000 + 0x03D4); - mem_out8(0, s3trio_base+0x1008000 + 0x03D5); - - /* init HW cursor */ - - CursorBase = (u_long *)(s3trio_base + 2*1024*1024 - 0x400); - for (i = 0; i < 8; i++) { - *(CursorBase +(i*4)) = 0xffffff00; - *(CursorBase+1+(i*4)) = 0xffff0000; - *(CursorBase+2+(i*4)) = 0xffff0000; - *(CursorBase+3+(i*4)) = 0xffff0000; - } - for (i = 8; i < 64; i++) { - *(CursorBase +(i*4)) = 0xffff0000; - *(CursorBase+1+(i*4)) = 0xffff0000; - *(CursorBase+2+(i*4)) = 0xffff0000; - *(CursorBase+3+(i*4)) = 0xffff0000; - } - - - mem_out8(0x4c, s3trio_base+0x1008000 + 0x03D4); - mem_out8(((2*1024 - 1)&0xf00)>>8, s3trio_base+0x1008000 + 0x03D5); - - mem_out8(0x4d, s3trio_base+0x1008000 + 0x03D4); - mem_out8((2*1024 - 1) & 0xff, s3trio_base+0x1008000 + 0x03D5); - - mem_out8(0x45, s3trio_base+0x1008000 + 0x03D4); - mem_in8(s3trio_base+0x1008000 + 0x03D4); - - mem_out8(0x4a, s3trio_base+0x1008000 + 0x03D4); - mem_out8(0x80, s3trio_base+0x1008000 + 0x03D5); - mem_out8(0x80, s3trio_base+0x1008000 + 0x03D5); - mem_out8(0x80, s3trio_base+0x1008000 + 0x03D5); - - mem_out8(0x4b, s3trio_base+0x1008000 + 0x03D4); - mem_out8(0x00, s3trio_base+0x1008000 + 0x03D5); - mem_out8(0x00, s3trio_base+0x1008000 + 0x03D5); - mem_out8(0x00, s3trio_base+0x1008000 + 0x03D5); - - mem_out8(0x45, s3trio_base+0x1008000 + 0x03D4); - mem_out8(0, s3trio_base+0x1008000 + 0x03D5); - - /* setup default color table */ - - for(i = 0; i < 16; i++) { - int j = color_table[i]; - palette[i].red=default_red[j]; - palette[i].green=default_grn[j]; - palette[i].blue=default_blu[j]; - } - - s3trio_setcolreg(255, 56, 100, 160, 0, NULL /* not used */); - s3trio_setcolreg(254, 0, 0, 0, 0, NULL /* not used */); - memset((char *)s3trio_base, 0, 640*480); - -#if 0 - Trio_RectFill(0, 0, 90, 90, 7, 1); -#endif - - fb_fix.visual = FB_VISUAL_PSEUDOCOLOR ; - fb_var.xoffset = fb_var.yoffset = 0; - fb_var.bits_per_pixel = 8; - fb_var.grayscale = 0; - fb_var.red.offset = fb_var.green.offset = fb_var.blue.offset = 0; - fb_var.red.length = fb_var.green.length = fb_var.blue.length = 8; - fb_var.red.msb_right = fb_var.green.msb_right = fb_var.blue.msb_right = 0; - fb_var.transp.offset = fb_var.transp.length = fb_var.transp.msb_right = 0; - fb_var.nonstd = 0; - fb_var.activate = 0; - fb_var.height = fb_var.width = -1; - fb_var.accel_flags = FB_ACCELF_TEXT; -#warning FIXME: always obey fb_var.accel_flags - fb_var.pixclock = 1; - fb_var.left_margin = fb_var.right_margin = 0; - fb_var.upper_margin = fb_var.lower_margin = 0; - fb_var.hsync_len = fb_var.vsync_len = 0; - fb_var.sync = 0; - fb_var.vmode = FB_VMODE_NONINTERLACED; - - disp.var = fb_var; - disp.cmap.start = 0; - disp.cmap.len = 0; - disp.cmap.red = disp.cmap.green = disp.cmap.blue = disp.cmap.transp = NULL; - disp.visual = fb_fix.visual; - disp.type = fb_fix.type; - disp.type_aux = fb_fix.type_aux; - disp.ypanstep = 0; - disp.ywrapstep = 0; - disp.line_length = fb_fix.line_length; - disp.can_soft_blank = 1; - disp.inverse = 0; -#ifdef FBCON_HAS_CFB8 - if (fb_var.accel_flags & FB_ACCELF_TEXT) - disp.dispsw = &fbcon_trio8; - else - disp.dispsw = &fbcon_cfb8; -#else - disp.dispsw = &fbcon_dummy; -#endif - disp.scrollmode = fb_var.accel_flags & FB_ACCELF_TEXT ? 0 : SCROLL_YREDRAW; - - strcpy(fb_info.modename, "Trio64 "); - strncat(fb_info.modename, dp->full_name, sizeof(fb_info.modename)); - fb_info.currcon = -1; - fb_info.fbops = &s3trio_ops; - fb_info.screen_base = s3trio_base; -#if 0 - fb_info.fbvar_num = 1; - fb_info.fbvar = &fb_var; -#endif - fb_info.disp = &disp; - fb_info.fontname[0] = '\0'; - fb_info.changevar = NULL; - fb_info.switch_con = &s3triofbcon_switch; - fb_info.updatevar = &s3triofbcon_updatevar; -#if 0 - fb_info.setcmap = &s3triofbcon_setcmap; -#endif - - fb_info.flags = FBINFO_FLAG_DEFAULT; - if (register_framebuffer(&fb_info) < 0) { - iounmap(fb_info.screen_base); - fb_info.screen_base = NULL; - return; - } - - printk("fb%d: S3 Trio frame buffer device on %s\n", - fb_info.node, dp->full_name); -} - - -static int s3triofbcon_switch(int con, struct fb_info *info) -{ - /* Do we have to save the colormap? */ - if (fb_display[info->currcon].cmap.len) - fb_get_cmap(&fb_display[info->currcon].cmap, 1, s3trio_getcolreg, info); - - info->currcon = con; - /* Install new colormap */ - do_install_cmap(con,info); - return 0; -} - - /* - * Update the `var' structure (called by fbcon.c) - */ - -static int s3triofbcon_updatevar(int con, struct fb_info *info) -{ - /* Nothing */ - return 0; -} - - /* - * Blank the display. - */ - -static int s3triofb_blank(int blank, struct fb_info *info) -{ - unsigned char x; - - mem_out8(0x1, s3trio_base+0x1008000 + 0x03c4); - x = mem_in8(s3trio_base+0x1008000 + 0x03c5); - mem_out8((x & (~0x20)) | (blank << 5), s3trio_base+0x1008000 + 0x03c5); - return 0; -} - - /* - * Read a single color register and split it into - * colors/transparent. Return != 0 for invalid regno. - */ - -static int s3trio_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue, - u_int *transp, struct fb_info *info) -{ - if (regno > 255) - return 1; - *red = (palette[regno].red << 8) | palette[regno].red; - *green = (palette[regno].green << 8) | palette[regno].green; - *blue = (palette[regno].blue << 8) | palette[regno].blue; - *transp = 0; - return 0; -} - - - /* - * Set a single color register. Return != 0 for invalid regno. - */ - -static int s3trio_setcolreg(u_int regno, u_int red, u_int green, u_int blue, - u_int transp, struct fb_info *info) -{ - if (regno > 255) - return 1; - - red >>= 8; - green >>= 8; - blue >>= 8; - palette[regno].red = red; - palette[regno].green = green; - palette[regno].blue = blue; - - mem_out8(regno,s3trio_base+0x1008000 + 0x3c8); - mem_out8((red & 0xff) >> 2,s3trio_base+0x1008000 + 0x3c9); - mem_out8((green & 0xff) >> 2,s3trio_base+0x1008000 + 0x3c9); - mem_out8((blue & 0xff) >> 2,s3trio_base+0x1008000 + 0x3c9); - - return 0; -} - -static void Trio_WaitQueue(u_short fifo) { - - u_short status; - - do - { - status = mem_in16(s3trio_base + 0x1000000 + 0x9AE8); - } while (!(status & fifo)); - -} - -static void Trio_WaitBlit(void) { - - u_short status; - - do - { - status = mem_in16(s3trio_base + 0x1000000 + 0x9AE8); - } while (status & 0x200); - -} - -static void Trio_BitBLT(u_short curx, u_short cury, u_short destx, - u_short desty, u_short width, u_short height, - u_short mode) { - - u_short blitcmd = 0xc011; - - /* Set drawing direction */ - /* -Y, X maj, -X (default) */ - - if (curx > destx) - blitcmd |= 0x0020; /* Drawing direction +X */ - else { - curx += (width - 1); - destx += (width - 1); - } - - if (cury > desty) - blitcmd |= 0x0080; /* Drawing direction +Y */ - else { - cury += (height - 1); - desty += (height - 1); - } - - Trio_WaitQueue(0x0400); - - outw(0xa000, 0xBEE8); - outw(0x60 | mode, 0xBAE8); - - outw(curx, 0x86E8); - outw(cury, 0x82E8); - - outw(destx, 0x8EE8); - outw(desty, 0x8AE8); - - outw(height - 1, 0xBEE8); - outw(width - 1, 0x96E8); - - outw(blitcmd, 0x9AE8); - -} - -static void Trio_RectFill(u_short x, u_short y, u_short width, u_short height, - u_short mode, u_short color) { - - u_short blitcmd = 0x40b1; - - Trio_WaitQueue(0x0400); - - outw(0xa000, 0xBEE8); - outw((0x20 | mode), 0xBAE8); - outw(0xe000, 0xBEE8); - outw(color, 0xA6E8); - outw(x, 0x86E8); - outw(y, 0x82E8); - outw((height - 1), 0xBEE8); - outw((width - 1), 0x96E8); - outw(blitcmd, 0x9AE8); - -} - - -static void Trio_MoveCursor(u_short x, u_short y) { - - mem_out8(0x39, s3trio_base + 0x1008000 + 0x3d4); - mem_out8(0xa0, s3trio_base + 0x1008000 + 0x3d5); - - mem_out8(0x46, s3trio_base + 0x1008000 + 0x3d4); - mem_out8((x & 0x0700) >> 8, s3trio_base + 0x1008000 + 0x3d5); - mem_out8(0x47, s3trio_base + 0x1008000 + 0x3d4); - mem_out8(x & 0x00ff, s3trio_base + 0x1008000 + 0x3d5); - - mem_out8(0x48, s3trio_base + 0x1008000 + 0x3d4); - mem_out8((y & 0x0700) >> 8, s3trio_base + 0x1008000 + 0x3d5); - mem_out8(0x49, s3trio_base + 0x1008000 + 0x3d4); - mem_out8(y & 0x00ff, s3trio_base + 0x1008000 + 0x3d5); - -} - - - /* - * Text console acceleration - */ - -#ifdef FBCON_HAS_CFB8 -static void fbcon_trio8_bmove(struct display *p, int sy, int sx, int dy, - int dx, int height, int width) -{ - sx *= 8; dx *= 8; width *= 8; - Trio_BitBLT((u_short)sx, (u_short)(sy*fontheight(p)), (u_short)dx, - (u_short)(dy*fontheight(p)), (u_short)width, - (u_short)(height*fontheight(p)), (u_short)S3_NEW); -} - -static void fbcon_trio8_clear(struct vc_data *conp, struct display *p, int sy, - int sx, int height, int width) -{ - unsigned char bg; - - sx *= 8; width *= 8; - bg = attr_bgcol_ec(p,conp); - Trio_RectFill((u_short)sx, - (u_short)(sy*fontheight(p)), - (u_short)width, - (u_short)(height*fontheight(p)), - (u_short)S3_NEW, - (u_short)bg); -} - -static void fbcon_trio8_putc(struct vc_data *conp, struct display *p, int c, - int yy, int xx) -{ - Trio_WaitBlit(); - fbcon_cfb8_putc(conp, p, c, yy, xx); -} - -static void fbcon_trio8_putcs(struct vc_data *conp, struct display *p, - const unsigned short *s, int count, int yy, int xx) -{ - Trio_WaitBlit(); - fbcon_cfb8_putcs(conp, p, s, count, yy, xx); -} - -static void fbcon_trio8_revc(struct display *p, int xx, int yy) -{ - Trio_WaitBlit(); - fbcon_cfb8_revc(p, xx, yy); -} - -static struct display_switch fbcon_trio8 = { - .setup = fbcon_cfb8_setup, - .bmove = fbcon_trio8_bmove, - .clear = fbcon_trio8_clear, - .putc = fbcon_trio8_putc, - .putcs = fbcon_trio8_putcs, - .revc = fbcon_trio8_revc, - .clear_margins = fbcon_cfb8_clear_margins, - .fontwidthmask = FONTWIDTH(8) -}; -#endif - -MODULE_LICENSE("GPL"); diff --git a/drivers/video/aty/atyfb_base.c b/drivers/video/aty/atyfb_base.c index f2ebdd88008..301612cef35 100644 --- a/drivers/video/aty/atyfb_base.c +++ b/drivers/video/aty/atyfb_base.c @@ -2566,7 +2566,7 @@ static int __devinit aty_init(struct fb_info *info) info->fix.smem_len == 0x80000 ? 'K' : 'M', ramname, xtal, par->pll_limits.pll_max, par->pll_limits.mclk, par->pll_limits.xclk); -#if defined(DEBUG) && defined(CONFIG_ATY_CT) +#if defined(DEBUG) && defined(CONFIG_FB_ATY_CT) if (M64_HAS(INTEGRATED)) { int i; printk("debug atyfb: BUS_CNTL DAC_CNTL MEM_CNTL EXT_MEM_CNTL CRTC_GEN_CNTL " @@ -2957,8 +2957,6 @@ extern void (*prom_palette) (int); static int __devinit atyfb_setup_sparc(struct pci_dev *pdev, struct fb_info *info, unsigned long addr) { - extern int con_is_present(void); - struct atyfb_par *par = info->par; struct pcidev_cookie *pcp; char prop[128]; diff --git a/drivers/video/au1100fb.c b/drivers/video/au1100fb.c index ef5c16f7f5a..80a81eccad3 100644 --- a/drivers/video/au1100fb.c +++ b/drivers/video/au1100fb.c @@ -468,11 +468,10 @@ int au1100fb_drv_probe(struct device *dev) return -EINVAL; /* Allocate new device private */ - if (!(fbdev = kmalloc(sizeof(struct au1100fb_device), GFP_KERNEL))) { + if (!(fbdev = kzalloc(sizeof(struct au1100fb_device), GFP_KERNEL))) { print_err("fail to allocate device private record"); return -ENOMEM; } - memset((void*)fbdev, 0, sizeof(struct au1100fb_device)); fbdev->panel = &known_lcd_panels[drv_info.panel_idx]; @@ -549,10 +548,9 @@ int au1100fb_drv_probe(struct device *dev) fbdev->info.fbops = &au1100fb_ops; fbdev->info.fix = au1100fb_fix; - if (!(fbdev->info.pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL))) { + if (!(fbdev->info.pseudo_palette = kzalloc(sizeof(u32) * 16, GFP_KERNEL))) { return -ENOMEM; } - memset(fbdev->info.pseudo_palette, 0, sizeof(u32) * 16); if (fb_alloc_cmap(&fbdev->info.cmap, AU1100_LCD_NBR_PALETTE_ENTRIES, 0) < 0) { print_err("Fail to allocate colormap (%d entries)", diff --git a/drivers/video/console/fbcon.c b/drivers/video/console/fbcon.c index 31f476a6479..ce5ac268074 100644 --- a/drivers/video/console/fbcon.c +++ b/drivers/video/console/fbcon.c @@ -2071,7 +2071,7 @@ static int fbcon_resize(struct vc_data *vc, unsigned int width, y_diff = info->var.yres - var.yres; if (x_diff < 0 || x_diff > virt_fw || y_diff < 0 || y_diff > virt_fh) { - struct fb_videomode *mode; + const struct fb_videomode *mode; DPRINTK("attempting resize %ix%i\n", var.xres, var.yres); mode = fb_find_best_mode(&var, &info->modelist); @@ -2975,7 +2975,7 @@ static void fbcon_new_modelist(struct fb_info *info) int i; struct vc_data *vc; struct fb_var_screeninfo var; - struct fb_videomode *mode; + const struct fb_videomode *mode; for (i = first_fb_vc; i <= last_fb_vc; i++) { if (registered_fb[con2fb_map[i]] != info) diff --git a/drivers/video/console/fbcon.h b/drivers/video/console/fbcon.h index b9386d168c0..71f24e00fcd 100644 --- a/drivers/video/console/fbcon.h +++ b/drivers/video/console/fbcon.h @@ -48,7 +48,7 @@ struct display { struct fb_bitfield green; struct fb_bitfield blue; struct fb_bitfield transp; - struct fb_videomode *mode; + const struct fb_videomode *mode; }; struct fbcon_ops { diff --git a/drivers/video/controlfb.c b/drivers/video/controlfb.c index 04c6d928189..fd60dba294d 100644 --- a/drivers/video/controlfb.c +++ b/drivers/video/controlfb.c @@ -696,11 +696,10 @@ static int __init control_of_init(struct device_node *dp) printk(KERN_ERR "can't get 2 addresses for control\n"); return -ENXIO; } - p = kmalloc(sizeof(*p), GFP_KERNEL); + p = kzalloc(sizeof(*p), GFP_KERNEL); if (p == 0) return -ENXIO; control_fb = p; /* save it for cleanups */ - memset(p, 0, sizeof(*p)); /* Map in frame buffer and registers */ p->fb_orig_base = fb_res.start; diff --git a/drivers/video/cyber2000fb.c b/drivers/video/cyber2000fb.c index aae6d9c26e8..7a6eeda5ae9 100644 --- a/drivers/video/cyber2000fb.c +++ b/drivers/video/cyber2000fb.c @@ -1539,16 +1539,21 @@ static int cyberpro_pci_enable_mmio(struct cfb_info *cfb) /* * Allow the CyberPro to accept PCI burst accesses */ - val = cyber2000_grphr(EXT_BUS_CTL, cfb); - if (!(val & EXT_BUS_CTL_PCIBURST_WRITE)) { - printk(KERN_INFO "%s: enabling PCI bursts\n", cfb->fb.fix.id); + if (cfb->id == ID_CYBERPRO_2010) { + printk(KERN_INFO "%s: NOT enabling PCI bursts\n", cfb->fb.fix.id); + } else { + val = cyber2000_grphr(EXT_BUS_CTL, cfb); + if (!(val & EXT_BUS_CTL_PCIBURST_WRITE)) { + printk(KERN_INFO "%s: enabling PCI bursts\n", + cfb->fb.fix.id); - val |= EXT_BUS_CTL_PCIBURST_WRITE; + val |= EXT_BUS_CTL_PCIBURST_WRITE; - if (cfb->id == ID_CYBERPRO_5000) - val |= EXT_BUS_CTL_PCIBURST_READ; + if (cfb->id == ID_CYBERPRO_5000) + val |= EXT_BUS_CTL_PCIBURST_READ; - cyber2000_grphw(EXT_BUS_CTL, val, cfb); + cyber2000_grphw(EXT_BUS_CTL, val, cfb); + } } return 0; diff --git a/drivers/video/cyberfb.c b/drivers/video/cyberfb.c deleted file mode 100644 index 0b8d5b12115..00000000000 --- a/drivers/video/cyberfb.c +++ /dev/null @@ -1,2295 +0,0 @@ -/* -* linux/drivers/video/cyberfb.c -- CyberVision64 frame buffer device -* $Id: cyberfb.c,v 1.6 1998/09/11 04:54:58 abair Exp $ -* -* Copyright (C) 1998 Alan Bair -* -* This file is based on two CyberVision64 frame buffer device drivers -* -* The second CyberVision64 frame buffer device (cvision.c cvision_core.c): -* -* Copyright (c) 1997 Antonio Santos -* -* Released as a patch to 2.1.35, but never included in the source tree. -* This is based on work from the NetBSD CyberVision64 frame buffer driver -* and support files (grf_cv.c, grf_cvreg.h, ite_cv.c): -* Permission to use the source of this driver was obtained from the -* author Michael Teske by Alan Bair. -* -* Copyright (c) 1995 Michael Teske -* -* The first CyberVision64 frame buffer device (cyberfb.c): -* -* Copyright (C) 1996 Martin Apel -* Geert Uytterhoeven -* -* Which is based on the Amiga frame buffer device (amifb.c): -* -* Copyright (C) 1995 Geert Uytterhoeven -* -* -* History: -* - 22 Dec 95: Original version by Martin Apel -* - 05 Jan 96: Geert: integration into the current source tree -* - 01 Aug 98: Alan: Merge in code from cvision.c and cvision_core.c -* $Log: cyberfb.c,v $ -* Revision 1.6 1998/09/11 04:54:58 abair -* Update for 2.1.120 change in include file location. -* Clean up for public release. -* -* Revision 1.5 1998/09/03 04:27:13 abair -* Move cv64_load_video_mode to cyber_set_video so a new video mode is install -* with each change of the 'var' data. -* -* Revision 1.4 1998/09/01 00:31:17 abair -* Put in a set of default 8,16,24 bpp modes and map cyber8,16 to them. -* Update operations with 'par' to handle a more complete set of parameter -* values for encode/decode process. -* -* Revision 1.3 1998/08/31 21:31:33 abair -* Swap 800x490 for 640x480 video mode and more cleanup. -* Abandon idea to resurrect "custom" mode setting via kernel opts, -* instead work on making use of fbset program to do this. -* -* Revision 1.2 1998/08/31 06:17:08 abair -* Make updates for changes in cyberfb.c released in 2.1.119 -* and do some cleanup of the code. -* -* Revision 1.1 1998/08/29 18:38:31 abair -* Initial revision -* -* Revision 1.3 1998/08/17 06:21:53 abair -* Remove more redundant code after merging in cvision_core.c -* Set blanking by colormap to pale red to detect this vs trying to -* use video blanking. More formating to Linux code style. -* -* Revision 1.2 1998/08/15 17:51:37 abair -* Added cvision_core.c code from 2.1.35 patches. -* Changed to compile correctly and switch to using initialization -* code. Added debugging and dropping of duplicate code. -* -* -* -* This file is subject to the terms and conditions of the GNU General Public -* License. See the file COPYING in the main directory of this archive -* for more details. -*/ - - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/string.h> -#include <linux/mm.h> -#include <linux/slab.h> -#include <linux/delay.h> -#include <linux/zorro.h> -#include <linux/fb.h> -#include <linux/init.h> -#include <asm/uaccess.h> -#include <asm/system.h> -#include <asm/irq.h> -#include <asm/pgtable.h> -#include <asm/amigahw.h> -#include <asm/io.h> - -#include "cyberfb.h" -#include <video/fbcon.h> -#include <video/fbcon-cfb8.h> -#include <video/fbcon-cfb16.h> - -/*#define CYBERFBDEBUG*/ -#ifdef CYBERFBDEBUG -#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args) -static void cv64_dump(void); -#else -#define DPRINTK(fmt, args...) -#endif - -#define wb_64(regs,reg,dat) (*(((volatile unsigned char *)regs) + reg) = dat) -#define rb_64(regs, reg) (*(((volatile unsigned char *)regs) + reg)) - -struct cyberfb_par { - struct fb_var_screeninfo var; - __u32 type; - __u32 type_aux; - __u32 visual; - __u32 line_length; -}; - -static struct cyberfb_par current_par; - -static int current_par_valid = 0; - -static struct display disp; -static struct fb_info fb_info; - - -/* - * Frame Buffer Name - */ - -static char cyberfb_name[16] = "Cybervision"; - - -/* - * CyberVision Graphics Board - */ - -static unsigned char Cyber_colour_table [256][3]; -static unsigned long CyberSize; -static volatile unsigned char *CyberBase; -static volatile unsigned char *CyberMem; -static volatile unsigned char *CyberRegs; -static unsigned long CyberMem_phys; -static unsigned long CyberRegs_phys; - -/* - * Predefined Video Modes - */ - -static struct { - const char *name; - struct fb_var_screeninfo var; -} cyberfb_predefined[] __initdata = { - { "640x480-8", { /* Default 8 BPP mode (cyber8) */ - 640, 480, 640, 480, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 39722, 40, 24, 32, 11, 96, 2, - FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, - FB_VMODE_NONINTERLACED - }}, - { "640x480-16", { /* Default 16 BPP mode (cyber16) */ - 640, 480, 640, 480, 0, 0, 16, 0, - {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 39722, 40, 24, 32, 11, 96, 2, - FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, - FB_VMODE_NONINTERLACED - }}, - { "640x480-24", { /* Default 24 BPP mode */ - 640, 480, 640, 480, 0, 0, 24, 0, - {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 39722, 40, 24, 32, 11, 96, 2, - FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, - FB_VMODE_NONINTERLACED - }}, - { "800x490-8", { /* Cybervision 8 bpp */ - /* NO Acceleration */ - 800, 490, 800, 490, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCEL_NONE, 33333, 80, 24, 23, 1, 56, 8, - FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, - FB_VMODE_NONINTERLACED - }}, -/* I can't test these with my monitor, but I suspect they will - * be OK, since Antonio Santos indicated he had tested them in - * his system. - */ - { "800x600-8", { /* Cybervision 8 bpp */ - 800, 600, 800, 600, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 27778, 64, 24, 22, 1, 72, 2, - FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, - FB_VMODE_NONINTERLACED - }}, - { "1024x768-8", { /* Cybervision 8 bpp */ - 1024, 768, 1024, 768, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 16667, 224, 72, 60, 12, 168, 4, - FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, - FB_VMODE_NONINTERLACED - }}, - { "1152x886-8", { /* Cybervision 8 bpp */ - 1152, 886, 1152, 886, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 15873, 184, 40, 24, 1, 56, 16, - FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, - FB_VMODE_NONINTERLACED - }}, - { "1280x1024-8", { /* Cybervision 8 bpp */ - 1280, 1024, 1280, 1024, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 16667, 256, 48, 50, 12, 72, 4, - FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, - FB_VMODE_INTERLACED - }} -}; - -#define NUM_TOTAL_MODES ARRAY_SIZE(cyberfb_predefined) - -static int Cyberfb_inverse = 0; - -/* - * Some default modes - */ - -#define CYBER8_DEFMODE (0) -#define CYBER16_DEFMODE (1) - -static struct fb_var_screeninfo cyberfb_default; -static int cyberfb_usermode __initdata = 0; - -/* - * Interface used by the world - */ - -int cyberfb_setup(char *options); - -static int cyberfb_get_fix(struct fb_fix_screeninfo *fix, int con, - struct fb_info *info); -static int cyberfb_get_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info); -static int cyberfb_set_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info); -static int cyberfb_get_cmap(struct fb_cmap *cmap, int kspc, int con, - struct fb_info *info); -static int cyberfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, - u_int transp, struct fb_info *info); -static int cyberfb_blank(int blank, struct fb_info *info); - -/* - * Interface to the low level console driver - */ - -int cyberfb_init(void); -static int Cyberfb_switch(int con, struct fb_info *info); -static int Cyberfb_updatevar(int con, struct fb_info *info); - -/* - * Text console acceleration - */ - -#ifdef FBCON_HAS_CFB8 -static struct display_switch fbcon_cyber8; -#endif - -/* - * Accelerated Functions used by the low level console driver - */ - -static void Cyber_WaitQueue(u_short fifo); -static void Cyber_WaitBlit(void); -static void Cyber_BitBLT(u_short curx, u_short cury, u_short destx, - u_short desty, u_short width, u_short height, - u_short mode); -static void Cyber_RectFill(u_short x, u_short y, u_short width, u_short height, - u_short mode, u_short color); -#if 0 -static void Cyber_MoveCursor(u_short x, u_short y); -#endif - -/* - * Hardware Specific Routines - */ - -static int Cyber_init(void); -static int Cyber_encode_fix(struct fb_fix_screeninfo *fix, - struct cyberfb_par *par); -static int Cyber_decode_var(struct fb_var_screeninfo *var, - struct cyberfb_par *par); -static int Cyber_encode_var(struct fb_var_screeninfo *var, - struct cyberfb_par *par); -static int Cyber_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue, - u_int *transp, struct fb_info *info); - -/* - * Internal routines - */ - -static void cyberfb_get_par(struct cyberfb_par *par); -static void cyberfb_set_par(struct cyberfb_par *par); -static int do_fb_set_var(struct fb_var_screeninfo *var, int isactive); -static void cyberfb_set_disp(int con, struct fb_info *info); -static int get_video_mode(const char *name); - -/* For cvision_core.c */ -static unsigned short cv64_compute_clock(unsigned long); -static int cv_has_4mb (volatile unsigned char *); -static void cv64_board_init (void); -static void cv64_load_video_mode (struct fb_var_screeninfo *); - - -/* -------------------- Hardware specific routines ------------------------- */ - - -/* - * Initialization - * - * Set the default video mode for this chipset. If a video mode was - * specified on the command line, it will override the default mode. - */ - -static int Cyber_init(void) -{ - volatile unsigned char *regs = CyberRegs; - volatile unsigned long *CursorBase; - int i; - DPRINTK("ENTER\n"); - -/* Init local cmap as greyscale levels */ - for (i = 0; i < 256; i++) { - Cyber_colour_table [i][0] = i; - Cyber_colour_table [i][1] = i; - Cyber_colour_table [i][2] = i; - } - -/* Initialize the board and determine fbmem size */ - cv64_board_init(); -#ifdef CYBERFBDEBUG - DPRINTK("Register state after initing board\n"); - cv64_dump(); -#endif -/* Clear framebuffer memory */ - DPRINTK("Clear framebuffer memory\n"); - memset ((char *)CyberMem, 0, CyberSize); - -/* Disable hardware cursor */ - DPRINTK("Disable HW cursor\n"); - wb_64(regs, S3_CRTC_ADR, S3_REG_LOCK2); - wb_64(regs, S3_CRTC_DATA, 0xa0); - wb_64(regs, S3_CRTC_ADR, S3_HGC_MODE); - wb_64(regs, S3_CRTC_DATA, 0x00); - wb_64(regs, S3_CRTC_ADR, S3_HWGC_DX); - wb_64(regs, S3_CRTC_DATA, 0x00); - wb_64(regs, S3_CRTC_ADR, S3_HWGC_DY); - wb_64(regs, S3_CRTC_DATA, 0x00); - -/* Initialize hardware cursor */ - DPRINTK("Init HW cursor\n"); - CursorBase = (u_long *)((char *)(CyberMem) + CyberSize - 0x400); - for (i=0; i < 8; i++) - { - *(CursorBase +(i*4)) = 0xffffff00; - *(CursorBase+1+(i*4)) = 0xffff0000; - *(CursorBase+2+(i*4)) = 0xffff0000; - *(CursorBase+3+(i*4)) = 0xffff0000; - } - for (i=8; i < 64; i++) - { - *(CursorBase +(i*4)) = 0xffff0000; - *(CursorBase+1+(i*4)) = 0xffff0000; - *(CursorBase+2+(i*4)) = 0xffff0000; - *(CursorBase+3+(i*4)) = 0xffff0000; - } - - cyberfb_setcolreg (255, 56<<8, 100<<8, 160<<8, 0, NULL /* unused */); - cyberfb_setcolreg (254, 0, 0, 0, 0, NULL /* unused */); - - DPRINTK("EXIT\n"); - return 0; -} - - -/* - * This function should fill in the `fix' structure based on the - * values in the `par' structure. - */ - -static int Cyber_encode_fix(struct fb_fix_screeninfo *fix, - struct cyberfb_par *par) -{ - DPRINTK("ENTER\n"); - memset(fix, 0, sizeof(struct fb_fix_screeninfo)); - strcpy(fix->id, cyberfb_name); - fix->smem_start = CyberMem_phys; - fix->smem_len = CyberSize; - fix->mmio_start = CyberRegs_phys; - fix->mmio_len = 0x10000; - - fix->type = FB_TYPE_PACKED_PIXELS; - fix->type_aux = 0; - if (par->var.bits_per_pixel == 15 || par->var.bits_per_pixel == 16 || - par->var.bits_per_pixel == 24 || par->var.bits_per_pixel == 32) { - fix->visual = FB_VISUAL_DIRECTCOLOR; - } else { - fix->visual = FB_VISUAL_PSEUDOCOLOR; - } - - fix->xpanstep = 0; - fix->ypanstep = 0; - fix->ywrapstep = 0; - fix->line_length = 0; - fix->accel = FB_ACCEL_S3_TRIO64; - - DPRINTK("EXIT\n"); - return(0); -} - - -/* -* Fill the `par' structure based on the values in `var'. -* TODO: Verify and adjust values, return -EINVAL if bad. -*/ - -static int Cyber_decode_var(struct fb_var_screeninfo *var, - struct cyberfb_par *par) -{ - DPRINTK("ENTER\n"); - par->var.xres = var->xres; - par->var.yres = var->yres; - par->var.xres_virtual = var->xres_virtual; - par->var.yres_virtual = var->yres_virtual; - par->var.xoffset = var->xoffset; - par->var.yoffset = var->yoffset; - par->var.bits_per_pixel = var->bits_per_pixel; - par->var.grayscale = var->grayscale; - par->var.red = var->red; - par->var.green = var->green; - par->var.blue = var->blue; - par->var.transp = var->transp; - par->var.nonstd = var->nonstd; - par->var.activate = var->activate; - par->var.height = var->height; - par->var.width = var->width; - if (var->accel_flags & FB_ACCELF_TEXT) { - par->var.accel_flags = FB_ACCELF_TEXT; - } else { - par->var.accel_flags = 0; - } - par->var.pixclock = var->pixclock; - par->var.left_margin = var->left_margin; - par->var.right_margin = var->right_margin; - par->var.upper_margin = var->upper_margin; - par->var.lower_margin = var->lower_margin; - par->var.hsync_len = var->hsync_len; - par->var.vsync_len = var->vsync_len; - par->var.sync = var->sync; - par->var.vmode = var->vmode; - DPRINTK("EXIT\n"); - return(0); -} - -/* -* Fill the `var' structure based on the values in `par' and maybe -* other values read out of the hardware. -*/ - -static int Cyber_encode_var(struct fb_var_screeninfo *var, - struct cyberfb_par *par) -{ - DPRINTK("ENTER\n"); - var->xres = par->var.xres; - var->yres = par->var.yres; - var->xres_virtual = par->var.xres_virtual; - var->yres_virtual = par->var.yres_virtual; - var->xoffset = par->var.xoffset; - var->yoffset = par->var.yoffset; - - var->bits_per_pixel = par->var.bits_per_pixel; - var->grayscale = par->var.grayscale; - - var->red = par->var.red; - var->green = par->var.green; - var->blue = par->var.blue; - var->transp = par->var.transp; - - var->nonstd = par->var.nonstd; - var->activate = par->var.activate; - - var->height = par->var.height; - var->width = par->var.width; - - var->accel_flags = par->var.accel_flags; - - var->pixclock = par->var.pixclock; - var->left_margin = par->var.left_margin; - var->right_margin = par->var.right_margin; - var->upper_margin = par->var.upper_margin; - var->lower_margin = par->var.lower_margin; - var->hsync_len = par->var.hsync_len; - var->vsync_len = par->var.vsync_len; - var->sync = par->var.sync; - var->vmode = par->var.vmode; - - DPRINTK("EXIT\n"); - return(0); -} - - -/* - * Set a single color register. Return != 0 for invalid regno. - */ - -static int cyberfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, - u_int transp, struct fb_info *info) -{ - volatile unsigned char *regs = CyberRegs; - - /*DPRINTK("ENTER\n");*/ - if (regno > 255) { - DPRINTK("EXIT - Register # > 255\n"); - return (1); - } - - wb_64(regs, 0x3c8, (unsigned char) regno); - - red >>= 10; - green >>= 10; - blue >>= 10; - - Cyber_colour_table [regno][0] = red; - Cyber_colour_table [regno][1] = green; - Cyber_colour_table [regno][2] = blue; - - wb_64(regs, 0x3c9, red); - wb_64(regs, 0x3c9, green); - wb_64(regs, 0x3c9, blue); - - /*DPRINTK("EXIT\n");*/ - return (0); -} - - -/* -* Read a single color register and split it into -* colors/transparent. Return != 0 for invalid regno. -*/ - -static int Cyber_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue, - u_int *transp, struct fb_info *info) -{ - int t; - - /*DPRINTK("ENTER\n");*/ - if (regno > 255) { - DPRINTK("EXIT - Register # > 255\n"); - return (1); - } - /* ARB This shifting & oring seems VERY strange */ - t = Cyber_colour_table [regno][0]; - *red = (t<<10) | (t<<4) | (t>>2); - t = Cyber_colour_table [regno][1]; - *green = (t<<10) | (t<<4) | (t>>2); - t = Cyber_colour_table [regno][2]; - *blue = (t<<10) | (t<<4) | (t>>2); - *transp = 0; - /*DPRINTK("EXIT\n");*/ - return (0); -} - - -/* -* (Un)Blank the screen -* blank: 1 = zero fb cmap -* 0 = restore fb cmap from local cmap -*/ -static int cyberfb_blank(int blank, struct fb_info *info) -{ - volatile unsigned char *regs = CyberRegs; - int i; - - DPRINTK("ENTER\n"); -#if 0 -/* Blank by turning gfx off */ - gfx_on_off (1, regs); -#else - if (blank) { - for (i = 0; i < 256; i++) { - wb_64(regs, 0x3c8, (unsigned char) i); - /* ARB Pale red to detect this blanking method */ - wb_64(regs, 0x3c9, 48); - wb_64(regs, 0x3c9, 0); - wb_64(regs, 0x3c9, 0); - } - } else { - for (i = 0; i < 256; i++) { - wb_64(regs, 0x3c8, (unsigned char) i); - wb_64(regs, 0x3c9, Cyber_colour_table[i][0]); - wb_64(regs, 0x3c9, Cyber_colour_table[i][1]); - wb_64(regs, 0x3c9, Cyber_colour_table[i][2]); - } - } -#endif - DPRINTK("EXIT\n"); - return 0; -} - - -/************************************************************** - * We are waiting for "fifo" FIFO-slots empty - */ -static void Cyber_WaitQueue (u_short fifo) -{ - unsigned short status; - - DPRINTK("ENTER\n"); - do { - status = *((u_short volatile *)(CyberRegs + S3_GP_STAT)); - } while (status & fifo); - DPRINTK("EXIT\n"); -} - -/************************************************************** - * We are waiting for Hardware (Graphics Engine) not busy - */ -static void Cyber_WaitBlit (void) -{ - unsigned short status; - - DPRINTK("ENTER\n"); - do { - status = *((u_short volatile *)(CyberRegs + S3_GP_STAT)); - } while (status & S3_HDW_BUSY); - DPRINTK("EXIT\n"); -} - -/************************************************************** - * BitBLT - Through the Plane - */ -static void Cyber_BitBLT (u_short curx, u_short cury, u_short destx, - u_short desty, u_short width, u_short height, - u_short mode) -{ - volatile unsigned char *regs = CyberRegs; - u_short blitcmd = S3_BITBLT; - - DPRINTK("ENTER\n"); - /* Set drawing direction */ - /* -Y, X maj, -X (default) */ - if (curx > destx) { - blitcmd |= 0x0020; /* Drawing direction +X */ - } else { - curx += (width - 1); - destx += (width - 1); - } - - if (cury > desty) { - blitcmd |= 0x0080; /* Drawing direction +Y */ - } else { - cury += (height - 1); - desty += (height - 1); - } - - Cyber_WaitQueue (0x8000); - - *((u_short volatile *)(regs + S3_PIXEL_CNTL)) = 0xa000; - *((u_short volatile *)(regs + S3_FRGD_MIX)) = (0x0060 | mode); - - *((u_short volatile *)(regs + S3_CUR_X)) = curx; - *((u_short volatile *)(regs + S3_CUR_Y)) = cury; - - *((u_short volatile *)(regs + S3_DESTX_DIASTP)) = destx; - *((u_short volatile *)(regs + S3_DESTY_AXSTP)) = desty; - - *((u_short volatile *)(regs + S3_MIN_AXIS_PCNT)) = height - 1; - *((u_short volatile *)(regs + S3_MAJ_AXIS_PCNT)) = width - 1; - - *((u_short volatile *)(regs + S3_CMD)) = blitcmd; - DPRINTK("EXIT\n"); -} - -/************************************************************** - * Rectangle Fill Solid - */ -static void Cyber_RectFill (u_short x, u_short y, u_short width, - u_short height, u_short mode, u_short color) -{ - volatile unsigned char *regs = CyberRegs; - u_short blitcmd = S3_FILLEDRECT; - - DPRINTK("ENTER\n"); - Cyber_WaitQueue (0x8000); - - *((u_short volatile *)(regs + S3_PIXEL_CNTL)) = 0xa000; - *((u_short volatile *)(regs + S3_FRGD_MIX)) = (0x0020 | mode); - - *((u_short volatile *)(regs + S3_MULT_MISC)) = 0xe000; - *((u_short volatile *)(regs + S3_FRGD_COLOR)) = color; - - *((u_short volatile *)(regs + S3_CUR_X)) = x; - *((u_short volatile *)(regs + S3_CUR_Y)) = y; - - *((u_short volatile *)(regs + S3_MIN_AXIS_PCNT)) = height - 1; - *((u_short volatile *)(regs + S3_MAJ_AXIS_PCNT)) = width - 1; - - *((u_short volatile *)(regs + S3_CMD)) = blitcmd; - DPRINTK("EXIT\n"); -} - - -#if 0 -/************************************************************** - * Move cursor to x, y - */ -static void Cyber_MoveCursor (u_short x, u_short y) -{ - volatile unsigned char *regs = CyberRegs; - DPRINTK("ENTER\n"); - *(regs + S3_CRTC_ADR) = 0x39; - *(regs + S3_CRTC_DATA) = 0xa0; - - *(regs + S3_CRTC_ADR) = S3_HWGC_ORGX_H; - *(regs + S3_CRTC_DATA) = (char)((x & 0x0700) >> 8); - *(regs + S3_CRTC_ADR) = S3_HWGC_ORGX_L; - *(regs + S3_CRTC_DATA) = (char)(x & 0x00ff); - - *(regs + S3_CRTC_ADR) = S3_HWGC_ORGY_H; - *(regs + S3_CRTC_DATA) = (char)((y & 0x0700) >> 8); - *(regs + S3_CRTC_ADR) = S3_HWGC_ORGY_L; - *(regs + S3_CRTC_DATA) = (char)(y & 0x00ff); - DPRINTK("EXIT\n"); -} -#endif - - -/* -------------------- Generic routines ---------------------------------- */ - - -/* - * Fill the hardware's `par' structure. - */ - -static void cyberfb_get_par(struct cyberfb_par *par) -{ - DPRINTK("ENTER\n"); - if (current_par_valid) { - *par = current_par; - } else { - Cyber_decode_var(&cyberfb_default, par); - } - DPRINTK("EXIT\n"); -} - - -static void cyberfb_set_par(struct cyberfb_par *par) -{ - DPRINTK("ENTER\n"); - current_par = *par; - current_par_valid = 1; - DPRINTK("EXIT\n"); -} - - -static void cyber_set_video(struct fb_var_screeninfo *var) -{ - - /* Load the video mode defined by the 'var' data */ - cv64_load_video_mode (var); -#ifdef CYBERFBDEBUG - DPRINTK("Register state after loading video mode\n"); - cv64_dump(); -#endif -} - - -static int do_fb_set_var(struct fb_var_screeninfo *var, int isactive) -{ - int err, activate; - struct cyberfb_par par; - - DPRINTK("ENTER\n"); - if ((err = Cyber_decode_var(var, &par))) { - DPRINTK("EXIT - decode_var failed\n"); - return(err); - } - activate = var->activate; - if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW && isactive) - cyberfb_set_par(&par); - Cyber_encode_var(var, &par); - var->activate = activate; - - cyber_set_video(var); - DPRINTK("EXIT\n"); - return 0; -} - -/* - * Get the Fixed Part of the Display - */ - -static int cyberfb_get_fix(struct fb_fix_screeninfo *fix, int con, - struct fb_info *info) -{ - struct cyberfb_par par; - int error = 0; - - DPRINTK("ENTER\n"); - if (con == -1) { - cyberfb_get_par(&par); - } else { - error = Cyber_decode_var(&fb_display[con].var, &par); - } - DPRINTK("EXIT\n"); - return(error ? error : Cyber_encode_fix(fix, &par)); -} - - -/* - * Get the User Defined Part of the Display - */ - -static int cyberfb_get_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info) -{ - struct cyberfb_par par; - int error = 0; - - DPRINTK("ENTER\n"); - if (con == -1) { - cyberfb_get_par(&par); - error = Cyber_encode_var(var, &par); - disp.var = *var; /* ++Andre: don't know if this is the right place */ - } else { - *var = fb_display[con].var; - } - - DPRINTK("EXIT\n"); - return(error); -} - - -static void cyberfb_set_disp(int con, struct fb_info *info) -{ - struct fb_fix_screeninfo fix; - struct display *display; - - DPRINTK("ENTER\n"); - if (con >= 0) - display = &fb_display[con]; - else - display = &disp; /* used during initialization */ - - cyberfb_get_fix(&fix, con, info); - if (con == -1) - con = 0; - display->visual = fix.visual; - display->type = fix.type; - display->type_aux = fix.type_aux; - display->ypanstep = fix.ypanstep; - display->ywrapstep = fix.ywrapstep; - display->can_soft_blank = 1; - display->inverse = Cyberfb_inverse; - switch (display->var.bits_per_pixel) { -#ifdef FBCON_HAS_CFB8 - case 8: - if (display->var.accel_flags & FB_ACCELF_TEXT) { - display->dispsw = &fbcon_cyber8; -#warning FIXME: We should reinit the graphics engine here - } else - display->dispsw = &fbcon_cfb8; - break; -#endif -#ifdef FBCON_HAS_CFB16 - case 16: - display->dispsw = &fbcon_cfb16; - break; -#endif - default: - display->dispsw = NULL; - break; - } - DPRINTK("EXIT\n"); -} - - -/* - * Set the User Defined Part of the Display - */ - -static int cyberfb_set_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info) -{ - int err, oldxres, oldyres, oldvxres, oldvyres, oldbpp, oldaccel; - - DPRINTK("ENTER\n"); - if ((err = do_fb_set_var(var, con == info->currcon))) { - DPRINTK("EXIT - do_fb_set_var failed\n"); - return(err); - } - if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) { - oldxres = fb_display[con].var.xres; - oldyres = fb_display[con].var.yres; - oldvxres = fb_display[con].var.xres_virtual; - oldvyres = fb_display[con].var.yres_virtual; - oldbpp = fb_display[con].var.bits_per_pixel; - oldaccel = fb_display[con].var.accel_flags; - fb_display[con].var = *var; - if (oldxres != var->xres || oldyres != var->yres || - oldvxres != var->xres_virtual || - oldvyres != var->yres_virtual || - oldbpp != var->bits_per_pixel || - oldaccel != var->accel_flags) { - cyberfb_set_disp(con, info); - (*fb_info.changevar)(con); - fb_alloc_cmap(&fb_display[con].cmap, 0, 0); - do_install_cmap(con, info); - } - } - var->activate = 0; - DPRINTK("EXIT\n"); - return(0); -} - - -/* - * Get the Colormap - */ - -static int cyberfb_get_cmap(struct fb_cmap *cmap, int kspc, int con, - struct fb_info *info) -{ - DPRINTK("ENTER\n"); - if (con == info->currcon) { /* current console? */ - DPRINTK("EXIT - console is current console\n"); - return(fb_get_cmap(cmap, kspc, Cyber_getcolreg, info)); - } else if (fb_display[con].cmap.len) { /* non default colormap? */ - DPRINTK("Use console cmap\n"); - fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2); - } else { - DPRINTK("Use default cmap\n"); - fb_copy_cmap(fb_default_cmap(1<<fb_display[con].var.bits_per_pixel), - cmap, kspc ? 0 : 2); - } - DPRINTK("EXIT\n"); - return(0); -} - -static struct fb_ops cyberfb_ops = { - .owner = THIS_MODULE, - .fb_get_fix = cyberfb_get_fix, - .fb_get_var = cyberfb_get_var, - .fb_set_var = cyberfb_set_var, - .fb_get_cmap = cyberfb_get_cmap, - .fb_set_cmap = gen_set_cmap, - .fb_setcolreg = cyberfb_setcolreg, - .fb_blank = cyberfb_blank, -}; - -int __init cyberfb_setup(char *options) -{ - char *this_opt; - DPRINTK("ENTER\n"); - - fb_info.fontname[0] = '\0'; - - if (!options || !*options) { - DPRINTK("EXIT - no options\n"); - return 0; - } - - while ((this_opt = strsep(&options, ",")) != NULL) { - if (!*this_opt) - continue; - if (!strcmp(this_opt, "inverse")) { - Cyberfb_inverse = 1; - fb_invert_cmaps(); - } else if (!strncmp(this_opt, "font:", 5)) { - strcpy(fb_info.fontname, this_opt+5); - } else if (!strcmp (this_opt, "cyber8")) { - cyberfb_default = cyberfb_predefined[CYBER8_DEFMODE].var; - cyberfb_usermode = 1; - } else if (!strcmp (this_opt, "cyber16")) { - cyberfb_default = cyberfb_predefined[CYBER16_DEFMODE].var; - cyberfb_usermode = 1; - } else get_video_mode(this_opt); - } - - DPRINTK("default mode: xres=%d, yres=%d, bpp=%d\n", - cyberfb_default.xres, - cyberfb_default.yres, - cyberfb_default.bits_per_pixel); - DPRINTK("EXIT\n"); - return 0; -} - -/* - * Initialization - */ - -int __init cyberfb_init(void) -{ - unsigned long board_addr, board_size; - struct cyberfb_par par; - struct zorro_dev *z = NULL; - DPRINTK("ENTER\n"); - - while ((z = zorro_find_device(ZORRO_PROD_PHASE5_CYBERVISION64, z))) { - board_addr = z->resource.start; - board_size = z->resource.end-z->resource.start+1; - CyberMem_phys = board_addr + 0x01400000; - CyberRegs_phys = CyberMem_phys + 0x00c00000; - if (!request_mem_region(CyberRegs_phys, 0x10000, "S3 Trio64")) - continue; - if (!request_mem_region(CyberMem_phys, 0x400000, "RAM")) { - release_mem_region(CyberRegs_phys, 0x10000); - continue; - } - DPRINTK("board_addr=%08lx\n", board_addr); - DPRINTK("board_size=%08lx\n", board_size); - - CyberBase = ioremap(board_addr, board_size); - CyberRegs = CyberBase + 0x02000000; - CyberMem = CyberBase + 0x01400000; - DPRINTK("CyberBase=%08lx CyberRegs=%08lx CyberMem=%08lx\n", - CyberBase, (long unsigned int)CyberRegs, CyberMem); - -#ifdef CYBERFBDEBUG - DPRINTK("Register state just after mapping memory\n"); - cv64_dump(); -#endif - - strcpy(fb_info.modename, cyberfb_name); - fb_info.changevar = NULL; - fb_info.fbops = &cyberfb_ops; - fb_info.screen_base = (unsigned char *)CyberMem; - fb_info.disp = &disp; - fb_info.currcon = -1; - fb_info.switch_con = &Cyberfb_switch; - fb_info.updatevar = &Cyberfb_updatevar; - - Cyber_init(); - /* ++Andre: set cyberfb default mode */ - if (!cyberfb_usermode) { - cyberfb_default = cyberfb_predefined[CYBER8_DEFMODE].var; - DPRINTK("Use default cyber8 mode\n"); - } - Cyber_decode_var(&cyberfb_default, &par); - Cyber_encode_var(&cyberfb_default, &par); - - do_fb_set_var(&cyberfb_default, 1); - cyberfb_get_var(&fb_display[0].var, -1, &fb_info); - cyberfb_set_disp(-1, &fb_info); - do_install_cmap(0, &fb_info); - - if (register_framebuffer(&fb_info) < 0) { - DPRINTK("EXIT - register_framebuffer failed\n"); - if (CyberBase) - iounmap(CyberBase); - release_mem_region(CyberMem_phys, 0x400000); - release_mem_region(CyberRegs_phys, 0x10000); - return -EINVAL; - } - - printk("fb%d: %s frame buffer device, using %ldK of video memory\n", - fb_info.node, fb_info.modename, CyberSize>>10); - - /* TODO: This driver cannot be unloaded yet */ - DPRINTK("EXIT\n"); - return 0; - } - return -ENXIO; -} - - -static int Cyberfb_switch(int con, struct fb_info *info) -{ - DPRINTK("ENTER\n"); - /* Do we have to save the colormap? */ - if (fb_display[info->currcon].cmap.len) { - fb_get_cmap(&fb_display[info->currcon].cmap, 1, Cyber_getcolreg, - info); - } - - do_fb_set_var(&fb_display[con].var, 1); - info->currcon = con; - /* Install new colormap */ - do_install_cmap(con, info); - DPRINTK("EXIT\n"); - return(0); -} - - -/* - * Update the `var' structure (called by fbcon.c) - * - * This call looks only at yoffset and the FB_VMODE_YWRAP flag in `var'. - * Since it's called by a kernel driver, no range checking is done. - */ - -static int Cyberfb_updatevar(int con, struct fb_info *info) -{ - DPRINTK("Enter - Exit\n"); - return(0); -} - - -/* - * Get a Video Mode - */ - -static int __init get_video_mode(const char *name) -{ - int i; - - DPRINTK("ENTER\n"); - for (i = 0; i < NUM_TOTAL_MODES; i++) { - if (!strcmp(name, cyberfb_predefined[i].name)) { - cyberfb_default = cyberfb_predefined[i].var; - cyberfb_usermode = 1; - DPRINTK("EXIT - Matched predefined mode\n"); - return(i); - } - } - return(0); -} - - -/* - * Text console acceleration - */ - -#ifdef FBCON_HAS_CFB8 -static void fbcon_cyber8_bmove(struct display *p, int sy, int sx, int dy, - int dx, int height, int width) -{ - DPRINTK("ENTER\n"); - sx *= 8; dx *= 8; width *= 8; - Cyber_BitBLT((u_short)sx, (u_short)(sy*fontheight(p)), (u_short)dx, - (u_short)(dy*fontheight(p)), (u_short)width, - (u_short)(height*fontheight(p)), (u_short)S3_NEW); - DPRINTK("EXIT\n"); -} - -static void fbcon_cyber8_clear(struct vc_data *conp, struct display *p, int sy, - int sx, int height, int width) -{ - unsigned char bg; - - DPRINTK("ENTER\n"); - sx *= 8; width *= 8; - bg = attr_bgcol_ec(p,conp); - Cyber_RectFill((u_short)sx, - (u_short)(sy*fontheight(p)), - (u_short)width, - (u_short)(height*fontheight(p)), - (u_short)S3_NEW, - (u_short)bg); - DPRINTK("EXIT\n"); -} - -static void fbcon_cyber8_putc(struct vc_data *conp, struct display *p, int c, - int yy, int xx) -{ - DPRINTK("ENTER\n"); - Cyber_WaitBlit(); - fbcon_cfb8_putc(conp, p, c, yy, xx); - DPRINTK("EXIT\n"); -} - -static void fbcon_cyber8_putcs(struct vc_data *conp, struct display *p, - const unsigned short *s, int count, - int yy, int xx) -{ - DPRINTK("ENTER\n"); - Cyber_WaitBlit(); - fbcon_cfb8_putcs(conp, p, s, count, yy, xx); - DPRINTK("EXIT\n"); -} - -static void fbcon_cyber8_revc(struct display *p, int xx, int yy) -{ - DPRINTK("ENTER\n"); - Cyber_WaitBlit(); - fbcon_cfb8_revc(p, xx, yy); - DPRINTK("EXIT\n"); -} - -static struct display_switch fbcon_cyber8 = { - .setup = fbcon_cfb8_setup, - .bmove = fbcon_cyber8_bmove, - .clear = fbcon_cyber8_clear, - .putc = fbcon_cyber8_putc, - .putcs = fbcon_cyber8_putcs, - .revc = fbcon_cyber8_revc, - .clear_margins =fbcon_cfb8_clear_margins, - .fontwidthmask =FONTWIDTH(8) -}; -#endif - - -#ifdef MODULE -MODULE_LICENSE("GPL"); - -int init_module(void) -{ - return cyberfb_init(); -} -#endif /* MODULE */ - -/* - * - * Low level initialization routines for the CyberVision64 graphics card - * - * Most of the following code is from cvision_core.c - * - */ - -#define MAXPIXELCLOCK 135000000 /* safety */ - -#ifdef CV_AGGRESSIVE_TIMING -long cv64_memclk = 55000000; -#else -long cv64_memclk = 50000000; -#endif - -/*********************/ - -static unsigned char clocks[]={ - 0x13, 0x61, 0x6b, 0x6d, 0x51, 0x69, 0x54, 0x69, - 0x4f, 0x68, 0x6b, 0x6b, 0x18, 0x61, 0x7b, 0x6c, - 0x51, 0x67, 0x24, 0x62, 0x56, 0x67, 0x77, 0x6a, - 0x1d, 0x61, 0x53, 0x66, 0x6b, 0x68, 0x79, 0x69, - 0x7c, 0x69, 0x7f, 0x69, 0x22, 0x61, 0x54, 0x65, - 0x56, 0x65, 0x58, 0x65, 0x67, 0x66, 0x41, 0x63, - 0x27, 0x61, 0x13, 0x41, 0x37, 0x62, 0x6b, 0x4d, - 0x23, 0x43, 0x51, 0x49, 0x79, 0x66, 0x54, 0x49, - 0x7d, 0x66, 0x34, 0x56, 0x4f, 0x63, 0x1f, 0x42, - 0x6b, 0x4b, 0x7e, 0x4d, 0x18, 0x41, 0x2a, 0x43, - 0x7b, 0x4c, 0x74, 0x4b, 0x51, 0x47, 0x65, 0x49, - 0x24, 0x42, 0x68, 0x49, 0x56, 0x47, 0x75, 0x4a, - 0x77, 0x4a, 0x31, 0x43, 0x1d, 0x41, 0x71, 0x49, - 0x53, 0x46, 0x29, 0x42, 0x6b, 0x48, 0x1f, 0x41, - 0x79, 0x49, 0x6f, 0x48, 0x7c, 0x49, 0x38, 0x43, - 0x7f, 0x49, 0x5d, 0x46, 0x22, 0x41, 0x53, 0x45, - 0x54, 0x45, 0x55, 0x45, 0x56, 0x45, 0x57, 0x45, - 0x58, 0x45, 0x25, 0x41, 0x67, 0x46, 0x5b, 0x45, - 0x41, 0x43, 0x78, 0x47, 0x27, 0x41, 0x51, 0x44, - 0x13, 0x21, 0x7d, 0x47, 0x37, 0x42, 0x71, 0x46, - 0x6b, 0x2d, 0x14, 0x21, 0x23, 0x23, 0x7d, 0x2f, - 0x51, 0x29, 0x61, 0x2b, 0x79, 0x46, 0x1d, 0x22, - 0x54, 0x29, 0x45, 0x27, 0x7d, 0x46, 0x7f, 0x46, - 0x4f, 0x43, 0x2f, 0x41, 0x1f, 0x22, 0x6a, 0x2b, - 0x6b, 0x2b, 0x5b, 0x29, 0x7e, 0x2d, 0x65, 0x44, - 0x18, 0x21, 0x5e, 0x29, 0x2a, 0x23, 0x45, 0x26, - 0x7b, 0x2c, 0x19, 0x21, 0x74, 0x2b, 0x75, 0x2b, - 0x51, 0x27, 0x3f, 0x25, 0x65, 0x29, 0x40, 0x25, - 0x24, 0x22, 0x41, 0x25, 0x68, 0x29, 0x42, 0x25, - 0x56, 0x27, 0x7e, 0x2b, 0x75, 0x2a, 0x1c, 0x21, - 0x77, 0x2a, 0x4f, 0x26, 0x31, 0x23, 0x6f, 0x29, - 0x1d, 0x21, 0x32, 0x23, 0x71, 0x29, 0x72, 0x29, - 0x53, 0x26, 0x69, 0x28, 0x29, 0x22, 0x75, 0x29, - 0x6b, 0x28, 0x1f, 0x21, 0x1f, 0x21, 0x6d, 0x28, - 0x79, 0x29, 0x2b, 0x22, 0x6f, 0x28, 0x59, 0x26, - 0x7c, 0x29, 0x7d, 0x29, 0x38, 0x23, 0x21, 0x21, - 0x7f, 0x29, 0x39, 0x23, 0x5d, 0x26, 0x75, 0x28, - 0x22, 0x21, 0x77, 0x28, 0x53, 0x25, 0x6c, 0x27, - 0x54, 0x25, 0x61, 0x26, 0x55, 0x25, 0x30, 0x22, - 0x56, 0x25, 0x63, 0x26, 0x57, 0x25, 0x71, 0x27, - 0x58, 0x25, 0x7f, 0x28, 0x25, 0x21, 0x74, 0x27, - 0x67, 0x26, 0x40, 0x23, 0x5b, 0x25, 0x26, 0x21, - 0x41, 0x23, 0x34, 0x22, 0x78, 0x27, 0x6b, 0x26, - 0x27, 0x21, 0x35, 0x22, 0x51, 0x24, 0x7b, 0x27, - 0x13, 0x1, 0x13, 0x1, 0x7d, 0x27, 0x4c, 0x9, - 0x37, 0x22, 0x5b, 0xb, 0x71, 0x26, 0x5c, 0xb, - 0x6b, 0xd, 0x47, 0x23, 0x14, 0x1, 0x4f, 0x9, - 0x23, 0x3, 0x75, 0x26, 0x7d, 0xf, 0x1c, 0x2, - 0x51, 0x9, 0x59, 0x24, 0x61, 0xb, 0x69, 0x25, - 0x79, 0x26, 0x34, 0x5, 0x1d, 0x2, 0x6b, 0x25, - 0x54, 0x9, 0x35, 0x5, 0x45, 0x7, 0x6d, 0x25, - 0x7d, 0x26, 0x16, 0x1, 0x7f, 0x26, 0x77, 0xd, - 0x4f, 0x23, 0x78, 0xd, 0x2f, 0x21, 0x27, 0x3, - 0x1f, 0x2, 0x59, 0x9, 0x6a, 0xb, 0x73, 0x25, - 0x6b, 0xb, 0x63, 0x24, 0x5b, 0x9, 0x20, 0x2, - 0x7e, 0xd, 0x4b, 0x7, 0x65, 0x24, 0x43, 0x22, - 0x18, 0x1, 0x6f, 0xb, 0x5e, 0x9, 0x70, 0xb, - 0x2a, 0x3, 0x33, 0x4, 0x45, 0x6, 0x60, 0x9, - 0x7b, 0xc, 0x19, 0x1, 0x19, 0x1, 0x7d, 0xc, - 0x74, 0xb, 0x50, 0x7, 0x75, 0xb, 0x63, 0x9, - 0x51, 0x7, 0x23, 0x2, 0x3f, 0x5, 0x1a, 0x1, - 0x65, 0x9, 0x2d, 0x3, 0x40, 0x5, 0x0, 0x0, -}; - -/* Console colors */ -unsigned char cvconscolors[16][3] = { /* background, foreground, hilite */ - /* R G B */ - {0x30, 0x30, 0x30}, - {0x00, 0x00, 0x00}, - {0x80, 0x00, 0x00}, - {0x00, 0x80, 0x00}, - {0x00, 0x00, 0x80}, - {0x80, 0x80, 0x00}, - {0x00, 0x80, 0x80}, - {0x80, 0x00, 0x80}, - {0xff, 0xff, 0xff}, - {0x40, 0x40, 0x40}, - {0xff, 0x00, 0x00}, - {0x00, 0xff, 0x00}, - {0x00, 0x00, 0xff}, - {0xff, 0xff, 0x00}, - {0x00, 0xff, 0xff}, - {0x00, 0x00, 0xff} -}; - -/* -------------------- Hardware specific routines ------------------------- */ - -/* Read Attribute Controller Register=idx */ -inline unsigned char RAttr (volatile unsigned char *regs, short idx) -{ - wb_64 (regs, ACT_ADDRESS_W, idx); - mb(); - udelay(100); - return (rb_64(regs, ACT_ADDRESS_R)); -} - -/* Read Sequencer Register=idx */ -inline unsigned char RSeq (volatile unsigned char *regs, short idx) -{ - wb_64 (regs, SEQ_ADDRESS, idx); - mb(); - return (rb_64(regs, SEQ_ADDRESS_R)); -} - -/* Read CRT Controller Register=idx */ -inline unsigned char RCrt (volatile unsigned char *regs, short idx) -{ - wb_64 (regs, CRT_ADDRESS, idx); - mb(); - return (rb_64(regs, CRT_ADDRESS_R)); -} - -/* Read Graphics Controller Register=idx */ -inline unsigned char RGfx (volatile unsigned char *regs, short idx) -{ - wb_64 (regs, GCT_ADDRESS, idx); - mb(); - return (rb_64(regs, GCT_ADDRESS_R)); -} - -/* - * Special wakeup/passthrough registers on graphics boards - */ - -inline void cv64_write_port (unsigned short bits, - volatile unsigned char *base) -{ - volatile unsigned char *addr; - static unsigned char cvportbits = 0; /* Mirror port bits here */ - DPRINTK("ENTER\n"); - - addr = base + 0x40001; - if (bits & 0x8000) { - cvportbits |= bits & 0xff; /* Set bits */ - DPRINTK("Set bits: %04x\n", bits); - } else { - bits = bits & 0xff; - bits = (~bits) & 0xff; - cvportbits &= bits; /* Clear bits */ - DPRINTK("Clear bits: %04x\n", bits); - } - - *addr = cvportbits; - DPRINTK("EXIT\n"); -} - -/* - * Monitor switch on CyberVision board - * - * toggle: - * 0 = CyberVision Signal - * 1 = Amiga Signal - * board = board addr - * - */ -inline void cvscreen (int toggle, volatile unsigned char *board) -{ - DPRINTK("ENTER\n"); - if (toggle == 1) { - DPRINTK("Show Amiga video\n"); - cv64_write_port (0x10, board); - } else { - DPRINTK("Show CyberVision video\n"); - cv64_write_port (0x8010, board); - } - DPRINTK("EXIT\n"); -} - -/* Control screen display */ -/* toggle: 0 = on, 1 = off */ -/* board = registerbase */ -inline void gfx_on_off(int toggle, volatile unsigned char *regs) -{ - int r; - DPRINTK("ENTER\n"); - - toggle &= 0x1; - toggle = toggle << 5; - DPRINTK("Turn display %s\n", (toggle ? "off" : "on")); - - r = (int) RSeq(regs, SEQ_ID_CLOCKING_MODE); - r &= 0xdf; /* Set bit 5 to 0 */ - - WSeq (regs, SEQ_ID_CLOCKING_MODE, r | toggle); - DPRINTK("EXIT\n"); -} - -/* - * Computes M, N, and R values from - * given input frequency. It uses a table of - * precomputed values, to keep CPU time low. - * - * The return value consist of: - * lower byte: Bits 4-0: N Divider Value - * Bits 5-6: R Value for e.g. SR10 or SR12 - * higher byte: Bits 0-6: M divider value for e.g. SR11 or SR13 - */ -static unsigned short cv64_compute_clock(unsigned long freq) -{ - static unsigned char *mnr, *save; /* M, N + R vals */ - unsigned long work_freq, r; - unsigned short erg; - long diff, d2; - - DPRINTK("ENTER\n"); - if (freq < 12500000 || freq > MAXPIXELCLOCK) { - printk("CV64 driver: Illegal clock frequency %ld, using 25MHz\n", - freq); - freq = 25000000; - } - DPRINTK("Freq = %ld\n", freq); - mnr = clocks; /* there the vals are stored */ - d2 = 0x7fffffff; - - while (*mnr) { /* mnr vals are 0-terminated */ - work_freq = (0x37EE * (mnr[0] + 2)) / ((mnr[1] & 0x1F) + 2); - - r = (mnr[1] >> 5) & 0x03; - if (r != 0) { - work_freq = work_freq >> r; /* r is the freq divider */ - } - - work_freq *= 0x3E8; /* 2nd part of OSC */ - - diff = abs(freq - work_freq); - - if (d2 >= diff) { - d2 = diff; - /* In save are the vals for minimal diff */ - save = mnr; - } - mnr += 2; - } - erg = *((unsigned short *)save); - - DPRINTK("EXIT\n"); - return (erg); -} - -static int cv_has_4mb (volatile unsigned char *fb) -{ - volatile unsigned long *tr, *tw; - DPRINTK("ENTER\n"); - - /* write patterns in memory and test if they can be read */ - tw = (volatile unsigned long *) fb; - tr = (volatile unsigned long *) (fb + 0x02000000); - - *tw = 0x87654321; - - if (*tr != 0x87654321) { - DPRINTK("EXIT - <4MB\n"); - return (0); - } - - /* upper memory region */ - tw = (volatile unsigned long *) (fb + 0x00200000); - tr = (volatile unsigned long *) (fb + 0x02200000); - - *tw = 0x87654321; - - if (*tr != 0x87654321) { - DPRINTK("EXIT - <4MB\n"); - return (0); - } - - *tw = 0xAAAAAAAA; - - if (*tr != 0xAAAAAAAA) { - DPRINTK("EXIT - <4MB\n"); - return (0); - } - - *tw = 0x55555555; - - if (*tr != 0x55555555) { - DPRINTK("EXIT - <4MB\n"); - return (0); - } - - DPRINTK("EXIT\n"); - return (1); -} - -static void cv64_board_init (void) -{ - volatile unsigned char *regs = CyberRegs; - int i; - unsigned int clockpar; - unsigned char test; - - DPRINTK("ENTER\n"); - - /* - * Special CyberVision 64 board operations - */ - /* Reset board */ - for (i = 0; i < 6; i++) { - cv64_write_port (0xff, CyberBase); - } - /* Return to operational mode */ - cv64_write_port (0x8004, CyberBase); - - /* - * Generic (?) S3 chip wakeup - */ - /* Disable I/O & memory decoders, video in setup mode */ - wb_64 (regs, SREG_VIDEO_SUBS_ENABLE, 0x10); - /* Video responds to cmds, addrs & data */ - wb_64 (regs, SREG_OPTION_SELECT, 0x1); - /* Enable I/O & memory decoders, video in operational mode */ - wb_64 (regs, SREG_VIDEO_SUBS_ENABLE, 0x8); - /* VGA color emulation, enable cpu access to display mem */ - wb_64 (regs, GREG_MISC_OUTPUT_W, 0x03); - /* Unlock S3 VGA regs */ - WCrt (regs, CRT_ID_REGISTER_LOCK_1, 0x48); - /* Unlock system control & extension registers */ - WCrt (regs, CRT_ID_REGISTER_LOCK_2, 0xA5); -/* GRF - Enable interrupts */ - /* Enable enhanced regs access, Ready cntl 0 wait states */ - test = RCrt (regs, CRT_ID_SYSTEM_CONFIG); - test = test | 0x01; /* enable enhanced register access */ - test = test & 0xEF; /* clear bit 4, 0 wait state */ - WCrt (regs, CRT_ID_SYSTEM_CONFIG, test); - /* - * bit 0=1: Enable enhaced mode functions - * bit 2=0: Enhanced mode 8+ bits/pixel - * bit 4=1: Enable linear addressing - * bit 5=1: Enable MMIO - */ - wb_64 (regs, ECR_ADV_FUNC_CNTL, 0x31); - /* - * bit 0=1: Color emulation - * bit 1=1: Enable CPU access to display memory - * bit 5=1: Select high 64K memory page - */ -/* GRF - 0xE3 */ - wb_64 (regs, GREG_MISC_OUTPUT_W, 0x23); - - /* Cpu base addr */ - WCrt (regs, CRT_ID_EXT_SYS_CNTL_4, 0x0); - - /* Reset. This does nothing on Trio, but standard VGA practice */ - /* WSeq (CyberRegs, SEQ_ID_RESET, 0x03); */ - /* Character clocks 8 dots wide */ - WSeq (regs, SEQ_ID_CLOCKING_MODE, 0x01); - /* Enable cpu write to all color planes */ - WSeq (regs, SEQ_ID_MAP_MASK, 0x0F); - /* Font table in 1st 8k of plane 2, font A=B disables swtich */ - WSeq (regs, SEQ_ID_CHAR_MAP_SELECT, 0x0); - /* Allow mem access to 256kb */ - WSeq (regs, SEQ_ID_MEMORY_MODE, 0x2); - /* Unlock S3 extensions to VGA Sequencer regs */ - WSeq (regs, SEQ_ID_UNLOCK_EXT, 0x6); - - /* Enable 4MB fast page mode */ - test = RSeq (regs, SEQ_ID_BUS_REQ_CNTL); - test = test | 1 << 6; - WSeq (regs, SEQ_ID_BUS_REQ_CNTL, test); - - /* Faster LUT write: 1 DCLK LUT write cycle, RAMDAC clk doubled */ - WSeq (regs, SEQ_ID_RAMDAC_CNTL, 0xC0); - - /* Clear immediate clock load bit */ - test = RSeq (regs, SEQ_ID_CLKSYN_CNTL_2); - test = test & 0xDF; - /* If > 55MHz, enable 2 cycle memory write */ - if (cv64_memclk >= 55000000) { - test |= 0x80; - } - WSeq (regs, SEQ_ID_CLKSYN_CNTL_2, test); - - /* Set MCLK value */ - clockpar = cv64_compute_clock (cv64_memclk); - test = (clockpar & 0xFF00) >> 8; - WSeq (regs, SEQ_ID_MCLK_HI, test); - test = clockpar & 0xFF; - WSeq (regs, SEQ_ID_MCLK_LO, test); - - /* Chip rev specific: Not in my Trio manual!!! */ - if (RCrt (regs, CRT_ID_REVISION) == 0x10) - WSeq (regs, SEQ_ID_MORE_MAGIC, test); - - /* We now load an 25 MHz, 31kHz, 640x480 standard VGA Mode. */ - - /* Set DCLK value */ - WSeq (regs, SEQ_ID_DCLK_HI, 0x13); - WSeq (regs, SEQ_ID_DCLK_LO, 0x41); - - /* Load DCLK (and MCLK?) immediately */ - test = RSeq (regs, SEQ_ID_CLKSYN_CNTL_2); - test = test | 0x22; - WSeq (regs, SEQ_ID_CLKSYN_CNTL_2, test); - - /* Enable loading of DCLK */ - test = rb_64(regs, GREG_MISC_OUTPUT_R); - test = test | 0x0C; - wb_64 (regs, GREG_MISC_OUTPUT_W, test); - - /* Turn off immediate xCLK load */ - WSeq (regs, SEQ_ID_CLKSYN_CNTL_2, 0x2); - - /* Horizontal character clock counts */ - /* 8 LSB of 9 bits = total line - 5 */ - WCrt (regs, CRT_ID_HOR_TOTAL, 0x5F); - /* Active display line */ - WCrt (regs, CRT_ID_HOR_DISP_ENA_END, 0x4F); - /* Blank assertion start */ - WCrt (regs, CRT_ID_START_HOR_BLANK, 0x50); - /* Blank assertion end */ - WCrt (regs, CRT_ID_END_HOR_BLANK, 0x82); - /* HSYNC assertion start */ - WCrt (regs, CRT_ID_START_HOR_RETR, 0x54); - /* HSYNC assertion end */ - WCrt (regs, CRT_ID_END_HOR_RETR, 0x80); - WCrt (regs, CRT_ID_VER_TOTAL, 0xBF); - WCrt (regs, CRT_ID_OVERFLOW, 0x1F); - WCrt (regs, CRT_ID_PRESET_ROW_SCAN, 0x0); - WCrt (regs, CRT_ID_MAX_SCAN_LINE, 0x40); - WCrt (regs, CRT_ID_CURSOR_START, 0x00); - WCrt (regs, CRT_ID_CURSOR_END, 0x00); - WCrt (regs, CRT_ID_START_ADDR_HIGH, 0x00); - WCrt (regs, CRT_ID_START_ADDR_LOW, 0x00); - WCrt (regs, CRT_ID_CURSOR_LOC_HIGH, 0x00); - WCrt (regs, CRT_ID_CURSOR_LOC_LOW, 0x00); - WCrt (regs, CRT_ID_START_VER_RETR, 0x9C); - WCrt (regs, CRT_ID_END_VER_RETR, 0x0E); - WCrt (regs, CRT_ID_VER_DISP_ENA_END, 0x8F); - WCrt (regs, CRT_ID_SCREEN_OFFSET, 0x50); - WCrt (regs, CRT_ID_UNDERLINE_LOC, 0x00); - WCrt (regs, CRT_ID_START_VER_BLANK, 0x96); - WCrt (regs, CRT_ID_END_VER_BLANK, 0xB9); - WCrt (regs, CRT_ID_MODE_CONTROL, 0xE3); - WCrt (regs, CRT_ID_LINE_COMPARE, 0xFF); - WCrt (regs, CRT_ID_BACKWAD_COMP_3, 0x10); /* FIFO enabled */ - WCrt (regs, CRT_ID_MISC_1, 0x35); - WCrt (regs, CRT_ID_DISPLAY_FIFO, 0x5A); - WCrt (regs, CRT_ID_EXT_MEM_CNTL_2, 0x70); - WCrt (regs, CRT_ID_LAW_POS_LO, 0x40); - WCrt (regs, CRT_ID_EXT_MEM_CNTL_3, 0xFF); - - WGfx (regs, GCT_ID_SET_RESET, 0x0); - WGfx (regs, GCT_ID_ENABLE_SET_RESET, 0x0); - WGfx (regs, GCT_ID_COLOR_COMPARE, 0x0); - WGfx (regs, GCT_ID_DATA_ROTATE, 0x0); - WGfx (regs, GCT_ID_READ_MAP_SELECT, 0x0); - WGfx (regs, GCT_ID_GRAPHICS_MODE, 0x40); - WGfx (regs, GCT_ID_MISC, 0x01); - WGfx (regs, GCT_ID_COLOR_XCARE, 0x0F); - WGfx (regs, GCT_ID_BITMASK, 0xFF); - - /* Colors for text mode */ - for (i = 0; i < 0xf; i++) - WAttr (regs, i, i); - - WAttr (regs, ACT_ID_ATTR_MODE_CNTL, 0x41); - WAttr (regs, ACT_ID_OVERSCAN_COLOR, 0x01); - WAttr (regs, ACT_ID_COLOR_PLANE_ENA, 0x0F); - WAttr (regs, ACT_ID_HOR_PEL_PANNING, 0x0); - WAttr (regs, ACT_ID_COLOR_SELECT, 0x0); - - wb_64 (regs, VDAC_MASK, 0xFF); - - *((unsigned long *) (regs + ECR_FRGD_COLOR)) = 0xFF; - *((unsigned long *) (regs + ECR_BKGD_COLOR)) = 0; - - /* Colors initially set to grayscale */ - - wb_64 (regs, VDAC_ADDRESS_W, 0); - for (i = 255; i >= 0; i--) { - wb_64(regs, VDAC_DATA, i); - wb_64(regs, VDAC_DATA, i); - wb_64(regs, VDAC_DATA, i); - } - - /* GFx hardware cursor off */ - WCrt (regs, CRT_ID_HWGC_MODE, 0x00); - - /* Set first to 4MB, so test will work */ - WCrt (regs, CRT_ID_LAW_CNTL, 0x13); - /* Find "correct" size of fbmem of Z3 board */ - if (cv_has_4mb (CyberMem)) { - CyberSize = 1024 * 1024 * 4; - WCrt (regs, CRT_ID_LAW_CNTL, 0x13); - DPRINTK("4MB board\n"); - } else { - CyberSize = 1024 * 1024 * 2; - WCrt (regs, CRT_ID_LAW_CNTL, 0x12); - DPRINTK("2MB board\n"); - } - - /* Initialize graphics engine */ - Cyber_WaitBlit(); - vgaw16 (regs, ECR_FRGD_MIX, 0x27); - vgaw16 (regs, ECR_BKGD_MIX, 0x07); - vgaw16 (regs, ECR_READ_REG_DATA, 0x1000); - udelay(200); - vgaw16 (regs, ECR_READ_REG_DATA, 0x2000); - Cyber_WaitBlit(); - vgaw16 (regs, ECR_READ_REG_DATA, 0x3FFF); - Cyber_WaitBlit(); - udelay(200); - vgaw16 (regs, ECR_READ_REG_DATA, 0x4FFF); - Cyber_WaitBlit(); - vgaw16 (regs, ECR_BITPLANE_WRITE_MASK, ~0); - Cyber_WaitBlit(); - vgaw16 (regs, ECR_READ_REG_DATA, 0xE000); - vgaw16 (regs, ECR_CURRENT_Y_POS2, 0x00); - vgaw16 (regs, ECR_CURRENT_X_POS2, 0x00); - vgaw16 (regs, ECR_READ_REG_DATA, 0xA000); - vgaw16 (regs, ECR_DEST_Y__AX_STEP, 0x00); - vgaw16 (regs, ECR_DEST_Y2__AX_STEP2, 0x00); - vgaw16 (regs, ECR_DEST_X__DIA_STEP, 0x00); - vgaw16 (regs, ECR_DEST_X2__DIA_STEP2, 0x00); - vgaw16 (regs, ECR_SHORT_STROKE, 0x00); - vgaw16 (regs, ECR_DRAW_CMD, 0x01); - - Cyber_WaitBlit(); - - vgaw16 (regs, ECR_READ_REG_DATA, 0x4FFF); - vgaw16 (regs, ECR_BKGD_COLOR, 0x01); - vgaw16 (regs, ECR_FRGD_COLOR, 0x00); - - - /* Enable video display (set bit 5) */ -/* ARB - Would also seem to write to AR13. - * May want to use parts of WAttr to set JUST bit 5 - */ - WAttr (regs, 0x33, 0); - -/* GRF - function code ended here */ - - /* Turn gfx on again */ - gfx_on_off (0, regs); - - /* Pass-through */ - cvscreen (0, CyberBase); - - DPRINTK("EXIT\n"); -} - -static void cv64_load_video_mode (struct fb_var_screeninfo *video_mode) -{ - volatile unsigned char *regs = CyberRegs; - int fx, fy; - unsigned short mnr; - unsigned short HT, HDE, HBS, HBE, HSS, HSE, VDE, VBS, VBE, VSS, VSE, VT; - char LACE, DBLSCAN, TEXT, CONSOLE; - int cr50, sr15, sr18, clock_mode, test; - int m, n; - int tfillm, temptym; - int hmul; - - /* ---------------- */ - int xres, hfront, hsync, hback; - int yres, vfront, vsync, vback; - int bpp; -#if 0 - float freq_f; -#endif - long freq; - /* ---------------- */ - - DPRINTK("ENTER\n"); - TEXT = 0; /* if depth == 4 */ - CONSOLE = 0; /* mode num == 255 (console) */ - fx = fy = 8; /* force 8x8 font */ - -/* GRF - Disable interrupts */ - - gfx_on_off (1, regs); - - switch (video_mode->bits_per_pixel) { - case 15: - case 16: - hmul = 2; - break; - - default: - hmul = 1; - break; - } - - bpp = video_mode->bits_per_pixel; - xres = video_mode->xres; - hfront = video_mode->right_margin; - hsync = video_mode->hsync_len; - hback = video_mode->left_margin; - - LACE = 0; - DBLSCAN = 0; - - if (video_mode->vmode & FB_VMODE_DOUBLE) { - yres = video_mode->yres * 2; - vfront = video_mode->lower_margin * 2; - vsync = video_mode->vsync_len * 2; - vback = video_mode->upper_margin * 2; - DBLSCAN = 1; - } else if (video_mode->vmode & FB_VMODE_INTERLACED) { - yres = (video_mode->yres + 1) / 2; - vfront = (video_mode->lower_margin + 1) / 2; - vsync = (video_mode->vsync_len + 1) / 2; - vback = (video_mode->upper_margin + 1) / 2; - LACE = 1; - } else { - yres = video_mode->yres; - vfront = video_mode->lower_margin; - vsync = video_mode->vsync_len; - vback = video_mode->upper_margin; - } - - /* ARB Dropping custom setup method from cvision.c */ -#if 0 - if (cvision_custom_mode) { - HBS = hbs / 8 * hmul; - HBE = hbe / 8 * hmul; - HSS = hss / 8 * hmul; - HSE = hse / 8 * hmul; - HT = ht / 8 * hmul - 5; - - VBS = vbs - 1; - VSS = vss; - VSE = vse; - VBE = vbe; - VT = vt - 2; - } else { -#else - { -#endif - HBS = hmul * (xres / 8); - HBE = hmul * ((xres/8) + (hfront/8) + (hsync/8) + (hback/8) - 2); - HSS = hmul * ((xres/8) + (hfront/8) + 2); - HSE = hmul * ((xres/8) + (hfront/8) + (hsync/8) + 1); - HT = hmul * ((xres/8) + (hfront/8) + (hsync/8) + (hback/8)); - - VBS = yres; - VBE = yres + vfront + vsync + vback - 2; - VSS = yres + vfront - 1; - VSE = yres + vfront + vsync - 1; - VT = yres + vfront + vsync + vback - 2; - } - - wb_64 (regs, ECR_ADV_FUNC_CNTL, (TEXT ? 0x00 : 0x31)); - - if (TEXT) - HDE = ((video_mode->xres + fx - 1) / fx) - 1; - else - HDE = (video_mode->xres + 3) * hmul / 8 - 1; - - VDE = video_mode->yres - 1; - - WCrt (regs, CRT_ID_HWGC_MODE, 0x00); - WCrt (regs, CRT_ID_EXT_DAC_CNTL, 0x00); - - WSeq (regs, SEQ_ID_MEMORY_MODE, - (TEXT || (video_mode->bits_per_pixel == 1)) ? 0x06 : 0x0e); - WGfx (regs, GCT_ID_READ_MAP_SELECT, 0x00); - WSeq (regs, SEQ_ID_MAP_MASK, - (video_mode->bits_per_pixel == 1) ? 0x01 : 0xFF); - WSeq (regs, SEQ_ID_CHAR_MAP_SELECT, 0x00); - - /* cv64_compute_clock accepts arguments in Hz */ - /* pixclock is in ps ... convert to Hz */ - -#if 0 - freq_f = (1.0 / (float) video_mode->pixclock) * 1000000000; - freq = ((long) freq_f) * 1000; -#else -/* freq = (long) ((long long)1000000000000 / (long long) video_mode->pixclock); - */ - freq = (1000000000 / video_mode->pixclock) * 1000; -#endif - - mnr = cv64_compute_clock (freq); - WSeq (regs, SEQ_ID_DCLK_HI, ((mnr & 0xFF00) >> 8)); - WSeq (regs, SEQ_ID_DCLK_LO, (mnr & 0xFF)); - - /* Load display parameters into board */ - WCrt (regs, CRT_ID_EXT_HOR_OVF, - ((HT & 0x100) ? 0x01 : 0x00) | - ((HDE & 0x100) ? 0x02 : 0x00) | - ((HBS & 0x100) ? 0x04 : 0x00) | - /* ((HBE & 0x40) ? 0x08 : 0x00) | */ - ((HSS & 0x100) ? 0x10 : 0x00) | - /* ((HSE & 0x20) ? 0x20 : 0x00) | */ - (((HT-5) & 0x100) ? 0x40 : 0x00) - ); - - WCrt (regs, CRT_ID_EXT_VER_OVF, - 0x40 | - ((VT & 0x400) ? 0x01 : 0x00) | - ((VDE & 0x400) ? 0x02 : 0x00) | - ((VBS & 0x400) ? 0x04 : 0x00) | - ((VSS & 0x400) ? 0x10 : 0x00) - ); - - WCrt (regs, CRT_ID_HOR_TOTAL, HT); - WCrt (regs, CRT_ID_DISPLAY_FIFO, HT - 5); - WCrt (regs, CRT_ID_HOR_DISP_ENA_END, ((HDE >= HBS) ? (HBS - 1) : HDE)); - WCrt (regs, CRT_ID_START_HOR_BLANK, HBS); - WCrt (regs, CRT_ID_END_HOR_BLANK, ((HBE & 0x1F) | 0x80)); - WCrt (regs, CRT_ID_START_HOR_RETR, HSS); - WCrt (regs, CRT_ID_END_HOR_RETR, - (HSE & 0x1F) | - ((HBE & 0x20) ? 0x80 : 0x00) - ); - WCrt (regs, CRT_ID_VER_TOTAL, VT); - WCrt (regs, CRT_ID_OVERFLOW, - 0x10 | - ((VT & 0x100) ? 0x01 : 0x00) | - ((VDE & 0x100) ? 0x02 : 0x00) | - ((VSS & 0x100) ? 0x04 : 0x00) | - ((VBS & 0x100) ? 0x08 : 0x00) | - ((VT & 0x200) ? 0x20 : 0x00) | - ((VDE & 0x200) ? 0x40 : 0x00) | - ((VSS & 0x200) ? 0x80 : 0x00) - ); - WCrt (regs, CRT_ID_MAX_SCAN_LINE, - 0x40 | - (DBLSCAN ? 0x80 : 0x00) | - ((VBS & 0x200) ? 0x20 : 0x00) | - (TEXT ? ((fy - 1) & 0x1F) : 0x00) - ); - - WCrt (regs, CRT_ID_MODE_CONTROL, 0xE3); - - /* Text cursor */ - - if (TEXT) { -#if 1 - WCrt (regs, CRT_ID_CURSOR_START, (fy & 0x1f) - 2); - WCrt (regs, CRT_ID_CURSOR_END, (fy & 0x1F) - 1); -#else - WCrt (regs, CRT_ID_CURSOR_START, 0x00); - WCrt (regs, CRT_ID_CURSOR_END, fy & 0x1F); -#endif - WCrt (regs, CRT_ID_UNDERLINE_LOC, (fy - 1) & 0x1F); - WCrt (regs, CRT_ID_CURSOR_LOC_HIGH, 0x00); - WCrt (regs, CRT_ID_CURSOR_LOC_LOW, 0x00); - } - - WCrt (regs, CRT_ID_START_ADDR_HIGH, 0x00); - WCrt (regs, CRT_ID_START_ADDR_LOW, 0x00); - WCrt (regs, CRT_ID_START_VER_RETR, VSS); - WCrt (regs, CRT_ID_END_VER_RETR, (VSE & 0x0F)); - WCrt (regs, CRT_ID_VER_DISP_ENA_END, VDE); - WCrt (regs, CRT_ID_START_VER_BLANK, VBS); - WCrt (regs, CRT_ID_END_VER_BLANK, VBE); - WCrt (regs, CRT_ID_LINE_COMPARE, 0xFF); - WCrt (regs, CRT_ID_LACE_RETR_START, HT / 2); - WCrt (regs, CRT_ID_LACE_CONTROL, (LACE ? 0x20 : 0x00)); - WGfx (regs, GCT_ID_GRAPHICS_MODE, - ((TEXT || (video_mode->bits_per_pixel == 1)) ? 0x00 : 0x40)); - WGfx (regs, GCT_ID_MISC, (TEXT ? 0x04 : 0x01)); - WSeq (regs, SEQ_ID_MEMORY_MODE, - ((TEXT || (video_mode->bits_per_pixel == 1)) ? 0x06 : 0x02)); - - wb_64 (regs, VDAC_MASK, 0xFF); - - /* Blank border */ - test = RCrt (regs, CRT_ID_BACKWAD_COMP_2); - WCrt (regs, CRT_ID_BACKWAD_COMP_2, (test | 0x20)); - - sr15 = RSeq (regs, SEQ_ID_CLKSYN_CNTL_2); - sr15 &= 0xEF; - sr18 = RSeq (regs, SEQ_ID_RAMDAC_CNTL); - sr18 &= 0x7F; - clock_mode = 0x00; - cr50 = 0x00; - - test = RCrt (regs, CRT_ID_EXT_MISC_CNTL_2); - test &= 0xD; - - /* Clear roxxler byte-swapping... */ - cv64_write_port (0x0040, CyberBase); - cv64_write_port (0x0020, CyberBase); - - switch (video_mode->bits_per_pixel) { - case 1: - case 4: /* text */ - HDE = video_mode->xres / 16; - break; - - case 8: - if (freq > 80000000) { - clock_mode = 0x10 | 0x02; - sr15 |= 0x10; - sr18 |= 0x80; - } - HDE = video_mode->xres / 8; - cr50 |= 0x00; - break; - - case 15: - cv64_write_port (0x8020, CyberBase); - clock_mode = 0x30; - HDE = video_mode->xres / 4; - cr50 |= 0x10; - break; - - case 16: - cv64_write_port (0x8020, CyberBase); - clock_mode = 0x50; - HDE = video_mode->xres / 4; - cr50 |= 0x10; - break; - - case 24: - case 32: - cv64_write_port (0x8040, CyberBase); - clock_mode = 0xD0; - HDE = video_mode->xres / 2; - cr50 |= 0x30; - break; - } - - WCrt (regs, CRT_ID_EXT_MISC_CNTL_2, clock_mode | test); - WSeq (regs, SEQ_ID_CLKSYN_CNTL_2, sr15); - WSeq (regs, SEQ_ID_RAMDAC_CNTL, sr18); - WCrt (regs, CRT_ID_SCREEN_OFFSET, HDE); - - WCrt (regs, CRT_ID_MISC_1, (TEXT ? 0x05 : 0x35)); - - test = RCrt (regs, CRT_ID_EXT_SYS_CNTL_2); - test &= ~0x30; - test |= (HDE >> 4) & 0x30; - WCrt (regs, CRT_ID_EXT_SYS_CNTL_2, test); - - /* Set up graphics engine */ - switch (video_mode->xres) { - case 1024: - cr50 |= 0x00; - break; - - case 640: - cr50 |= 0x40; - break; - - case 800: - cr50 |= 0x80; - break; - - case 1280: - cr50 |= 0xC0; - break; - - case 1152: - cr50 |= 0x01; - break; - - case 1600: - cr50 |= 0x81; - break; - - default: /* XXX */ - break; - } - - WCrt (regs, CRT_ID_EXT_SYS_CNTL_1, cr50); - - udelay(100); - WAttr (regs, ACT_ID_ATTR_MODE_CNTL, (TEXT ? 0x08 : 0x41)); - udelay(100); - WAttr (regs, ACT_ID_COLOR_PLANE_ENA, - (video_mode->bits_per_pixel == 1) ? 0x01 : 0x0F); - udelay(100); - - tfillm = (96 * (cv64_memclk / 1000)) / 240000; - - switch (video_mode->bits_per_pixel) { - case 32: - case 24: - temptym = (24 * (cv64_memclk / 1000)) / (freq / 1000); - break; - case 15: - case 16: - temptym = (48 * (cv64_memclk / 1000)) / (freq / 1000); - break; - case 4: - temptym = (192 * (cv64_memclk / 1000)) / (freq / 1000); - break; - default: - temptym = (96 * (cv64_memclk / 1000)) / (freq / 1000); - break; - } - - m = (temptym - tfillm - 9) / 2; - if (m < 0) - m = 0; - m = (m & 0x1F) << 3; - if (m < 0x18) - m = 0x18; - n = 0xFF; - - WCrt (regs, CRT_ID_EXT_MEM_CNTL_2, m); - WCrt (regs, CRT_ID_EXT_MEM_CNTL_3, n); - udelay(10); - - /* Text initialization */ - - if (TEXT) { - /* Do text initialization here ! */ - } - - if (CONSOLE) { - int i; - wb_64 (regs, VDAC_ADDRESS_W, 0); - for (i = 0; i < 4; i++) { - wb_64 (regs, VDAC_DATA, cvconscolors [i][0]); - wb_64 (regs, VDAC_DATA, cvconscolors [i][1]); - wb_64 (regs, VDAC_DATA, cvconscolors [i][2]); - } - } - - WAttr (regs, 0x33, 0); - - /* Turn gfx on again */ - gfx_on_off (0, (volatile unsigned char *) regs); - - /* Pass-through */ - cvscreen (0, CyberBase); - -DPRINTK("EXIT\n"); -} - -void cvision_bitblt (u_short sx, u_short sy, u_short dx, u_short dy, - u_short w, u_short h) -{ - volatile unsigned char *regs = CyberRegs; - unsigned short drawdir = 0; - - DPRINTK("ENTER\n"); - if (sx > dx) { - drawdir |= 1 << 5; - } else { - sx += w - 1; - dx += w - 1; - } - - if (sy > dy) { - drawdir |= 1 << 7; - } else { - sy += h - 1; - dy += h - 1; - } - - Cyber_WaitBlit(); - vgaw16 (regs, ECR_READ_REG_DATA, 0xA000); - vgaw16 (regs, ECR_BKGD_MIX, 0x7); - vgaw16 (regs, ECR_FRGD_MIX, 0x67); - vgaw16 (regs, ECR_BKGD_COLOR, 0x0); - vgaw16 (regs, ECR_FRGD_COLOR, 0x1); - vgaw16 (regs, ECR_BITPLANE_READ_MASK, 0x1); - vgaw16 (regs, ECR_BITPLANE_WRITE_MASK, 0xFFF); - vgaw16 (regs, ECR_CURRENT_Y_POS, sy); - vgaw16 (regs, ECR_CURRENT_X_POS, sx); - vgaw16 (regs, ECR_DEST_Y__AX_STEP, dy); - vgaw16 (regs, ECR_DEST_X__DIA_STEP, dx); - vgaw16 (regs, ECR_READ_REG_DATA, h - 1); - vgaw16 (regs, ECR_MAJ_AXIS_PIX_CNT, w - 1); - vgaw16 (regs, ECR_DRAW_CMD, 0xC051 | drawdir); - DPRINTK("EXIT\n"); -} - -void cvision_clear (u_short dx, u_short dy, u_short w, u_short h, u_short bg) -{ - volatile unsigned char *regs = CyberRegs; - DPRINTK("ENTER\n"); - Cyber_WaitBlit(); - vgaw16 (regs, ECR_FRGD_MIX, 0x0027); - vgaw16 (regs, ECR_FRGD_COLOR, bg); - vgaw16 (regs, ECR_READ_REG_DATA, 0xA000); - vgaw16 (regs, ECR_CURRENT_Y_POS, dy); - vgaw16 (regs, ECR_CURRENT_X_POS, dx); - vgaw16 (regs, ECR_READ_REG_DATA, h - 1); - vgaw16 (regs, ECR_MAJ_AXIS_PIX_CNT, w - 1); - vgaw16 (regs, ECR_DRAW_CMD, 0x40B1); - DPRINTK("EXIT\n"); -} - -#ifdef CYBERFBDEBUG -/* - * Dump internal settings of CyberVision board - */ -static void cv64_dump (void) -{ - volatile unsigned char *regs = CyberRegs; - DPRINTK("ENTER\n"); - /* Dump the VGA setup values */ - *(regs + S3_CRTC_ADR) = 0x00; - DPRINTK("CR00 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x01; - DPRINTK("CR01 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x02; - DPRINTK("CR02 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x03; - DPRINTK("CR03 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x04; - DPRINTK("CR04 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x05; - DPRINTK("CR05 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x06; - DPRINTK("CR06 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x07; - DPRINTK("CR07 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x08; - DPRINTK("CR08 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x09; - DPRINTK("CR09 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x10; - DPRINTK("CR10 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x11; - DPRINTK("CR11 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x12; - DPRINTK("CR12 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x13; - DPRINTK("CR13 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x15; - DPRINTK("CR15 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x16; - DPRINTK("CR16 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x36; - DPRINTK("CR36 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x37; - DPRINTK("CR37 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x42; - DPRINTK("CR42 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x43; - DPRINTK("CR43 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x50; - DPRINTK("CR50 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x51; - DPRINTK("CR51 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x53; - DPRINTK("CR53 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x58; - DPRINTK("CR58 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x59; - DPRINTK("CR59 = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x5A; - DPRINTK("CR5A = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x5D; - DPRINTK("CR5D = %x\n", *(regs + S3_CRTC_DATA)); - *(regs + S3_CRTC_ADR) = 0x5E; - DPRINTK("CR5E = %x\n", *(regs + S3_CRTC_DATA)); - DPRINTK("MISC = %x\n", *(regs + GREG_MISC_OUTPUT_R)); - *(regs + SEQ_ADDRESS) = 0x01; - DPRINTK("SR01 = %x\n", *(regs + SEQ_ADDRESS_R)); - *(regs + SEQ_ADDRESS) = 0x02; - DPRINTK("SR02 = %x\n", *(regs + SEQ_ADDRESS_R)); - *(regs + SEQ_ADDRESS) = 0x03; - DPRINTK("SR03 = %x\n", *(regs + SEQ_ADDRESS_R)); - *(regs + SEQ_ADDRESS) = 0x09; - DPRINTK("SR09 = %x\n", *(regs + SEQ_ADDRESS_R)); - *(regs + SEQ_ADDRESS) = 0x10; - DPRINTK("SR10 = %x\n", *(regs + SEQ_ADDRESS_R)); - *(regs + SEQ_ADDRESS) = 0x11; - DPRINTK("SR11 = %x\n", *(regs + SEQ_ADDRESS_R)); - *(regs + SEQ_ADDRESS) = 0x12; - DPRINTK("SR12 = %x\n", *(regs + SEQ_ADDRESS_R)); - *(regs + SEQ_ADDRESS) = 0x13; - DPRINTK("SR13 = %x\n", *(regs + SEQ_ADDRESS_R)); - *(regs + SEQ_ADDRESS) = 0x15; - DPRINTK("SR15 = %x\n", *(regs + SEQ_ADDRESS_R)); - - return; -} -#endif diff --git a/drivers/video/cyberfb.h b/drivers/video/cyberfb.h deleted file mode 100644 index 8435c430ad2..00000000000 --- a/drivers/video/cyberfb.h +++ /dev/null @@ -1,415 +0,0 @@ -/* - * linux/arch/m68k/console/cvision.h -- CyberVision64 definitions for the - * text console driver. - * - * Copyright (c) 1998 Alan Bair - * - * This file is based on the initial port to Linux of grf_cvreg.h: - * - * Copyright (c) 1997 Antonio Santos - * - * The original work is from the NetBSD CyberVision 64 framebuffer driver - * and support files (grf_cv.c, grf_cvreg.h, ite_cv.c): - * Permission to use the source of this driver was obtained from the - * author Michael Teske by Alan Bair. - * - * Copyright (c) 1995 Michael Teske - * - * History: - * - * - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive - * for more details. - */ - -/* s3 commands */ -#define S3_BITBLT 0xc011 -#define S3_TWOPOINTLINE 0x2811 -#define S3_FILLEDRECT 0x40b1 - -#define S3_FIFO_EMPTY 0x0400 -#define S3_HDW_BUSY 0x0200 - -/* Enhanced register mapping (MMIO mode) */ - -#define S3_READ_SEL 0xbee8 /* offset f */ -#define S3_MULT_MISC 0xbee8 /* offset e */ -#define S3_ERR_TERM 0x92e8 -#define S3_FRGD_COLOR 0xa6e8 -#define S3_BKGD_COLOR 0xa2e8 -#define S3_PIXEL_CNTL 0xbee8 /* offset a */ -#define S3_FRGD_MIX 0xbae8 -#define S3_BKGD_MIX 0xb6e8 -#define S3_CUR_Y 0x82e8 -#define S3_CUR_X 0x86e8 -#define S3_DESTY_AXSTP 0x8ae8 -#define S3_DESTX_DIASTP 0x8ee8 -#define S3_MIN_AXIS_PCNT 0xbee8 /* offset 0 */ -#define S3_MAJ_AXIS_PCNT 0x96e8 -#define S3_CMD 0x9ae8 -#define S3_GP_STAT 0x9ae8 -#define S3_ADVFUNC_CNTL 0x4ae8 -#define S3_WRT_MASK 0xaae8 -#define S3_RD_MASK 0xaee8 - -/* Enhanced register mapping (Packed MMIO mode, write only) */ -#define S3_ALT_CURXY 0x8100 -#define S3_ALT_CURXY2 0x8104 -#define S3_ALT_STEP 0x8108 -#define S3_ALT_STEP2 0x810c -#define S3_ALT_ERR 0x8110 -#define S3_ALT_CMD 0x8118 -#define S3_ALT_MIX 0x8134 -#define S3_ALT_PCNT 0x8148 -#define S3_ALT_PAT 0x8168 - -/* Drawing modes */ -#define S3_NOTCUR 0x0000 -#define S3_LOGICALZERO 0x0001 -#define S3_LOGICALONE 0x0002 -#define S3_LEAVEASIS 0x0003 -#define S3_NOTNEW 0x0004 -#define S3_CURXORNEW 0x0005 -#define S3_NOT_CURXORNEW 0x0006 -#define S3_NEW 0x0007 -#define S3_NOTCURORNOTNEW 0x0008 -#define S3_CURORNOTNEW 0x0009 -#define S3_NOTCURORNEW 0x000a -#define S3_CURORNEW 0x000b -#define S3_CURANDNEW 0x000c -#define S3_NOTCURANDNEW 0x000d -#define S3_CURANDNOTNEW 0x000e -#define S3_NOTCURANDNOTNEW 0x000f - -#define S3_CRTC_ADR 0x03d4 -#define S3_CRTC_DATA 0x03d5 - -#define S3_REG_LOCK2 0x39 -#define S3_HGC_MODE 0x45 - -#define S3_HWGC_ORGX_H 0x46 -#define S3_HWGC_ORGX_L 0x47 -#define S3_HWGC_ORGY_H 0x48 -#define S3_HWGC_ORGY_L 0x49 -#define S3_HWGC_DX 0x4e -#define S3_HWGC_DY 0x4f - -#define S3_LAW_CTL 0x58 - -/**************************************************/ - -/* support for a BitBlt operation. The op-codes are identical - to X11 GCs */ -#define GRFBBOPclear 0x0 /* 0 */ -#define GRFBBOPand 0x1 /* src AND dst */ -#define GRFBBOPandReverse 0x2 /* src AND NOT dst */ -#define GRFBBOPcopy 0x3 /* src */ -#define GRFBBOPandInverted 0x4 /* NOT src AND dst */ -#define GRFBBOPnoop 0x5 /* dst */ -#define GRFBBOPxor 0x6 /* src XOR dst */ -#define GRFBBOPor 0x7 /* src OR dst */ -#define GRFBBOPnor 0x8 /* NOT src AND NOT dst */ -#define GRFBBOPequiv 0x9 /* NOT src XOR dst */ -#define GRFBBOPinvert 0xa /* NOT dst */ -#define GRFBBOPorReverse 0xb /* src OR NOT dst */ -#define GRFBBOPcopyInverted 0xc /* NOT src */ -#define GRFBBOPorInverted 0xd /* NOT src OR dst */ -#define GRFBBOPnand 0xe /* NOT src OR NOT dst */ -#define GRFBBOPset 0xf /* 1 */ - - -/* Write 16 Bit VGA register */ -#define vgaw16(ba, reg, val) \ -*((unsigned short *) (((volatile unsigned char *)ba)+reg)) = val - -/* - * Defines for the used register addresses (mw) - * - * NOTE: There are some registers that have different addresses when - * in mono or color mode. We only support color mode, and thus - * some addresses won't work in mono-mode! - * - * General and VGA-registers taken from retina driver. Fixed a few - * bugs in it. (SR and GR read address is Port + 1, NOT Port) - * - */ - -/* General Registers: */ -#define GREG_MISC_OUTPUT_R 0x03CC -#define GREG_MISC_OUTPUT_W 0x03C2 -#define GREG_FEATURE_CONTROL_R 0x03CA -#define GREG_FEATURE_CONTROL_W 0x03DA -#define GREG_INPUT_STATUS0_R 0x03C2 -#define GREG_INPUT_STATUS1_R 0x03DA - -/* Setup Registers: */ -#define SREG_OPTION_SELECT 0x0102 -#define SREG_VIDEO_SUBS_ENABLE 0x46E8 - -/* Attribute Controller: */ -#define ACT_ADDRESS 0x03C0 -#define ACT_ADDRESS_R 0x03C1 -#define ACT_ADDRESS_W 0x03C0 -#define ACT_ADDRESS_RESET 0x03DA -#define ACT_ID_PALETTE0 0x00 -#define ACT_ID_PALETTE1 0x01 -#define ACT_ID_PALETTE2 0x02 -#define ACT_ID_PALETTE3 0x03 -#define ACT_ID_PALETTE4 0x04 -#define ACT_ID_PALETTE5 0x05 -#define ACT_ID_PALETTE6 0x06 -#define ACT_ID_PALETTE7 0x07 -#define ACT_ID_PALETTE8 0x08 -#define ACT_ID_PALETTE9 0x09 -#define ACT_ID_PALETTE10 0x0A -#define ACT_ID_PALETTE11 0x0B -#define ACT_ID_PALETTE12 0x0C -#define ACT_ID_PALETTE13 0x0D -#define ACT_ID_PALETTE14 0x0E -#define ACT_ID_PALETTE15 0x0F -#define ACT_ID_ATTR_MODE_CNTL 0x10 -#define ACT_ID_OVERSCAN_COLOR 0x11 -#define ACT_ID_COLOR_PLANE_ENA 0x12 -#define ACT_ID_HOR_PEL_PANNING 0x13 -#define ACT_ID_COLOR_SELECT 0x14 - -/* Graphics Controller: */ -#define GCT_ADDRESS 0x03CE -#define GCT_ADDRESS_R 0x03CF -#define GCT_ADDRESS_W 0x03CF -#define GCT_ID_SET_RESET 0x00 -#define GCT_ID_ENABLE_SET_RESET 0x01 -#define GCT_ID_COLOR_COMPARE 0x02 -#define GCT_ID_DATA_ROTATE 0x03 -#define GCT_ID_READ_MAP_SELECT 0x04 -#define GCT_ID_GRAPHICS_MODE 0x05 -#define GCT_ID_MISC 0x06 -#define GCT_ID_COLOR_XCARE 0x07 -#define GCT_ID_BITMASK 0x08 - -/* Sequencer: */ -#define SEQ_ADDRESS 0x03C4 -#define SEQ_ADDRESS_R 0x03C5 -#define SEQ_ADDRESS_W 0x03C5 -#define SEQ_ID_RESET 0x00 -#define SEQ_ID_CLOCKING_MODE 0x01 -#define SEQ_ID_MAP_MASK 0x02 -#define SEQ_ID_CHAR_MAP_SELECT 0x03 -#define SEQ_ID_MEMORY_MODE 0x04 -#define SEQ_ID_UNKNOWN1 0x05 -#define SEQ_ID_UNKNOWN2 0x06 -#define SEQ_ID_UNKNOWN3 0x07 -/* S3 extensions */ -#define SEQ_ID_UNLOCK_EXT 0x08 -#define SEQ_ID_EXT_SEQ_REG9 0x09 -#define SEQ_ID_BUS_REQ_CNTL 0x0A -#define SEQ_ID_EXT_MISC_SEQ 0x0B -#define SEQ_ID_UNKNOWN4 0x0C -#define SEQ_ID_EXT_SEQ 0x0D -#define SEQ_ID_UNKNOWN5 0x0E -#define SEQ_ID_UNKNOWN6 0x0F -#define SEQ_ID_MCLK_LO 0x10 -#define SEQ_ID_MCLK_HI 0x11 -#define SEQ_ID_DCLK_LO 0x12 -#define SEQ_ID_DCLK_HI 0x13 -#define SEQ_ID_CLKSYN_CNTL_1 0x14 -#define SEQ_ID_CLKSYN_CNTL_2 0x15 -#define SEQ_ID_CLKSYN_TEST_HI 0x16 /* reserved for S3 testing of the */ -#define SEQ_ID_CLKSYN_TEST_LO 0x17 /* internal clock synthesizer */ -#define SEQ_ID_RAMDAC_CNTL 0x18 -#define SEQ_ID_MORE_MAGIC 0x1A - -/* CRT Controller: */ -#define CRT_ADDRESS 0x03D4 -#define CRT_ADDRESS_R 0x03D5 -#define CRT_ADDRESS_W 0x03D5 -#define CRT_ID_HOR_TOTAL 0x00 -#define CRT_ID_HOR_DISP_ENA_END 0x01 -#define CRT_ID_START_HOR_BLANK 0x02 -#define CRT_ID_END_HOR_BLANK 0x03 -#define CRT_ID_START_HOR_RETR 0x04 -#define CRT_ID_END_HOR_RETR 0x05 -#define CRT_ID_VER_TOTAL 0x06 -#define CRT_ID_OVERFLOW 0x07 -#define CRT_ID_PRESET_ROW_SCAN 0x08 -#define CRT_ID_MAX_SCAN_LINE 0x09 -#define CRT_ID_CURSOR_START 0x0A -#define CRT_ID_CURSOR_END 0x0B -#define CRT_ID_START_ADDR_HIGH 0x0C -#define CRT_ID_START_ADDR_LOW 0x0D -#define CRT_ID_CURSOR_LOC_HIGH 0x0E -#define CRT_ID_CURSOR_LOC_LOW 0x0F -#define CRT_ID_START_VER_RETR 0x10 -#define CRT_ID_END_VER_RETR 0x11 -#define CRT_ID_VER_DISP_ENA_END 0x12 -#define CRT_ID_SCREEN_OFFSET 0x13 -#define CRT_ID_UNDERLINE_LOC 0x14 -#define CRT_ID_START_VER_BLANK 0x15 -#define CRT_ID_END_VER_BLANK 0x16 -#define CRT_ID_MODE_CONTROL 0x17 -#define CRT_ID_LINE_COMPARE 0x18 -#define CRT_ID_GD_LATCH_RBACK 0x22 -#define CRT_ID_ACT_TOGGLE_RBACK 0x24 -#define CRT_ID_ACT_INDEX_RBACK 0x26 -/* S3 extensions: S3 VGA Registers */ -#define CRT_ID_DEVICE_HIGH 0x2D -#define CRT_ID_DEVICE_LOW 0x2E -#define CRT_ID_REVISION 0x2F -#define CRT_ID_CHIP_ID_REV 0x30 -#define CRT_ID_MEMORY_CONF 0x31 -#define CRT_ID_BACKWAD_COMP_1 0x32 -#define CRT_ID_BACKWAD_COMP_2 0x33 -#define CRT_ID_BACKWAD_COMP_3 0x34 -#define CRT_ID_REGISTER_LOCK 0x35 -#define CRT_ID_CONFIG_1 0x36 -#define CRT_ID_CONFIG_2 0x37 -#define CRT_ID_REGISTER_LOCK_1 0x38 -#define CRT_ID_REGISTER_LOCK_2 0x39 -#define CRT_ID_MISC_1 0x3A -#define CRT_ID_DISPLAY_FIFO 0x3B -#define CRT_ID_LACE_RETR_START 0x3C -/* S3 extensions: System Control Registers */ -#define CRT_ID_SYSTEM_CONFIG 0x40 -#define CRT_ID_BIOS_FLAG 0x41 -#define CRT_ID_LACE_CONTROL 0x42 -#define CRT_ID_EXT_MODE 0x43 -#define CRT_ID_HWGC_MODE 0x45 /* HWGC = Hardware Graphics Cursor */ -#define CRT_ID_HWGC_ORIGIN_X_HI 0x46 -#define CRT_ID_HWGC_ORIGIN_X_LO 0x47 -#define CRT_ID_HWGC_ORIGIN_Y_HI 0x48 -#define CRT_ID_HWGC_ORIGIN_Y_LO 0x49 -#define CRT_ID_HWGC_FG_STACK 0x4A -#define CRT_ID_HWGC_BG_STACK 0x4B -#define CRT_ID_HWGC_START_AD_HI 0x4C -#define CRT_ID_HWGC_START_AD_LO 0x4D -#define CRT_ID_HWGC_DSTART_X 0x4E -#define CRT_ID_HWGC_DSTART_Y 0x4F -/* S3 extensions: System Extension Registers */ -#define CRT_ID_EXT_SYS_CNTL_1 0x50 -#define CRT_ID_EXT_SYS_CNTL_2 0x51 -#define CRT_ID_EXT_BIOS_FLAG_1 0x52 -#define CRT_ID_EXT_MEM_CNTL_1 0x53 -#define CRT_ID_EXT_MEM_CNTL_2 0x54 -#define CRT_ID_EXT_DAC_CNTL 0x55 -#define CRT_ID_EX_SYNC_1 0x56 -#define CRT_ID_EX_SYNC_2 0x57 -#define CRT_ID_LAW_CNTL 0x58 /* LAW = Linear Address Window */ -#define CRT_ID_LAW_POS_HI 0x59 -#define CRT_ID_LAW_POS_LO 0x5A -#define CRT_ID_GOUT_PORT 0x5C -#define CRT_ID_EXT_HOR_OVF 0x5D -#define CRT_ID_EXT_VER_OVF 0x5E -#define CRT_ID_EXT_MEM_CNTL_3 0x60 -#define CRT_ID_EX_SYNC_3 0x63 -#define CRT_ID_EXT_MISC_CNTL 0x65 -#define CRT_ID_EXT_MISC_CNTL_1 0x66 -#define CRT_ID_EXT_MISC_CNTL_2 0x67 -#define CRT_ID_CONFIG_3 0x68 -#define CRT_ID_EXT_SYS_CNTL_3 0x69 -#define CRT_ID_EXT_SYS_CNTL_4 0x6A -#define CRT_ID_EXT_BIOS_FLAG_3 0x6B -#define CRT_ID_EXT_BIOS_FLAG_4 0x6C - -/* Enhanced Commands Registers: */ -#define ECR_SUBSYSTEM_STAT 0x42E8 -#define ECR_SUBSYSTEM_CNTL 0x42E8 -#define ECR_ADV_FUNC_CNTL 0x4AE8 -#define ECR_CURRENT_Y_POS 0x82E8 -#define ECR_CURRENT_Y_POS2 0x82EA /* Trio64 only */ -#define ECR_CURRENT_X_POS 0x86E8 -#define ECR_CURRENT_X_POS2 0x86EA /* Trio64 only */ -#define ECR_DEST_Y__AX_STEP 0x8AE8 -#define ECR_DEST_Y2__AX_STEP2 0x8AEA /* Trio64 only */ -#define ECR_DEST_X__DIA_STEP 0x8EE8 -#define ECR_DEST_X2__DIA_STEP2 0x8EEA /* Trio64 only */ -#define ECR_ERR_TERM 0x92E8 -#define ECR_ERR_TERM2 0x92EA /* Trio64 only */ -#define ECR_MAJ_AXIS_PIX_CNT 0x96E8 -#define ECR_MAJ_AXIS_PIX_CNT2 0x96EA /* Trio64 only */ -#define ECR_GP_STAT 0x9AE8 /* GP = Graphics Processor */ -#define ECR_DRAW_CMD 0x9AE8 -#define ECR_DRAW_CMD2 0x9AEA /* Trio64 only */ -#define ECR_SHORT_STROKE 0x9EE8 -#define ECR_BKGD_COLOR 0xA2E8 /* BKGD = Background */ -#define ECR_FRGD_COLOR 0xA6E8 /* FRGD = Foreground */ -#define ECR_BITPLANE_WRITE_MASK 0xAAE8 -#define ECR_BITPLANE_READ_MASK 0xAEE8 -#define ECR_COLOR_COMPARE 0xB2E8 -#define ECR_BKGD_MIX 0xB6E8 -#define ECR_FRGD_MIX 0xBAE8 -#define ECR_READ_REG_DATA 0xBEE8 -#define ECR_ID_MIN_AXIS_PIX_CNT 0x00 -#define ECR_ID_SCISSORS_TOP 0x01 -#define ECR_ID_SCISSORS_LEFT 0x02 -#define ECR_ID_SCISSORS_BUTTOM 0x03 -#define ECR_ID_SCISSORS_RIGHT 0x04 -#define ECR_ID_PIX_CNTL 0x0A -#define ECR_ID_MULT_CNTL_MISC_2 0x0D -#define ECR_ID_MULT_CNTL_MISC 0x0E -#define ECR_ID_READ_SEL 0x0F -#define ECR_PIX_TRANS 0xE2E8 -#define ECR_PIX_TRANS_EXT 0xE2EA -#define ECR_PATTERN_Y 0xEAE8 /* Trio64 only */ -#define ECR_PATTERN_X 0xEAEA /* Trio64 only */ - - -/* Pass-through */ -#define PASS_ADDRESS 0x40001 -#define PASS_ADDRESS_W 0x40001 - -/* Video DAC */ -#define VDAC_ADDRESS 0x03c8 -#define VDAC_ADDRESS_W 0x03c8 -#define VDAC_ADDRESS_R 0x03c7 -#define VDAC_STATE 0x03c7 -#define VDAC_DATA 0x03c9 -#define VDAC_MASK 0x03c6 - - -#define WGfx(ba, idx, val) \ -do { wb_64(ba, GCT_ADDRESS, idx); wb_64(ba, GCT_ADDRESS_W , val); } while (0) - -#define WSeq(ba, idx, val) \ -do { wb_64(ba, SEQ_ADDRESS, idx); wb_64(ba, SEQ_ADDRESS_W , val); } while (0) - -#define WCrt(ba, idx, val) \ -do { wb_64(ba, CRT_ADDRESS, idx); wb_64(ba, CRT_ADDRESS_W , val); } while (0) - -#define WAttr(ba, idx, val) \ -do { \ - unsigned char tmp;\ - tmp = rb_64(ba, ACT_ADDRESS_RESET);\ - wb_64(ba, ACT_ADDRESS_W, idx);\ - wb_64(ba, ACT_ADDRESS_W, val);\ -} while (0) - -#define SetTextPlane(ba, m) \ -do { \ - WGfx(ba, GCT_ID_READ_MAP_SELECT, m & 3 );\ - WSeq(ba, SEQ_ID_MAP_MASK, (1 << (m & 3)));\ -} while (0) - - /* --------------------------------- */ - /* prototypes */ - /* --------------------------------- */ - -inline unsigned char RAttr(volatile unsigned char * board, short idx); -inline unsigned char RSeq(volatile unsigned char * board, short idx); -inline unsigned char RCrt(volatile unsigned char * board, short idx); -inline unsigned char RGfx(volatile unsigned char * board, short idx); -inline void cv64_write_port(unsigned short bits, - volatile unsigned char *board); -inline void cvscreen(int toggle, volatile unsigned char *board); -inline void gfx_on_off(int toggle, volatile unsigned char *board); -#if 0 -unsigned short cv64_compute_clock(unsigned long freq); -int cv_has_4mb(volatile unsigned char * fb); -void cv64_board_init(void); -void cv64_load_video_mode(struct fb_var_screeninfo *video_mode); -#endif - -void cvision_bitblt(u_short sx, u_short sy, u_short dx, u_short dy, u_short w, - u_short h); -void cvision_clear(u_short dx, u_short dy, u_short w, u_short h, u_short bg); diff --git a/drivers/video/fbsysfs.c b/drivers/video/fbsysfs.c index 323bdf6fc7d..818fb09105f 100644 --- a/drivers/video/fbsysfs.c +++ b/drivers/video/fbsysfs.c @@ -175,7 +175,7 @@ static ssize_t store_modes(struct device *device, acquire_console_sem(); list_splice(&fb_info->modelist, &old_list); - fb_videomode_to_modelist((struct fb_videomode *)buf, i, + fb_videomode_to_modelist((const struct fb_videomode *)buf, i, &fb_info->modelist); if (fb_new_modelist(fb_info)) { fb_destroy_modelist(&fb_info->modelist); diff --git a/drivers/video/geode/gx1fb_core.c b/drivers/video/geode/gx1fb_core.c index bcf9cea54d8..bb20a228976 100644 --- a/drivers/video/geode/gx1fb_core.c +++ b/drivers/video/geode/gx1fb_core.c @@ -401,6 +401,30 @@ static void gx1fb_remove(struct pci_dev *pdev) framebuffer_release(info); } +#ifndef MODULE +static void __init gx1fb_setup(char *options) +{ + char *this_opt; + + if (!options || !*options) + return; + + while ((this_opt = strsep(&options, ","))) { + if (!*this_opt) + continue; + + if (!strncmp(this_opt, "mode:", 5)) + strlcpy(mode_option, this_opt + 5, sizeof(mode_option)); + else if (!strncmp(this_opt, "crt:", 4)) + crt_option = !!simple_strtoul(this_opt + 4, NULL, 0); + else if (!strncmp(this_opt, "panel:", 6)) + strlcpy(panel_option, this_opt + 6, sizeof(panel_option)); + else + strlcpy(mode_option, this_opt, sizeof(mode_option)); + } +} +#endif + static struct pci_device_id gx1fb_id_table[] = { { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_VIDEO, PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16, @@ -420,8 +444,11 @@ static struct pci_driver gx1fb_driver = { static int __init gx1fb_init(void) { #ifndef MODULE - if (fb_get_options("gx1fb", NULL)) + char *option = NULL; + + if (fb_get_options("gx1fb", &option)) return -ENODEV; + gx1fb_setup(option); #endif return pci_register_driver(&gx1fb_driver); } diff --git a/drivers/video/i810/i810.h b/drivers/video/i810/i810.h index 579195c2bea..aa65ffce915 100644 --- a/drivers/video/i810/i810.h +++ b/drivers/video/i810/i810.h @@ -264,7 +264,8 @@ struct i810fb_par { struct heap_data cursor_heap; struct vgastate state; struct i810fb_i2c_chan chan[3]; - atomic_t use_count; + struct mutex open_lock; + unsigned int use_count; u32 pseudo_palette[17]; unsigned long mmio_start_phys; u8 __iomem *mmio_start_virtual; diff --git a/drivers/video/i810/i810_main.c b/drivers/video/i810/i810_main.c index b55a12d95eb..ab1b8fe34d6 100644 --- a/drivers/video/i810/i810_main.c +++ b/drivers/video/i810/i810_main.c @@ -1049,7 +1049,7 @@ static int i810_check_params(struct fb_var_screeninfo *var, mode_valid = 1; if (!mode_valid && info->monspecs.modedb_len) { - struct fb_videomode *mode; + const struct fb_videomode *mode; mode = fb_find_best_mode(var, &info->modelist); if (mode) { @@ -1235,9 +1235,9 @@ static int i810fb_getcolreg(u8 regno, u8 *red, u8 *green, u8 *blue, static int i810fb_open(struct fb_info *info, int user) { struct i810fb_par *par = info->par; - u32 count = atomic_read(&par->use_count); - - if (count == 0) { + + mutex_lock(&par->open_lock); + if (par->use_count == 0) { memset(&par->state, 0, sizeof(struct vgastate)); par->state.flags = VGA_SAVE_CMAP; par->state.vgabase = par->mmio_start_virtual; @@ -1246,7 +1246,8 @@ static int i810fb_open(struct fb_info *info, int user) i810_save_vga_state(par); } - atomic_inc(&par->use_count); + par->use_count++; + mutex_unlock(&par->open_lock); return 0; } @@ -1254,18 +1255,20 @@ static int i810fb_open(struct fb_info *info, int user) static int i810fb_release(struct fb_info *info, int user) { struct i810fb_par *par = info->par; - u32 count; - - count = atomic_read(&par->use_count); - if (count == 0) + + mutex_lock(&par->open_lock); + if (par->use_count == 0) { + mutex_unlock(&par->open_lock); return -EINVAL; + } - if (count == 1) { + if (par->use_count == 1) { i810_restore_vga_state(par); restore_vga(&par->state); } - atomic_dec(&par->use_count); + par->use_count--; + mutex_unlock(&par->open_lock); return 0; } @@ -1752,6 +1755,8 @@ static void __devinit i810_init_monspecs(struct fb_info *info) static void __devinit i810_init_defaults(struct i810fb_par *par, struct fb_info *info) { + mutex_init(&par->open_lock); + if (voffset) v_offset_default = voffset; else if (par->aperture.size > 32 * 1024 * 1024) @@ -1919,7 +1924,7 @@ static void __devinit i810fb_find_init_mode(struct fb_info *info) fb_videomode_to_modelist(specs->modedb, specs->modedb_len, &info->modelist); if (specs->modedb != NULL) { - struct fb_videomode *m; + const struct fb_videomode *m; if (xres && yres) { if ((m = fb_find_best_mode(&var, &info->modelist))) { @@ -2016,11 +2021,10 @@ static int __devinit i810fb_init_pci (struct pci_dev *dev, par = info->par; par->dev = dev; - if (!(info->pixmap.addr = kmalloc(8*1024, GFP_KERNEL))) { + if (!(info->pixmap.addr = kzalloc(8*1024, GFP_KERNEL))) { i810fb_release_resource(info, par); return -ENOMEM; } - memset(info->pixmap.addr, 0, 8*1024); info->pixmap.size = 8*1024; info->pixmap.buf_align = 8; info->pixmap.access_align = 32; diff --git a/drivers/video/igafb.c b/drivers/video/igafb.c index 655ae0fa99c..90592fb5915 100644 --- a/drivers/video/igafb.c +++ b/drivers/video/igafb.c @@ -370,7 +370,6 @@ static int __init iga_init(struct fb_info *info, struct iga_par *par) int __init igafb_init(void) { - extern int con_is_present(void); struct fb_info *info; struct pci_dev *pdev; struct iga_par *par; @@ -402,12 +401,11 @@ int __init igafb_init(void) size = sizeof(struct fb_info) + sizeof(struct iga_par) + sizeof(u32)*16; - info = kmalloc(size, GFP_ATOMIC); + info = kzalloc(size, GFP_ATOMIC); if (!info) { printk("igafb_init: can't alloc fb_info\n"); return -ENOMEM; } - memset(info, 0, size); par = (struct iga_par *) (info + 1); @@ -466,7 +464,7 @@ int __init igafb_init(void) * one additional region with size == 0. */ - par->mmap_map = kmalloc(4 * sizeof(*par->mmap_map), GFP_ATOMIC); + par->mmap_map = kzalloc(4 * sizeof(*par->mmap_map), GFP_ATOMIC); if (!par->mmap_map) { printk("igafb_init: can't alloc mmap_map\n"); iounmap((void *)par->io_base); @@ -475,8 +473,6 @@ int __init igafb_init(void) return -ENOMEM; } - memset(par->mmap_map, 0, 4 * sizeof(*par->mmap_map)); - /* * Set default vmode and cmode from PROM properties. */ diff --git a/drivers/video/intelfb/intelfbdrv.c b/drivers/video/intelfb/intelfbdrv.c index 664fc5cf962..b75eda84858 100644 --- a/drivers/video/intelfb/intelfbdrv.c +++ b/drivers/video/intelfb/intelfbdrv.c @@ -540,12 +540,11 @@ intelfb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent) dinfo->pdev = pdev; /* Reserve pixmap space. */ - info->pixmap.addr = kmalloc(64 * 1024, GFP_KERNEL); + info->pixmap.addr = kzalloc(64 * 1024, GFP_KERNEL); if (info->pixmap.addr == NULL) { ERR_MSG("Cannot reserve pixmap memory.\n"); goto err_out_pixmap; } - memset(info->pixmap.addr, 0, 64 * 1024); /* set early this option because it could be changed by tv encoder driver */ diff --git a/drivers/video/matrox/i2c-matroxfb.c b/drivers/video/matrox/i2c-matroxfb.c index fe28848e7b5..f64c4a0984c 100644 --- a/drivers/video/matrox/i2c-matroxfb.c +++ b/drivers/video/matrox/i2c-matroxfb.c @@ -146,7 +146,7 @@ static void* i2c_matroxfb_probe(struct matrox_fb_info* minfo) { unsigned long flags; struct matroxfb_dh_maven_info* m2info; - m2info = kmalloc(sizeof(*m2info), GFP_KERNEL); + m2info = kzalloc(sizeof(*m2info), GFP_KERNEL); if (!m2info) return NULL; @@ -155,8 +155,6 @@ static void* i2c_matroxfb_probe(struct matrox_fb_info* minfo) { matroxfb_DAC_out(PMINFO DAC_XGENIOCTRL, 0x00); matroxfb_DAC_unlock_irqrestore(flags); - memset(m2info, 0, sizeof(*m2info)); - switch (ACCESS_FBINFO(chip)) { case MGA_2064: case MGA_2164: diff --git a/drivers/video/matrox/matroxfb_crtc2.c b/drivers/video/matrox/matroxfb_crtc2.c index 2c9801090fa..03ae55b168f 100644 --- a/drivers/video/matrox/matroxfb_crtc2.c +++ b/drivers/video/matrox/matroxfb_crtc2.c @@ -694,12 +694,11 @@ static void* matroxfb_crtc2_probe(struct matrox_fb_info* minfo) { /* hardware is CRTC2 incapable... */ if (!ACCESS_FBINFO(devflags.crtc2)) return NULL; - m2info = kmalloc(sizeof(*m2info), GFP_KERNEL); + m2info = kzalloc(sizeof(*m2info), GFP_KERNEL); if (!m2info) { printk(KERN_ERR "matroxfb_crtc2: Not enough memory for CRTC2 control structs\n"); return NULL; } - memset(m2info, 0, sizeof(*m2info)); m2info->primary_dev = MINFO; if (matroxfb_dh_registerfb(m2info)) { kfree(m2info); diff --git a/drivers/video/mbx/mbxdebugfs.c b/drivers/video/mbx/mbxdebugfs.c index 472a3ca3d92..15b8b3c4330 100644 --- a/drivers/video/mbx/mbxdebugfs.c +++ b/drivers/video/mbx/mbxdebugfs.c @@ -170,37 +170,37 @@ static ssize_t misc_read_file(struct file *file, char __user *userbuf, } -static struct file_operations sysconf_fops = { +static const struct file_operations sysconf_fops = { .read = sysconf_read_file, .write = write_file_dummy, .open = open_file_generic, }; -static struct file_operations clock_fops = { +static const struct file_operations clock_fops = { .read = clock_read_file, .write = write_file_dummy, .open = open_file_generic, }; -static struct file_operations display_fops = { +static const struct file_operations display_fops = { .read = display_read_file, .write = write_file_dummy, .open = open_file_generic, }; -static struct file_operations gsctl_fops = { +static const struct file_operations gsctl_fops = { .read = gsctl_read_file, .write = write_file_dummy, .open = open_file_generic, }; -static struct file_operations sdram_fops = { +static const struct file_operations sdram_fops = { .read = sdram_read_file, .write = write_file_dummy, .open = open_file_generic, }; -static struct file_operations misc_fops = { +static const struct file_operations misc_fops = { .read = misc_read_file, .write = write_file_dummy, .open = open_file_generic, diff --git a/drivers/video/modedb.c b/drivers/video/modedb.c index 5df41f6f2b8..5162eab9553 100644 --- a/drivers/video/modedb.c +++ b/drivers/video/modedb.c @@ -610,10 +610,8 @@ done: diff = refresh; best = -1; for (i = 0; i < dbsize; i++) { - if ((name_matches(db[i], name, namelen) && - !fb_try_mode(var, info, &db[i], bpp))) - return 1; - if (res_specified && res_matches(db[i], xres, yres)) { + if (name_matches(db[i], name, namelen) || + (res_specified && res_matches(db[i], xres, yres))) { if(!fb_try_mode(var, info, &db[i], bpp)) { if(!refresh_specified || db[i].refresh == refresh) return 1; @@ -670,7 +668,7 @@ done: * @var: pointer to struct fb_var_screeninfo */ void fb_var_to_videomode(struct fb_videomode *mode, - struct fb_var_screeninfo *var) + const struct fb_var_screeninfo *var) { u32 pixclock, hfreq, htotal, vtotal; @@ -714,17 +712,21 @@ void fb_var_to_videomode(struct fb_videomode *mode, * @mode: pointer to struct fb_videomode */ void fb_videomode_to_var(struct fb_var_screeninfo *var, - struct fb_videomode *mode) + const struct fb_videomode *mode) { var->xres = mode->xres; var->yres = mode->yres; + var->xres_virtual = mode->xres; + var->yres_virtual = mode->yres; + var->xoffset = 0; + var->yoffset = 0; var->pixclock = mode->pixclock; var->left_margin = mode->left_margin; - var->hsync_len = mode->hsync_len; - var->vsync_len = mode->vsync_len; var->right_margin = mode->right_margin; var->upper_margin = mode->upper_margin; var->lower_margin = mode->lower_margin; + var->hsync_len = mode->hsync_len; + var->vsync_len = mode->vsync_len; var->sync = mode->sync; var->vmode = mode->vmode & FB_VMODE_MASK; } @@ -737,8 +739,8 @@ void fb_videomode_to_var(struct fb_var_screeninfo *var, * RETURNS: * 1 if equal, 0 if not */ -int fb_mode_is_equal(struct fb_videomode *mode1, - struct fb_videomode *mode2) +int fb_mode_is_equal(const struct fb_videomode *mode1, + const struct fb_videomode *mode2) { return (mode1->xres == mode2->xres && mode1->yres == mode2->yres && @@ -770,8 +772,8 @@ int fb_mode_is_equal(struct fb_videomode *mode1, * var->xres and var->yres. If more than 1 videomode is found, will return * the videomode with the highest refresh rate */ -struct fb_videomode *fb_find_best_mode(struct fb_var_screeninfo *var, - struct list_head *head) +const struct fb_videomode *fb_find_best_mode(const struct fb_var_screeninfo *var, + struct list_head *head) { struct list_head *pos; struct fb_modelist *modelist; @@ -808,8 +810,8 @@ struct fb_videomode *fb_find_best_mode(struct fb_var_screeninfo *var, * If more than 1 videomode is found, will return the videomode with * the closest refresh rate. */ -struct fb_videomode *fb_find_nearest_mode(struct fb_videomode *mode, - struct list_head *head) +const struct fb_videomode *fb_find_nearest_mode(const struct fb_videomode *mode, + struct list_head *head) { struct list_head *pos; struct fb_modelist *modelist; @@ -847,8 +849,8 @@ struct fb_videomode *fb_find_nearest_mode(struct fb_videomode *mode, * RETURNS: * struct fb_videomode, NULL if none found */ -struct fb_videomode *fb_match_mode(struct fb_var_screeninfo *var, - struct list_head *head) +const struct fb_videomode *fb_match_mode(const struct fb_var_screeninfo *var, + struct list_head *head) { struct list_head *pos; struct fb_modelist *modelist; @@ -872,7 +874,7 @@ struct fb_videomode *fb_match_mode(struct fb_var_screeninfo *var, * NOTES: * Will only add unmatched mode entries */ -int fb_add_videomode(struct fb_videomode *mode, struct list_head *head) +int fb_add_videomode(const struct fb_videomode *mode, struct list_head *head) { struct list_head *pos; struct fb_modelist *modelist; @@ -907,7 +909,8 @@ int fb_add_videomode(struct fb_videomode *mode, struct list_head *head) * NOTES: * Will remove all matching mode entries */ -void fb_delete_videomode(struct fb_videomode *mode, struct list_head *head) +void fb_delete_videomode(const struct fb_videomode *mode, + struct list_head *head) { struct list_head *pos, *n; struct fb_modelist *modelist; @@ -943,7 +946,7 @@ void fb_destroy_modelist(struct list_head *head) * @num: number of entries in array * @head: struct list_head of modelist */ -void fb_videomode_to_modelist(struct fb_videomode *modedb, int num, +void fb_videomode_to_modelist(const struct fb_videomode *modedb, int num, struct list_head *head) { int i; @@ -956,12 +959,12 @@ void fb_videomode_to_modelist(struct fb_videomode *modedb, int num, } } -struct fb_videomode *fb_find_best_display(struct fb_monspecs *specs, - struct list_head *head) +const struct fb_videomode *fb_find_best_display(const struct fb_monspecs *specs, + struct list_head *head) { struct list_head *pos; struct fb_modelist *modelist; - struct fb_videomode *m, *m1 = NULL, *md = NULL, *best = NULL; + const struct fb_videomode *m, *m1 = NULL, *md = NULL, *best = NULL; int first = 0; if (!head->prev || !head->next || list_empty(head)) diff --git a/drivers/video/neofb.c b/drivers/video/neofb.c index deaf820cb38..395ccedde9a 100644 --- a/drivers/video/neofb.c +++ b/drivers/video/neofb.c @@ -66,7 +66,6 @@ #include <linux/init.h> #ifdef CONFIG_TOSHIBA #include <linux/toshiba.h> -extern int tosh_smm(SMMRegisters *regs); #endif #include <asm/io.h> @@ -557,14 +556,16 @@ static int neofb_open(struct fb_info *info, int user) { struct neofb_par *par = info->par; - int cnt = atomic_read(&par->ref_count); - if (!cnt) { + mutex_lock(&par->open_lock); + if (!par->ref_count) { memset(&par->state, 0, sizeof(struct vgastate)); par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS; save_vga(&par->state); } - atomic_inc(&par->ref_count); + par->ref_count++; + mutex_unlock(&par->open_lock); + return 0; } @@ -572,14 +573,18 @@ static int neofb_release(struct fb_info *info, int user) { struct neofb_par *par = info->par; - int cnt = atomic_read(&par->ref_count); - if (!cnt) + mutex_lock(&par->open_lock); + if (!par->ref_count) { + mutex_unlock(&par->open_lock); return -EINVAL; - if (cnt == 1) { + } + if (par->ref_count == 1) { restore_vga(&par->state); } - atomic_dec(&par->ref_count); + par->ref_count--; + mutex_unlock(&par->open_lock); + return 0; } @@ -2048,6 +2053,7 @@ static struct fb_info *__devinit neo_alloc_fb_info(struct pci_dev *dev, const st info->fix.accel = id->driver_data; + mutex_init(&par->open_lock); par->pci_burst = !nopciburst; par->lcd_stretch = !nostretch; par->libretto = libretto; diff --git a/drivers/video/nvidia/nvidia.c b/drivers/video/nvidia/nvidia.c index 538e947610e..8e5b484db64 100644 --- a/drivers/video/nvidia/nvidia.c +++ b/drivers/video/nvidia/nvidia.c @@ -829,7 +829,7 @@ static int nvidiafb_check_var(struct fb_var_screeninfo *var, } if (!mode_valid) { - struct fb_videomode *mode; + const struct fb_videomode *mode; mode = fb_find_best_mode(var, &info->modelist); if (mode) { @@ -1046,10 +1046,10 @@ static int __devinit nvidia_set_fbinfo(struct fb_info *info) } if (specs->modedb != NULL) { - struct fb_videomode *modedb; + const struct fb_videomode *mode; - modedb = fb_find_best_display(specs, &info->modelist); - fb_videomode_to_var(&nvidiafb_default_var, modedb); + mode = fb_find_best_display(specs, &info->modelist); + fb_videomode_to_var(&nvidiafb_default_var, mode); nvidiafb_default_var.bits_per_pixel = bpp; } else if (par->fpWidth && par->fpHeight) { char buf[16]; @@ -1205,13 +1205,11 @@ static int __devinit nvidiafb_probe(struct pci_dev *pd, par = info->par; par->pci_dev = pd; - info->pixmap.addr = kmalloc(8 * 1024, GFP_KERNEL); + info->pixmap.addr = kzalloc(8 * 1024, GFP_KERNEL); if (info->pixmap.addr == NULL) goto err_out_kfree; - memset(info->pixmap.addr, 0, 8 * 1024); - if (pci_enable_device(pd)) { printk(KERN_ERR PFX "cannot enable PCI device\n"); goto err_out_enable; @@ -1347,7 +1345,7 @@ err_out: return -ENODEV; } -static void __exit nvidiafb_remove(struct pci_dev *pd) +static void __devexit nvidiafb_remove(struct pci_dev *pd) { struct fb_info *info = pci_get_drvdata(pd); struct nvidia_par *par = info->par; @@ -1433,7 +1431,7 @@ static struct pci_driver nvidiafb_driver = { .probe = nvidiafb_probe, .suspend = nvidiafb_suspend, .resume = nvidiafb_resume, - .remove = __exit_p(nvidiafb_remove), + .remove = __devexit_p(nvidiafb_remove), }; /* ------------------------------------------------------------------------- * diff --git a/drivers/video/pm3fb.c b/drivers/video/pm3fb.c index 1d81ef47efd..bd787e80177 100644 --- a/drivers/video/pm3fb.c +++ b/drivers/video/pm3fb.c @@ -3299,14 +3299,12 @@ static void pm3fb_detect(void) fb_info[i].dev = NULL; } - dev = - pci_find_device(PCI_VENDOR_ID_3DLABS, + dev = pci_get_device(PCI_VENDOR_ID_3DLABS, PCI_DEVICE_ID_3DLABS_PERMEDIA3, dev); for (i = 0; ((i < PM3_MAX_BOARD) && dev); i++) { dev_array[i] = dev; - dev = - pci_find_device(PCI_VENDOR_ID_3DLABS, + dev = pci_get_device(PCI_VENDOR_ID_3DLABS, PCI_DEVICE_ID_3DLABS_PERMEDIA3, dev); } @@ -3353,7 +3351,7 @@ static void pm3fb_detect(void) /* now, initialize... or not */ for (i = 0; i < PM3_MAX_BOARD; i++) { l_fb_info = &(fb_info[i]); - if ((l_fb_info->dev) && (!disable[i])) { /* PCI device was found and not disabled by user */ + if (l_fb_info->dev && !disable[i]) { /* PCI device was found and not disabled by user */ DPRINTK(2, "found @%lx Vendor %lx Device %lx ; base @ : %lx - %lx - %lx - %lx - %lx - %lx, irq %ld\n", (unsigned long) l_fb_info->dev, @@ -3608,7 +3606,7 @@ int init_module(void) pm3fb_init(); - return (0); + return 0; } void cleanup_module(void) @@ -3619,23 +3617,18 @@ void cleanup_module(void) struct pm3fb_info *l_fb_info; for (i = 0; i < PM3_MAX_BOARD; i++) { l_fb_info = &(fb_info[i]); - if ((l_fb_info->dev != NULL) - && (!(disable[l_fb_info->board_num]))) { - if (l_fb_info->vIOBase != - (unsigned char *) -1) { + pci_dev_put(l_fb_info->dev); + if (l_fb_info->dev != NULL && !(disable[l_fb_info->board_num])) { + if (l_fb_info->vIOBase != (unsigned char *) -1) { pm3fb_unmapIO(l_fb_info); release_mem_region(l_fb_info->p_fb, - l_fb_info-> - fb_size); - release_mem_region(l_fb_info-> - pIOBase, - PM3_REGS_SIZE); + l_fb_info->fb_size); + release_mem_region(l_fb_info->pIOBase, + PM3_REGS_SIZE); } - unregister_framebuffer(&l_fb_info->gen. - info); + unregister_framebuffer(&l_fb_info->gen.info); } } } - return; } #endif /* MODULE */ diff --git a/drivers/video/pmag-ba-fb.c b/drivers/video/pmag-ba-fb.c index f5361cd8ccc..264d37243fa 100644 --- a/drivers/video/pmag-ba-fb.c +++ b/drivers/video/pmag-ba-fb.c @@ -15,7 +15,8 @@ * Michael Engel <engel@unix-ag.org>, * Karsten Merker <merker@linuxtag.org> and * Harald Koerfgen. - * Copyright (c) 2005 Maciej W. Rozycki + * Copyright (c) 2005, 2006 Maciej W. Rozycki + * Copyright (c) 2005 James Simmons * * This file is subject to the terms and conditions of the GNU General * Public License. See the file COPYING in the main directory of this @@ -28,26 +29,21 @@ #include <linux/init.h> #include <linux/kernel.h> #include <linux/module.h> +#include <linux/tc.h> #include <linux/types.h> #include <asm/io.h> #include <asm/system.h> -#include <asm/dec/tc.h> - #include <video/pmag-ba-fb.h> struct pmagbafb_par { - struct fb_info *next; volatile void __iomem *mmio; volatile u32 __iomem *dac; - int slot; }; -static struct fb_info *root_pmagbafb_dev; - static struct fb_var_screeninfo pmagbafb_defined __initdata = { .xres = 1024, .yres = 864, @@ -145,24 +141,19 @@ static void __init pmagbafb_erase_cursor(struct fb_info *info) } -static int __init pmagbafb_init_one(int slot) +static int __init pmagbafb_probe(struct device *dev) { + struct tc_dev *tdev = to_tc_dev(dev); + resource_size_t start, len; struct fb_info *info; struct pmagbafb_par *par; - unsigned long base_addr; - info = framebuffer_alloc(sizeof(struct pmagbafb_par), NULL); + info = framebuffer_alloc(sizeof(struct pmagbafb_par), dev); if (!info) return -ENOMEM; par = info->par; - par->slot = slot; - claim_tc_card(par->slot); - - base_addr = get_tc_base_addr(par->slot); - - par->next = root_pmagbafb_dev; - root_pmagbafb_dev = info; + dev_set_drvdata(dev, info); if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) goto err_alloc; @@ -172,15 +163,21 @@ static int __init pmagbafb_init_one(int slot) info->var = pmagbafb_defined; info->flags = FBINFO_DEFAULT; + /* Request the I/O MEM resource. */ + start = tdev->resource.start; + len = tdev->resource.end - start + 1; + if (!request_mem_region(start, len, dev->bus_id)) + goto err_cmap; + /* MMIO mapping setup. */ - info->fix.mmio_start = base_addr; + info->fix.mmio_start = start; par->mmio = ioremap_nocache(info->fix.mmio_start, info->fix.mmio_len); if (!par->mmio) - goto err_cmap; + goto err_resource; par->dac = par->mmio + PMAG_BA_BT459; /* Frame buffer mapping setup. */ - info->fix.smem_start = base_addr + PMAG_BA_FBMEM; + info->fix.smem_start = start + PMAG_BA_FBMEM; info->screen_base = ioremap_nocache(info->fix.smem_start, info->fix.smem_len); if (!info->screen_base) @@ -192,8 +189,10 @@ static int __init pmagbafb_init_one(int slot) if (register_framebuffer(info) < 0) goto err_smem_map; - pr_info("fb%d: %s frame buffer device in slot %d\n", - info->node, info->fix.id, par->slot); + get_device(dev); + + pr_info("fb%d: %s frame buffer device at %s\n", + info->node, info->fix.id, dev->bus_id); return 0; @@ -204,54 +203,68 @@ err_smem_map: err_mmio_map: iounmap(par->mmio); +err_resource: + release_mem_region(start, len); + err_cmap: fb_dealloc_cmap(&info->cmap); err_alloc: - root_pmagbafb_dev = par->next; - release_tc_card(par->slot); framebuffer_release(info); return -ENXIO; } -static void __exit pmagbafb_exit_one(void) +static int __exit pmagbafb_remove(struct device *dev) { - struct fb_info *info = root_pmagbafb_dev; + struct tc_dev *tdev = to_tc_dev(dev); + struct fb_info *info = dev_get_drvdata(dev); struct pmagbafb_par *par = info->par; + resource_size_t start, len; + put_device(dev); unregister_framebuffer(info); iounmap(info->screen_base); iounmap(par->mmio); + start = tdev->resource.start; + len = tdev->resource.end - start + 1; + release_mem_region(start, len); fb_dealloc_cmap(&info->cmap); - root_pmagbafb_dev = par->next; - release_tc_card(par->slot); framebuffer_release(info); + return 0; } /* - * Initialise the framebuffer. + * Initialize the framebuffer. */ +static const struct tc_device_id pmagbafb_tc_table[] = { + { "DEC ", "PMAG-BA " }, + { } +}; +MODULE_DEVICE_TABLE(tc, pmagbafb_tc_table); + +static struct tc_driver pmagbafb_driver = { + .id_table = pmagbafb_tc_table, + .driver = { + .name = "pmagbafb", + .bus = &tc_bus_type, + .probe = pmagbafb_probe, + .remove = __exit_p(pmagbafb_remove), + }, +}; + static int __init pmagbafb_init(void) { - int count = 0; - int slot; - +#ifndef MODULE if (fb_get_options("pmagbafb", NULL)) return -ENXIO; - - while ((slot = search_tc_card("PMAG-BA")) >= 0) { - if (pmagbafb_init_one(slot) < 0) - break; - count++; - } - return (count > 0) ? 0 : -ENXIO; +#endif + return tc_register_driver(&pmagbafb_driver); } static void __exit pmagbafb_exit(void) { - while (root_pmagbafb_dev) - pmagbafb_exit_one(); + tc_unregister_driver(&pmagbafb_driver); } diff --git a/drivers/video/pmagb-b-fb.c b/drivers/video/pmagb-b-fb.c index a06a064ad75..7a0ce7d5af6 100644 --- a/drivers/video/pmagb-b-fb.c +++ b/drivers/video/pmagb-b-fb.c @@ -11,7 +11,7 @@ * Michael Engel <engel@unix-ag.org>, * Karsten Merker <merker@linuxtag.org> and * Harald Koerfgen. - * Copyright (c) 2005 Maciej W. Rozycki + * Copyright (c) 2005, 2006 Maciej W. Rozycki * * This file is subject to the terms and conditions of the GNU General * Public License. See the file COPYING in the main directory of this @@ -25,18 +25,16 @@ #include <linux/init.h> #include <linux/kernel.h> #include <linux/module.h> +#include <linux/tc.h> #include <linux/types.h> #include <asm/io.h> #include <asm/system.h> -#include <asm/dec/tc.h> - #include <video/pmagb-b-fb.h> struct pmagbbfb_par { - struct fb_info *next; volatile void __iomem *mmio; volatile void __iomem *smem; volatile u32 __iomem *sfb; @@ -47,8 +45,6 @@ struct pmagbbfb_par { }; -static struct fb_info *root_pmagbbfb_dev; - static struct fb_var_screeninfo pmagbbfb_defined __initdata = { .bits_per_pixel = 8, .red.length = 8, @@ -190,8 +186,9 @@ static void __init pmagbbfb_osc_setup(struct fb_info *info) 69197, 66000, 65000, 50350, 36000, 32000, 25175 }; struct pmagbbfb_par *par = info->par; + struct tc_bus *tbus = to_tc_dev(info->device)->bus; u32 count0 = 8, count1 = 8, counttc = 16 * 256 + 8; - u32 freq0, freq1, freqtc = get_tc_speed() / 250; + u32 freq0, freq1, freqtc = tc_get_speed(tbus) / 250; int i, j; gp0_write(par, 0); /* select Osc0 */ @@ -249,26 +246,21 @@ static void __init pmagbbfb_osc_setup(struct fb_info *info) }; -static int __init pmagbbfb_init_one(int slot) +static int __init pmagbbfb_probe(struct device *dev) { - char freq0[12], freq1[12]; + struct tc_dev *tdev = to_tc_dev(dev); + resource_size_t start, len; struct fb_info *info; struct pmagbbfb_par *par; - unsigned long base_addr; + char freq0[12], freq1[12]; u32 vid_base; - info = framebuffer_alloc(sizeof(struct pmagbbfb_par), NULL); + info = framebuffer_alloc(sizeof(struct pmagbbfb_par), dev); if (!info) return -ENOMEM; par = info->par; - par->slot = slot; - claim_tc_card(par->slot); - - base_addr = get_tc_base_addr(par->slot); - - par->next = root_pmagbbfb_dev; - root_pmagbbfb_dev = info; + dev_set_drvdata(dev, info); if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) goto err_alloc; @@ -278,16 +270,22 @@ static int __init pmagbbfb_init_one(int slot) info->var = pmagbbfb_defined; info->flags = FBINFO_DEFAULT; + /* Request the I/O MEM resource. */ + start = tdev->resource.start; + len = tdev->resource.end - start + 1; + if (!request_mem_region(start, len, dev->bus_id)) + goto err_cmap; + /* MMIO mapping setup. */ - info->fix.mmio_start = base_addr; + info->fix.mmio_start = start; par->mmio = ioremap_nocache(info->fix.mmio_start, info->fix.mmio_len); if (!par->mmio) - goto err_cmap; + goto err_resource; par->sfb = par->mmio + PMAGB_B_SFB; par->dac = par->mmio + PMAGB_B_BT459; /* Frame buffer mapping setup. */ - info->fix.smem_start = base_addr + PMAGB_B_FBMEM; + info->fix.smem_start = start + PMAGB_B_FBMEM; par->smem = ioremap_nocache(info->fix.smem_start, info->fix.smem_len); if (!par->smem) goto err_mmio_map; @@ -302,13 +300,15 @@ static int __init pmagbbfb_init_one(int slot) if (register_framebuffer(info) < 0) goto err_smem_map; + get_device(dev); + snprintf(freq0, sizeof(freq0), "%u.%03uMHz", par->osc0 / 1000, par->osc0 % 1000); snprintf(freq1, sizeof(freq1), "%u.%03uMHz", par->osc1 / 1000, par->osc1 % 1000); - pr_info("fb%d: %s frame buffer device in slot %d\n", - info->node, info->fix.id, par->slot); + pr_info("fb%d: %s frame buffer device at %s\n", + info->node, info->fix.id, dev->bus_id); pr_info("fb%d: Osc0: %s, Osc1: %s, Osc%u selected\n", info->node, freq0, par->osc1 ? freq1 : "disabled", par->osc1 != 0); @@ -322,54 +322,68 @@ err_smem_map: err_mmio_map: iounmap(par->mmio); +err_resource: + release_mem_region(start, len); + err_cmap: fb_dealloc_cmap(&info->cmap); err_alloc: - root_pmagbbfb_dev = par->next; - release_tc_card(par->slot); framebuffer_release(info); return -ENXIO; } -static void __exit pmagbbfb_exit_one(void) +static int __exit pmagbbfb_remove(struct device *dev) { - struct fb_info *info = root_pmagbbfb_dev; + struct tc_dev *tdev = to_tc_dev(dev); + struct fb_info *info = dev_get_drvdata(dev); struct pmagbbfb_par *par = info->par; + resource_size_t start, len; + put_device(dev); unregister_framebuffer(info); iounmap(par->smem); iounmap(par->mmio); + start = tdev->resource.start; + len = tdev->resource.end - start + 1; + release_mem_region(start, len); fb_dealloc_cmap(&info->cmap); - root_pmagbbfb_dev = par->next; - release_tc_card(par->slot); framebuffer_release(info); + return 0; } /* - * Initialise the framebuffer. + * Initialize the framebuffer. */ +static const struct tc_device_id pmagbbfb_tc_table[] = { + { "DEC ", "PMAGB-BA" }, + { } +}; +MODULE_DEVICE_TABLE(tc, pmagbbfb_tc_table); + +static struct tc_driver pmagbbfb_driver = { + .id_table = pmagbbfb_tc_table, + .driver = { + .name = "pmagbbfb", + .bus = &tc_bus_type, + .probe = pmagbbfb_probe, + .remove = __exit_p(pmagbbfb_remove), + }, +}; + static int __init pmagbbfb_init(void) { - int count = 0; - int slot; - +#ifndef MODULE if (fb_get_options("pmagbbfb", NULL)) return -ENXIO; - - while ((slot = search_tc_card("PMAGB-BA")) >= 0) { - if (pmagbbfb_init_one(slot) < 0) - break; - count++; - } - return (count > 0) ? 0 : -ENXIO; +#endif + return tc_register_driver(&pmagbbfb_driver); } static void __exit pmagbbfb_exit(void) { - while (root_pmagbbfb_dev) - pmagbbfb_exit_one(); + tc_unregister_driver(&pmagbbfb_driver); } diff --git a/drivers/video/ps3fb.c b/drivers/video/ps3fb.c new file mode 100644 index 00000000000..81e43cda7d8 --- /dev/null +++ b/drivers/video/ps3fb.c @@ -0,0 +1,1229 @@ +/* + * linux/drivers/video/ps3fb.c -- PS3 GPU frame buffer device + * + * Copyright (C) 2006 Sony Computer Entertainment Inc. + * Copyright 2006, 2007 Sony Corporation + * + * This file is based on : + * + * linux/drivers/video/vfb.c -- Virtual frame buffer device + * + * Copyright (C) 2002 James Simmons + * + * Copyright (C) 1997 Geert Uytterhoeven + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive for + * more details. + */ + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/string.h> +#include <linux/mm.h> +#include <linux/tty.h> +#include <linux/slab.h> +#include <linux/vmalloc.h> +#include <linux/delay.h> +#include <linux/interrupt.h> +#include <linux/platform_device.h> +#include <linux/console.h> +#include <linux/ioctl.h> +#include <linux/notifier.h> +#include <linux/reboot.h> + +#include <asm/uaccess.h> +#include <linux/fb.h> +#include <linux/init.h> +#include <asm/time.h> + +#include <asm/abs_addr.h> +#include <asm/lv1call.h> +#include <asm/ps3av.h> +#include <asm/ps3fb.h> +#include <asm/ps3.h> + +#ifdef PS3FB_DEBUG +#define DPRINTK(fmt, args...) printk("%s: " fmt, __FUNCTION__ , ##args) +#else +#define DPRINTK(fmt, args...) +#endif + +#define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC 0x101 +#define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP 0x102 +#define L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP 0x600 +#define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT 0x601 +#define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT_SYNC 0x602 + +#define L1GPU_FB_BLIT_WAIT_FOR_COMPLETION (1ULL << 32) + +#define L1GPU_DISPLAY_SYNC_HSYNC 1 +#define L1GPU_DISPLAY_SYNC_VSYNC 2 + +#define DDR_SIZE (0) /* used no ddr */ +#define GPU_OFFSET (64 * 1024) +#define GPU_IOIF (0x0d000000UL) + +#define PS3FB_FULL_MODE_BIT 0x80 + +#define GPU_INTR_STATUS_VSYNC_0 0 /* vsync on head A */ +#define GPU_INTR_STATUS_VSYNC_1 1 /* vsync on head B */ +#define GPU_INTR_STATUS_FLIP_0 3 /* flip head A */ +#define GPU_INTR_STATUS_FLIP_1 4 /* flip head B */ +#define GPU_INTR_STATUS_QUEUE_0 5 /* queue head A */ +#define GPU_INTR_STATUS_QUEUE_1 6 /* queue head B */ + +#define GPU_DRIVER_INFO_VERSION 0x211 + +/* gpu internals */ +struct display_head { + u64 be_time_stamp; + u32 status; + u32 offset; + u32 res1; + u32 res2; + u32 field; + u32 reserved1; + + u64 res3; + u32 raster; + + u64 vblank_count; + u32 field_vsync; + u32 reserved2; +}; + +struct gpu_irq { + u32 irq_outlet; + u32 status; + u32 mask; + u32 video_cause; + u32 graph_cause; + u32 user_cause; + + u32 res1; + u64 res2; + + u32 reserved[4]; +}; + +struct gpu_driver_info { + u32 version_driver; + u32 version_gpu; + u32 memory_size; + u32 hardware_channel; + + u32 nvcore_frequency; + u32 memory_frequency; + + u32 reserved[1063]; + struct display_head display_head[8]; + struct gpu_irq irq; +}; + +struct ps3fb_priv { + unsigned int irq_no; + void *dev; + + u64 context_handle, memory_handle; + void *xdr_ea; + struct gpu_driver_info *dinfo; + struct semaphore sem; + u32 res_index; + + u64 vblank_count; /* frame count */ + wait_queue_head_t wait_vsync; + + u32 num_frames; /* num of frame buffers */ + atomic_t ext_flip; /* on/off flip with vsync */ + atomic_t f_count; /* fb_open count */ + int is_blanked; +}; +static struct ps3fb_priv ps3fb; + +struct ps3fb_res_table { + u32 xres; + u32 yres; + u32 xoff; + u32 yoff; + u32 type; +}; +#define PS3FB_RES_FULL 1 +static const struct ps3fb_res_table ps3fb_res[] = { + /* res_x,y margin_x,y full */ + { 720, 480, 72, 48 , 0}, + { 720, 576, 72, 58 , 0}, + { 1280, 720, 78, 38 , 0}, + { 1920, 1080, 116, 58 , 0}, + /* full mode */ + { 720, 480, 0, 0 , PS3FB_RES_FULL}, + { 720, 576, 0, 0 , PS3FB_RES_FULL}, + { 1280, 720, 0, 0 , PS3FB_RES_FULL}, + { 1920, 1080, 0, 0 , PS3FB_RES_FULL}, + /* vesa: normally full mode */ + { 1280, 768, 0, 0 , 0}, + { 1280, 1024, 0, 0 , 0}, + { 1920, 1200, 0, 0 , 0}, + { 0, 0, 0, 0 , 0} }; + +/* default resolution */ +#define GPU_RES_INDEX 0 /* 720 x 480 */ + +static const struct fb_videomode ps3fb_modedb[] = { + /* 60 Hz broadcast modes (modes "1" to "5") */ + { + /* 480i */ + "480i", 60, 576, 384, 74074, 130, 89, 78, 57, 63, 6, + FB_SYNC_BROADCAST, FB_VMODE_INTERLACED + }, { + /* 480p */ + "480p", 60, 576, 384, 37037, 130, 89, 78, 57, 63, 6, + FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED + }, { + /* 720p */ + "720p", 60, 1124, 644, 13481, 298, 148, 57, 44, 80, 5, + FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED + }, { + /* 1080i */ + "1080i", 60, 1688, 964, 13481, 264, 160, 94, 62, 88, 5, + FB_SYNC_BROADCAST, FB_VMODE_INTERLACED + }, { + /* 1080p */ + "1080p", 60, 1688, 964, 6741, 264, 160, 94, 62, 88, 5, + FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED + }, + + /* 50 Hz broadcast modes (modes "6" to "10") */ + { + /* 576i */ + "576i", 50, 576, 460, 74074, 142, 83, 97, 63, 63, 5, + FB_SYNC_BROADCAST, FB_VMODE_INTERLACED + }, { + /* 576p */ + "576p", 50, 576, 460, 37037, 142, 83, 97, 63, 63, 5, + FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED + }, { + /* 720p */ + "720p", 50, 1124, 644, 13468, 298, 478, 57, 44, 80, 5, + FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED + }, { + /* 1080 */ + "1080i", 50, 1688, 964, 13468, 264, 600, 94, 62, 88, 5, + FB_SYNC_BROADCAST, FB_VMODE_INTERLACED + }, { + /* 1080p */ + "1080p", 50, 1688, 964, 6734, 264, 600, 94, 62, 88, 5, + FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED + }, + + /* VESA modes (modes "11" to "13") */ + { + /* WXGA */ + "wxga", 60, 1280, 768, 12924, 160, 24, 29, 3, 136, 6, + 0, FB_VMODE_NONINTERLACED, + FB_MODE_IS_VESA + }, { + /* SXGA */ + "sxga", 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3, + FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, + FB_MODE_IS_VESA + }, { + /* WUXGA */ + "wuxga", 60, 1920, 1200, 6494, 80, 48, 26, 3, 32, 6, + FB_SYNC_HOR_HIGH_ACT, FB_VMODE_NONINTERLACED, + FB_MODE_IS_VESA + }, + + /* 60 Hz broadcast modes (full resolution versions of modes "1" to "5") */ + { + /* 480if */ + "480if", 60, 720, 480, 74074, 58, 17, 30, 9, 63, 6, + FB_SYNC_BROADCAST, FB_VMODE_INTERLACED + }, { + /* 480pf */ + "480pf", 60, 720, 480, 37037, 58, 17, 30, 9, 63, 6, + FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED + }, { + /* 720pf */ + "720pf", 60, 1280, 720, 13481, 220, 70, 19, 6, 80, 5, + FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED + }, { + /* 1080if */ + "1080if", 60, 1920, 1080, 13481, 148, 44, 36, 4, 88, 5, + FB_SYNC_BROADCAST, FB_VMODE_INTERLACED + }, { + /* 1080pf */ + "1080pf", 60, 1920, 1080, 6741, 148, 44, 36, 4, 88, 5, + FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED + }, + + /* 50 Hz broadcast modes (full resolution versions of modes "6" to "10") */ + { + /* 576if */ + "576if", 50, 720, 576, 74074, 70, 11, 39, 5, 63, 5, + FB_SYNC_BROADCAST, FB_VMODE_INTERLACED + }, { + /* 576pf */ + "576pf", 50, 720, 576, 37037, 70, 11, 39, 5, 63, 5, + FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED + }, { + /* 720pf */ + "720pf", 50, 1280, 720, 13468, 220, 400, 19, 6, 80, 5, + FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED + }, { + /* 1080if */ + "1080f", 50, 1920, 1080, 13468, 148, 484, 36, 4, 88, 5, + FB_SYNC_BROADCAST, FB_VMODE_INTERLACED + }, { + /* 1080pf */ + "1080pf", 50, 1920, 1080, 6734, 148, 484, 36, 4, 88, 5, + FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED + } +}; + + +#define HEAD_A +#define HEAD_B + +#define X_OFF(i) (ps3fb_res[i].xoff) /* left/right margin (pixel) */ +#define Y_OFF(i) (ps3fb_res[i].yoff) /* top/bottom margin (pixel) */ +#define WIDTH(i) (ps3fb_res[i].xres) /* width of FB */ +#define HEIGHT(i) (ps3fb_res[i].yres) /* height of FB */ +#define BPP 4 /* number of bytes per pixel */ +#define VP_OFF(i) (WIDTH(i) * Y_OFF(i) * BPP + X_OFF(i) * BPP) +#define FB_OFF(i) (GPU_OFFSET - VP_OFF(i) % GPU_OFFSET) + +static int ps3fb_mode = 0; +module_param(ps3fb_mode, bool, 0); + +static char *mode_option __initdata = NULL; + + +static int ps3fb_get_res_table(u32 xres, u32 yres) +{ + int full_mode; + unsigned int i; + u32 x, y, f; + + full_mode = (ps3fb_mode & PS3FB_FULL_MODE_BIT) ? PS3FB_RES_FULL : 0; + for (i = 0;; i++) { + x = ps3fb_res[i].xres; + y = ps3fb_res[i].yres; + f = ps3fb_res[i].type; + + if (!x) { + DPRINTK("ERROR: ps3fb_get_res_table()\n"); + return -1; + } + + if (full_mode == PS3FB_RES_FULL && f != PS3FB_RES_FULL) + continue; + + if (x == xres && (yres == 0 || y == yres)) + break; + + x = x - 2 * ps3fb_res[i].xoff; + y = y - 2 * ps3fb_res[i].yoff; + if (x == xres && (yres == 0 || y == yres)) + break; + } + return i; +} + +static unsigned int ps3fb_find_mode(const struct fb_var_screeninfo *var, + u32 *line_length) +{ + unsigned int i, mode; + + for (i = 0; i < ARRAY_SIZE(ps3fb_modedb); i++) + if (var->xres == ps3fb_modedb[i].xres && + var->yres == ps3fb_modedb[i].yres && + var->pixclock == ps3fb_modedb[i].pixclock && + var->hsync_len == ps3fb_modedb[i].hsync_len && + var->vsync_len == ps3fb_modedb[i].vsync_len && + var->left_margin == ps3fb_modedb[i].left_margin && + var->right_margin == ps3fb_modedb[i].right_margin && + var->upper_margin == ps3fb_modedb[i].upper_margin && + var->lower_margin == ps3fb_modedb[i].lower_margin && + var->sync == ps3fb_modedb[i].sync && + (var->vmode & FB_VMODE_MASK) == ps3fb_modedb[i].vmode) { + /* Cropped broadcast modes use the full line_length */ + *line_length = + ps3fb_modedb[i < 10 ? i + 13 : i].xres * 4; + /* Full broadcast modes have the full mode bit set */ + mode = i > 12 ? (i - 12) | PS3FB_FULL_MODE_BIT : i + 1; + + DPRINTK("ps3fb_find_mode: mode %u\n", mode); + return mode; + } + + DPRINTK("ps3fb_find_mode: mode not found\n"); + return 0; + +} + +static const struct fb_videomode *ps3fb_default_mode(void) +{ + u32 mode = ps3fb_mode & PS3AV_MODE_MASK; + u32 flags; + + if (mode < 1 || mode > 13) + return NULL; + + flags = ps3fb_mode & ~PS3AV_MODE_MASK; + + if (mode <= 10 && flags & PS3FB_FULL_MODE_BIT) { + /* Full broadcast mode */ + return &ps3fb_modedb[mode + 12]; + } + + return &ps3fb_modedb[mode - 1]; +} + +static int ps3fb_sync(u32 frame) +{ + int i, status; + u32 xres, yres; + u64 fb_ioif, offset; + + i = ps3fb.res_index; + xres = ps3fb_res[i].xres; + yres = ps3fb_res[i].yres; + + if (frame > ps3fb.num_frames - 1) { + printk(KERN_WARNING "%s: invalid frame number (%u)\n", + __FUNCTION__, frame); + return -EINVAL; + } + offset = xres * yres * BPP * frame; + + fb_ioif = GPU_IOIF + FB_OFF(i) + offset; + status = lv1_gpu_context_attribute(ps3fb.context_handle, + L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT, + offset, fb_ioif, + L1GPU_FB_BLIT_WAIT_FOR_COMPLETION | + (xres << 16) | yres, + xres * BPP); /* line_length */ + if (status) + printk(KERN_ERR "%s: lv1_gpu_context_attribute FB_BLIT failed: %d\n", + __FUNCTION__, status); +#ifdef HEAD_A + status = lv1_gpu_context_attribute(ps3fb.context_handle, + L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP, + 0, offset, 0, 0); + if (status) + printk(KERN_ERR "%s: lv1_gpu_context_attribute FLIP failed: %d\n", + __FUNCTION__, status); +#endif +#ifdef HEAD_B + status = lv1_gpu_context_attribute(ps3fb.context_handle, + L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP, + 1, offset, 0, 0); + if (status) + printk(KERN_ERR "%s: lv1_gpu_context_attribute FLIP failed: %d\n", + __FUNCTION__, status); +#endif + return 0; +} + + +static int ps3fb_open(struct fb_info *info, int user) +{ + atomic_inc(&ps3fb.f_count); + return 0; +} + +static int ps3fb_release(struct fb_info *info, int user) +{ + if (atomic_dec_and_test(&ps3fb.f_count)) { + if (atomic_read(&ps3fb.ext_flip)) { + atomic_set(&ps3fb.ext_flip, 0); + ps3fb_sync(0); /* single buffer */ + } + } + return 0; +} + + /* + * Setting the video mode has been split into two parts. + * First part, xxxfb_check_var, must not write anything + * to hardware, it should only verify and adjust var. + * This means it doesn't alter par but it does use hardware + * data from it to check this var. + */ + +static int ps3fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) +{ + u32 line_length; + int mode; + int i; + + DPRINTK("var->xres:%u info->var.xres:%u\n", var->xres, info->var.xres); + DPRINTK("var->yres:%u info->var.yres:%u\n", var->yres, info->var.yres); + + /* FIXME For now we do exact matches only */ + mode = ps3fb_find_mode(var, &line_length); + if (!mode) + return -EINVAL; + + /* + * FB_VMODE_CONUPDATE and FB_VMODE_SMOOTH_XPAN are equal! + * as FB_VMODE_SMOOTH_XPAN is only used internally + */ + + if (var->vmode & FB_VMODE_CONUPDATE) { + var->vmode |= FB_VMODE_YWRAP; + var->xoffset = info->var.xoffset; + var->yoffset = info->var.yoffset; + } + + /* Virtual screen and panning are not supported */ + if (var->xres_virtual > var->xres || var->yres_virtual > var->yres || + var->xoffset || var->yoffset) { + DPRINTK("Virtual screen and panning are not supported\n"); + return -EINVAL; + } + + var->xres_virtual = var->xres; + var->yres_virtual = var->yres; + + /* We support ARGB8888 only */ + if (var->bits_per_pixel > 32 || var->grayscale || + var->red.offset > 16 || var->green.offset > 8 || + var->blue.offset > 0 || var->transp.offset > 24 || + var->red.length > 8 || var->green.length > 8 || + var->blue.length > 8 || var->transp.length > 8 || + var->red.msb_right || var->green.msb_right || + var->blue.msb_right || var->transp.msb_right || var->nonstd) { + DPRINTK("We support ARGB8888 only\n"); + return -EINVAL; + } + + var->bits_per_pixel = 32; + var->red.offset = 16; + var->green.offset = 8; + var->blue.offset = 0; + var->transp.offset = 24; + var->red.length = 8; + var->green.length = 8; + var->blue.length = 8; + var->transp.length = 8; + var->red.msb_right = 0; + var->green.msb_right = 0; + var->blue.msb_right = 0; + var->transp.msb_right = 0; + + /* Rotation is not supported */ + if (var->rotate) { + DPRINTK("Rotation is not supported\n"); + return -EINVAL; + } + + /* Memory limit */ + i = ps3fb_get_res_table(var->xres, var->yres); + if (ps3fb_res[i].xres*ps3fb_res[i].yres*BPP > ps3fb_videomemory.size) { + DPRINTK("Not enough memory\n"); + return -ENOMEM; + } + + var->height = -1; + var->width = -1; + + return 0; +} + + /* + * This routine actually sets the video mode. + */ + +static int ps3fb_set_par(struct fb_info *info) +{ + unsigned int mode; + int i; + unsigned long offset; + static int first = 1; + + DPRINTK("xres:%d xv:%d yres:%d yv:%d clock:%d\n", + info->var.xres, info->var.xres_virtual, + info->var.yres, info->var.yres_virtual, info->var.pixclock); + i = ps3fb_get_res_table(info->var.xres, info->var.yres); + ps3fb.res_index = i; + + mode = ps3fb_find_mode(&info->var, &info->fix.line_length); + if (!mode) + return -EINVAL; + + offset = FB_OFF(i) + VP_OFF(i); + info->fix.smem_len = ps3fb_videomemory.size - offset; + info->screen_base = (char __iomem *)ps3fb.xdr_ea + offset; + memset(ps3fb.xdr_ea, 0, ps3fb_videomemory.size); + + ps3fb.num_frames = ps3fb_videomemory.size/ + (ps3fb_res[i].xres*ps3fb_res[i].yres*BPP); + + /* Keep the special bits we cannot set using fb_var_screeninfo */ + ps3fb_mode = (ps3fb_mode & ~PS3AV_MODE_MASK) | mode; + + if (ps3av_set_video_mode(ps3fb_mode, first)) + return -EINVAL; + + first = 0; + return 0; +} + + /* + * Set a single color register. The values supplied are already + * rounded down to the hardware's capabilities (according to the + * entries in the var structure). Return != 0 for invalid regno. + */ + +static int ps3fb_setcolreg(unsigned int regno, unsigned int red, + unsigned int green, unsigned int blue, + unsigned int transp, struct fb_info *info) +{ + if (regno >= 16) + return 1; + + red >>= 8; + green >>= 8; + blue >>= 8; + transp >>= 8; + + ((u32 *)info->pseudo_palette)[regno] = transp << 24 | red << 16 | + green << 8 | blue; + return 0; +} + + /* + * As we have a virtual frame buffer, we need our own mmap function + */ + +static int ps3fb_mmap(struct fb_info *info, struct vm_area_struct *vma) +{ + unsigned long size, offset; + int i; + + i = ps3fb_get_res_table(info->var.xres, info->var.yres); + if (i == -1) + return -EINVAL; + + size = vma->vm_end - vma->vm_start; + offset = vma->vm_pgoff << PAGE_SHIFT; + if (offset + size > info->fix.smem_len) + return -EINVAL; + + offset += info->fix.smem_start + FB_OFF(i) + VP_OFF(i); + if (remap_pfn_range(vma, vma->vm_start, offset >> PAGE_SHIFT, + size, vma->vm_page_prot)) + return -EAGAIN; + + printk(KERN_DEBUG "ps3fb: mmap framebuffer P(%lx)->V(%lx)\n", offset, + vma->vm_start); + return 0; +} + + /* + * Blank the display + */ + +static int ps3fb_blank(int blank, struct fb_info *info) +{ + int retval; + + DPRINTK("%s: blank:%d\n", __FUNCTION__, blank); + switch (blank) { + case FB_BLANK_POWERDOWN: + case FB_BLANK_HSYNC_SUSPEND: + case FB_BLANK_VSYNC_SUSPEND: + case FB_BLANK_NORMAL: + retval = ps3av_video_mute(1); /* mute on */ + if (!retval) + ps3fb.is_blanked = 1; + break; + + default: /* unblank */ + retval = ps3av_video_mute(0); /* mute off */ + if (!retval) + ps3fb.is_blanked = 0; + break; + } + return retval; +} + +static int ps3fb_get_vblank(struct fb_vblank *vblank) +{ + memset(vblank, 0, sizeof(&vblank)); + vblank->flags = FB_VBLANK_HAVE_VSYNC; + return 0; +} + +int ps3fb_wait_for_vsync(u32 crtc) +{ + int ret; + u64 count; + + count = ps3fb.vblank_count; + ret = wait_event_interruptible_timeout(ps3fb.wait_vsync, + count != ps3fb.vblank_count, + HZ / 10); + if (!ret) + return -ETIMEDOUT; + + return 0; +} + +EXPORT_SYMBOL_GPL(ps3fb_wait_for_vsync); + +void ps3fb_flip_ctl(int on) +{ + if (on) { + if (atomic_read(&ps3fb.ext_flip) > 0) { + atomic_dec(&ps3fb.ext_flip); + } + } else { + atomic_inc(&ps3fb.ext_flip); + } +} + +EXPORT_SYMBOL_GPL(ps3fb_flip_ctl); + + /* + * ioctl + */ + +static int ps3fb_ioctl(struct fb_info *info, unsigned int cmd, + unsigned long arg) +{ + void __user *argp = (void __user *)arg; + u32 val, old_mode; + int retval = -EFAULT; + + switch (cmd) { + case FBIOGET_VBLANK: + { + struct fb_vblank vblank; + DPRINTK("FBIOGET_VBLANK:\n"); + retval = ps3fb_get_vblank(&vblank); + if (retval) + break; + + if (copy_to_user(argp, &vblank, sizeof(vblank))) + retval = -EFAULT; + break; + } + + case FBIO_WAITFORVSYNC: + { + u32 crt; + DPRINTK("FBIO_WAITFORVSYNC:\n"); + if (get_user(crt, (u32 __user *) arg)) + break; + + retval = ps3fb_wait_for_vsync(crt); + break; + } + + case PS3FB_IOCTL_SETMODE: + { + const struct fb_videomode *mode; + struct fb_var_screeninfo var; + + if (copy_from_user(&val, argp, sizeof(val))) + break; + + DPRINTK("PS3FB_IOCTL_SETMODE:%x\n", val); + retval = -EINVAL; + old_mode = ps3fb_mode; + ps3fb_mode = val; + mode = ps3fb_default_mode(); + if (mode) { + var = info->var; + fb_videomode_to_var(&var, mode); + acquire_console_sem(); + info->flags |= FBINFO_MISC_USEREVENT; + /* Force, in case only special bits changed */ + var.activate |= FB_ACTIVATE_FORCE; + retval = fb_set_var(info, &var); + info->flags &= ~FBINFO_MISC_USEREVENT; + release_console_sem(); + } + if (retval) + ps3fb_mode = old_mode; + break; + } + + case PS3FB_IOCTL_GETMODE: + val = ps3av_get_mode(); + DPRINTK("PS3FB_IOCTL_GETMODE:%x\n", val); + if (!copy_to_user(argp, &val, sizeof(val))) + retval = 0; + break; + + case PS3FB_IOCTL_SCREENINFO: + { + struct ps3fb_ioctl_res res; + int i = ps3fb.res_index; + DPRINTK("PS3FB_IOCTL_SCREENINFO:\n"); + res.xres = ps3fb_res[i].xres; + res.yres = ps3fb_res[i].yres; + res.xoff = ps3fb_res[i].xoff; + res.yoff = ps3fb_res[i].yoff; + res.num_frames = ps3fb.num_frames; + if (!copy_to_user(argp, &res, sizeof(res))) + retval = 0; + break; + } + + case PS3FB_IOCTL_ON: + DPRINTK("PS3FB_IOCTL_ON:\n"); + atomic_inc(&ps3fb.ext_flip); + retval = 0; + break; + + case PS3FB_IOCTL_OFF: + DPRINTK("PS3FB_IOCTL_OFF:\n"); + if (atomic_read(&ps3fb.ext_flip) > 0) + atomic_dec(&ps3fb.ext_flip); + retval = 0; + break; + + case PS3FB_IOCTL_FSEL: + if (copy_from_user(&val, argp, sizeof(val))) + break; + + DPRINTK("PS3FB_IOCTL_FSEL:%d\n", val); + retval = ps3fb_sync(val); + break; + + default: + retval = -ENOIOCTLCMD; + break; + } + return retval; +} + +static int ps3fbd(void *arg) +{ + daemonize("ps3fbd"); + for (;;) { + down(&ps3fb.sem); + if (atomic_read(&ps3fb.ext_flip) == 0) + ps3fb_sync(0); /* single buffer */ + } + return 0; +} + +static irqreturn_t ps3fb_vsync_interrupt(int irq, void *ptr) +{ + u64 v1; + int status; + struct display_head *head = &ps3fb.dinfo->display_head[1]; + + status = lv1_gpu_context_intr(ps3fb.context_handle, &v1); + if (status) { + printk(KERN_ERR "%s: lv1_gpu_context_intr failed: %d\n", + __FUNCTION__, status); + return IRQ_NONE; + } + + if (v1 & (1 << GPU_INTR_STATUS_VSYNC_1)) { + /* VSYNC */ + ps3fb.vblank_count = head->vblank_count; + if (!ps3fb.is_blanked) + up(&ps3fb.sem); + wake_up_interruptible(&ps3fb.wait_vsync); + } + + return IRQ_HANDLED; +} + +#ifndef MODULE +static int __init ps3fb_setup(char *options) +{ + char *this_opt; + int mode = 0; + + if (!options || !*options) + return 0; /* no options */ + + while ((this_opt = strsep(&options, ",")) != NULL) { + if (!*this_opt) + continue; + if (!strncmp(this_opt, "mode:", 5)) + mode = simple_strtoul(this_opt + 5, NULL, 0); + else + mode_option = this_opt; + } + return mode; +} +#endif /* MODULE */ + + /* + * Initialisation + */ + +static void ps3fb_platform_release(struct device *device) +{ + /* This is called when the reference count goes to zero. */ +} + +static int ps3fb_vsync_settings(struct gpu_driver_info *dinfo, void *dev) +{ + int error; + + DPRINTK("version_driver:%x\n", dinfo->version_driver); + DPRINTK("irq outlet:%x\n", dinfo->irq.irq_outlet); + DPRINTK("version_gpu:%x memory_size:%x ch:%x core_freq:%d mem_freq:%d\n", + dinfo->version_gpu, dinfo->memory_size, dinfo->hardware_channel, + dinfo->nvcore_frequency/1000000, dinfo->memory_frequency/1000000); + + if (dinfo->version_driver != GPU_DRIVER_INFO_VERSION) { + printk(KERN_ERR "%s: version_driver err:%x\n", __FUNCTION__, + dinfo->version_driver); + return -EINVAL; + } + + ps3fb.dev = dev; + error = ps3_alloc_irq(PS3_BINDING_CPU_ANY, dinfo->irq.irq_outlet, + &ps3fb.irq_no); + if (error) { + printk(KERN_ERR "%s: ps3_alloc_irq failed %d\n", __FUNCTION__, + error); + return error; + } + + error = request_irq(ps3fb.irq_no, ps3fb_vsync_interrupt, IRQF_DISABLED, + "ps3fb vsync", ps3fb.dev); + if (error) { + printk(KERN_ERR "%s: request_irq failed %d\n", __FUNCTION__, + error); + ps3_free_irq(ps3fb.irq_no); + return error; + } + + dinfo->irq.mask = (1 << GPU_INTR_STATUS_VSYNC_1) | + (1 << GPU_INTR_STATUS_FLIP_1); + return 0; +} + +static int ps3fb_xdr_settings(u64 xdr_lpar) +{ + int status; + + status = lv1_gpu_context_iomap(ps3fb.context_handle, GPU_IOIF, + xdr_lpar, ps3fb_videomemory.size, 0); + if (status) { + printk(KERN_ERR "%s: lv1_gpu_context_iomap failed: %d\n", + __FUNCTION__, status); + return -ENXIO; + } + DPRINTK("video:%p xdr_ea:%p ioif:%lx lpar:%lx phys:%lx size:%lx\n", + ps3fb_videomemory.address, ps3fb.xdr_ea, GPU_IOIF, xdr_lpar, + virt_to_abs(ps3fb.xdr_ea), ps3fb_videomemory.size); + + status = lv1_gpu_context_attribute(ps3fb.context_handle, + L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP, + xdr_lpar, ps3fb_videomemory.size, + GPU_IOIF, 0); + if (status) { + printk(KERN_ERR "%s: lv1_gpu_context_attribute FB_SETUP failed: %d\n", + __FUNCTION__, status); + return -ENXIO; + } + return 0; +} + +static struct fb_ops ps3fb_ops = { + .fb_open = ps3fb_open, + .fb_release = ps3fb_release, + .fb_check_var = ps3fb_check_var, + .fb_set_par = ps3fb_set_par, + .fb_setcolreg = ps3fb_setcolreg, + .fb_fillrect = cfb_fillrect, + .fb_copyarea = cfb_copyarea, + .fb_imageblit = cfb_imageblit, + .fb_mmap = ps3fb_mmap, + .fb_blank = ps3fb_blank, + .fb_ioctl = ps3fb_ioctl, + .fb_compat_ioctl = ps3fb_ioctl +}; + +static struct fb_fix_screeninfo ps3fb_fix __initdata = { + .id = "PS3 FB", + .type = FB_TYPE_PACKED_PIXELS, + .visual = FB_VISUAL_TRUECOLOR, + .accel = FB_ACCEL_NONE, +}; + +static int __init ps3fb_probe(struct platform_device *dev) +{ + struct fb_info *info; + int retval = -ENOMEM; + u64 ddr_lpar = 0; + u64 lpar_dma_control = 0; + u64 lpar_driver_info = 0; + u64 lpar_reports = 0; + u64 lpar_reports_size = 0; + u64 xdr_lpar; + int status; + unsigned long offset; + + /* get gpu context handle */ + status = lv1_gpu_memory_allocate(DDR_SIZE, 0, 0, 0, 0, + &ps3fb.memory_handle, &ddr_lpar); + if (status) { + printk(KERN_ERR "%s: lv1_gpu_memory_allocate failed: %d\n", + __FUNCTION__, status); + goto err; + } + DPRINTK("ddr:lpar:0x%lx\n", ddr_lpar); + + status = lv1_gpu_context_allocate(ps3fb.memory_handle, 0, + &ps3fb.context_handle, + &lpar_dma_control, &lpar_driver_info, + &lpar_reports, &lpar_reports_size); + if (status) { + printk(KERN_ERR "%s: lv1_gpu_context_attribute failed: %d\n", + __FUNCTION__, status); + goto err_gpu_memory_free; + } + + /* vsync interrupt */ + ps3fb.dinfo = ioremap(lpar_driver_info, 128 * 1024); + if (!ps3fb.dinfo) { + printk(KERN_ERR "%s: ioremap failed\n", __FUNCTION__); + goto err_gpu_context_free; + } + + retval = ps3fb_vsync_settings(ps3fb.dinfo, dev); + if (retval) + goto err_iounmap_dinfo; + + /* xdr frame buffer */ + ps3fb.xdr_ea = ps3fb_videomemory.address; + xdr_lpar = ps3_mm_phys_to_lpar(__pa(ps3fb.xdr_ea)); + retval = ps3fb_xdr_settings(xdr_lpar); + if (retval) + goto err_free_irq; + + /* + * ps3fb must clear memory to prevent kernel info + * leakage into userspace + */ + memset(ps3fb.xdr_ea, 0, ps3fb_videomemory.size); + info = framebuffer_alloc(sizeof(u32) * 16, &dev->dev); + if (!info) + goto err_free_irq; + + offset = FB_OFF(ps3fb.res_index) + VP_OFF(ps3fb.res_index); + info->screen_base = (char __iomem *)ps3fb.xdr_ea + offset; + info->fbops = &ps3fb_ops; + + info->fix = ps3fb_fix; + info->fix.smem_start = virt_to_abs(ps3fb.xdr_ea); + info->fix.smem_len = ps3fb_videomemory.size - offset; + info->pseudo_palette = info->par; + info->par = NULL; + info->flags = FBINFO_FLAG_DEFAULT; + + retval = fb_alloc_cmap(&info->cmap, 256, 0); + if (retval < 0) + goto err_framebuffer_release; + + if (!fb_find_mode(&info->var, info, mode_option, ps3fb_modedb, + ARRAY_SIZE(ps3fb_modedb), ps3fb_default_mode(), 32)) { + retval = -EINVAL; + goto err_fb_dealloc; + } + + fb_videomode_to_modelist(ps3fb_modedb, ARRAY_SIZE(ps3fb_modedb), + &info->modelist); + + retval = register_framebuffer(info); + if (retval < 0) + goto err_fb_dealloc; + + platform_set_drvdata(dev, info); + + printk(KERN_INFO + "fb%d: PS3 frame buffer device, using %ld KiB of video memory\n", + info->node, ps3fb_videomemory.size >> 10); + + kernel_thread(ps3fbd, info, CLONE_KERNEL); + return 0; + +err_fb_dealloc: + fb_dealloc_cmap(&info->cmap); +err_framebuffer_release: + framebuffer_release(info); +err_free_irq: + free_irq(ps3fb.irq_no, ps3fb.dev); + ps3_free_irq(ps3fb.irq_no); +err_iounmap_dinfo: + iounmap((u8 __iomem *)ps3fb.dinfo); +err_gpu_context_free: + lv1_gpu_context_free(ps3fb.context_handle); +err_gpu_memory_free: + lv1_gpu_memory_free(ps3fb.memory_handle); +err: + return retval; +} + +static void ps3fb_shutdown(struct platform_device *dev) +{ + ps3fb_flip_ctl(0); /* flip off */ + ps3fb.dinfo->irq.mask = 0; + free_irq(ps3fb.irq_no, ps3fb.dev); + ps3_free_irq(ps3fb.irq_no); + iounmap((u8 __iomem *)ps3fb.dinfo); +} + +void ps3fb_cleanup(void) +{ + int status; + + if (ps3fb.irq_no) { + free_irq(ps3fb.irq_no, ps3fb.dev); + ps3_free_irq(ps3fb.irq_no); + } + iounmap((u8 __iomem *)ps3fb.dinfo); + + status = lv1_gpu_context_free(ps3fb.context_handle); + if (status) + DPRINTK("lv1_gpu_context_free failed: %d\n", status); + + status = lv1_gpu_memory_free(ps3fb.memory_handle); + if (status) + DPRINTK("lv1_gpu_memory_free failed: %d\n", status); + + ps3av_dev_close(); +} + +EXPORT_SYMBOL_GPL(ps3fb_cleanup); + +static int ps3fb_remove(struct platform_device *dev) +{ + struct fb_info *info = platform_get_drvdata(dev); + + if (info) { + unregister_framebuffer(info); + fb_dealloc_cmap(&info->cmap); + framebuffer_release(info); + } + ps3fb_cleanup(); + return 0; +} + +static struct platform_driver ps3fb_driver = { + .probe = ps3fb_probe, + .remove = ps3fb_remove, + .shutdown = ps3fb_shutdown, + .driver = { .name = "ps3fb" } +}; + +static struct platform_device ps3fb_device = { + .name = "ps3fb", + .id = 0, + .dev = { .release = ps3fb_platform_release } +}; + +int ps3fb_set_sync(void) +{ + int status; + +#ifdef HEAD_A + status = lv1_gpu_context_attribute(0x0, + L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC, + 0, L1GPU_DISPLAY_SYNC_VSYNC, 0, 0); + if (status) { + printk(KERN_ERR "%s: lv1_gpu_context_attribute DISPLAY_SYNC failed: %d\n", + __FUNCTION__, status); + return -1; + } +#endif +#ifdef HEAD_B + status = lv1_gpu_context_attribute(0x0, + L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC, + 1, L1GPU_DISPLAY_SYNC_VSYNC, 0, 0); + + if (status) { + printk(KERN_ERR "%s: lv1_gpu_context_attribute DISPLAY_MODE failed: %d\n", + __FUNCTION__, status); + return -1; + } +#endif + return 0; +} + +EXPORT_SYMBOL_GPL(ps3fb_set_sync); + +static int __init ps3fb_init(void) +{ + int error; +#ifndef MODULE + int mode; + char *option = NULL; + + if (fb_get_options("ps3fb", &option)) + goto err; +#endif + + if (!ps3fb_videomemory.address) + goto err; + + error = ps3av_dev_open(); + if (error) { + printk(KERN_ERR "%s: ps3av_dev_open failed\n", __FUNCTION__); + goto err; + } + + ps3fb_mode = ps3av_get_mode(); + DPRINTK("ps3av_mode:%d\n", ps3fb_mode); +#ifndef MODULE + mode = ps3fb_setup(option); /* check boot option */ + if (mode) + ps3fb_mode = mode; +#endif + if (ps3fb_mode > 0) { + u32 xres, yres; + ps3av_video_mode2res(ps3fb_mode, &xres, &yres); + ps3fb.res_index = ps3fb_get_res_table(xres, yres); + DPRINTK("res_index:%d\n", ps3fb.res_index); + } else + ps3fb.res_index = GPU_RES_INDEX; + + atomic_set(&ps3fb.f_count, -1); /* fbcon opens ps3fb */ + atomic_set(&ps3fb.ext_flip, 0); /* for flip with vsync */ + init_MUTEX(&ps3fb.sem); + init_waitqueue_head(&ps3fb.wait_vsync); + ps3fb.num_frames = 1; + + error = platform_driver_register(&ps3fb_driver); + if (!error) { + error = platform_device_register(&ps3fb_device); + if (error) + platform_driver_unregister(&ps3fb_driver); + } + + ps3fb_set_sync(); + + return error; + +err: + return -ENXIO; +} + +module_init(ps3fb_init); + +#ifdef MODULE +static void __exit ps3fb_exit(void) +{ + platform_device_unregister(&ps3fb_device); + platform_driver_unregister(&ps3fb_driver); +} + +module_exit(ps3fb_exit); + +MODULE_LICENSE("GPL"); +#endif /* MODULE */ diff --git a/drivers/video/retz3fb.c b/drivers/video/retz3fb.c deleted file mode 100644 index bc7ffc84e18..00000000000 --- a/drivers/video/retz3fb.c +++ /dev/null @@ -1,1588 +0,0 @@ -/* - * Linux/drivers/video/retz3fb.c -- RetinaZ3 frame buffer device - * - * Copyright (C) 1997 Jes Sorensen - * - * This file is based on the CyberVision64 frame buffer device and - * the generic Cirrus Logic driver. - * - * cyberfb.c: Copyright (C) 1996 Martin Apel, - * Geert Uytterhoeven - * clgen.c: Copyright (C) 1996 Frank Neumann - * - * History: - * - 22 Jan 97: Initial work - * - 14 Feb 97: Screen initialization works somewhat, still only - * 8-bit packed pixel is supported. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive - * for more details. - */ - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/string.h> -#include <linux/mm.h> -#include <linux/slab.h> -#include <linux/delay.h> -#include <linux/fb.h> -#include <linux/zorro.h> -#include <linux/init.h> - -#include <asm/uaccess.h> -#include <asm/system.h> -#include <asm/irq.h> -#include <asm/pgtable.h> -#include <asm/io.h> - -#include <video/fbcon.h> -#include <video/fbcon-cfb8.h> -#include <video/fbcon-cfb16.h> - -#include "retz3fb.h" - -/* #define DEBUG if(1) */ -#define DEBUG if(0) - -/* - * Reserve space for one pattern line. - * - * For the time being we only support 4MB boards! - */ - -#define PAT_MEM_SIZE 16*3 -#define PAT_MEM_OFF (4*1024*1024 - PAT_MEM_SIZE) - -struct retz3fb_par { - int xres; - int yres; - int xres_vir; - int yres_vir; - int xoffset; - int yoffset; - int bpp; - - struct fb_bitfield red; - struct fb_bitfield green; - struct fb_bitfield blue; - struct fb_bitfield transp; - - int pixclock; - int left_margin; /* time from sync to picture */ - int right_margin; /* time from picture to sync */ - int upper_margin; /* time from sync to picture */ - int lower_margin; - int hsync_len; /* length of horizontal sync */ - int vsync_len; /* length of vertical sync */ - int vmode; - - int accel; -}; - -struct display_data { - long h_total; /* Horizontal Total */ - long h_sstart; /* Horizontal Sync Start */ - long h_sstop; /* Horizontal Sync Stop */ - long h_bstart; /* Horizontal Blank Start */ - long h_bstop; /* Horizontal Blank Stop */ - long h_dispend; /* Horizontal Display End */ - long v_total; /* Vertical Total */ - long v_sstart; /* Vertical Sync Start */ - long v_sstop; /* Vertical Sync Stop */ - long v_bstart; /* Vertical Blank Start */ - long v_bstop; /* Vertical Blank Stop */ - long v_dispend; /* Horizontal Display End */ -}; - -struct retz3_fb_info { - struct fb_info info; - unsigned char *base; - unsigned char *fbmem; - unsigned long fbsize; - volatile unsigned char *regs; - unsigned long physfbmem; - unsigned long physregs; - int current_par_valid; /* set to 0 by memset */ - int blitbusy; - struct display disp; - struct retz3fb_par current_par; - unsigned char color_table [256][3]; -}; - - -static char fontname[40] __initdata = { 0 }; - -#define retz3info(info) ((struct retz3_fb_info *)(info)) -#define fbinfo(info) ((struct fb_info *)(info)) - - -/* - * Frame Buffer Name - */ - -static char retz3fb_name[16] = "RetinaZ3"; - - -/* - * A small info on how to convert XFree86 timing values into fb - * timings - by Frank Neumann: - * -An XFree86 mode line consists of the following fields: - "800x600" 50 800 856 976 1040 600 637 643 666 - < name > DCF HR SH1 SH2 HFL VR SV1 SV2 VFL - -The fields in the fb_var_screeninfo structure are: - unsigned long pixclock; * pixel clock in ps (pico seconds) * - unsigned long left_margin; * time from sync to picture * - unsigned long right_margin; * time from picture to sync * - unsigned long upper_margin; * time from sync to picture * - unsigned long lower_margin; - unsigned long hsync_len; * length of horizontal sync * - unsigned long vsync_len; * length of vertical sync * - -1) Pixelclock: - xfree: in MHz - fb: In Picoseconds (ps) - - pixclock = 1000000 / DCF - -2) horizontal timings: - left_margin = HFL - SH2 - right_margin = SH1 - HR - hsync_len = SH2 - SH1 - -3) vertical timings: - upper_margin = VFL - SV2 - lower_margin = SV1 - VR - vsync_len = SV2 - SV1 - -Good examples for VESA timings can be found in the XFree86 source tree, -under "programs/Xserver/hw/xfree86/doc/modeDB.txt". -*/ - -/* - * Predefined Video Modes - */ - -static struct { - const char *name; - struct fb_var_screeninfo var; -} retz3fb_predefined[] __initdata = { - /* - * NB: it is very important to adjust the pixel-clock to the color-depth. - */ - - { - "640x480", { /* 640x480, 8 bpp */ - 640, 480, 640, 480, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCEL_NONE, 39722, 48, 16, 33, 10, 96, 2, - FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,FB_VMODE_NONINTERLACED - } - }, - /* - ModeLine "800x600" 36 800 824 896 1024 600 601 603 625 - < name > DCF HR SH1 SH2 HFL VR SV1 SV2 VFL - */ - { - "800x600", { /* 800x600, 8 bpp */ - 800, 600, 800, 600, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 27778, 64, 24, 22, 1, 120, 2, - FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - } - }, - { - "800x600-60", { /* 800x600, 8 bpp */ - 800, 600, 800, 600, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 25000, 88, 40, 23, 1, 128, 4, - FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - } - }, - { - "800x600-70", { /* 800x600, 8 bpp */ - 800, 600, 800, 600, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 22272, 40, 24, 15, 9, 144, 12, - FB_SYNC_COMP_HIGH_ACT, FB_VMODE_NONINTERLACED - } - }, - /* - ModeLine "1024x768i" 45 1024 1064 1224 1264 768 777 785 817 interlace - < name > DCF HR SH1 SH2 HFL VR SV1 SV2 VFL - */ - { - "1024x768i", { /* 1024x768, 8 bpp, interlaced */ - 1024, 768, 1024, 768, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 22222, 40, 40, 32, 9, 160, 8, - FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_INTERLACED - } - }, - { - "1024x768", { - 1024, 768, 1024, 768, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCEL_NONE, 12500, 92, 112, 31, 2, 204, 4, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - } - }, - { - "640x480-16", { /* 640x480, 16 bpp */ - 640, 480, 640, 480, 0, 0, 16, 0, - {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, - 0, 0, -1, -1, 0, 38461/2, 28, 32, 12, 10, 96, 2, - FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,FB_VMODE_NONINTERLACED - } - }, - { - "640x480-24", { /* 640x480, 24 bpp */ - 640, 480, 640, 480, 0, 0, 24, 0, - {8, 8, 8}, {8, 8, 8}, {8, 8, 8}, {0, 0, 0}, - 0, 0, -1, -1, 0, 38461/3, 28, 32, 12, 10, 96, 2, - FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,FB_VMODE_NONINTERLACED - } - }, -}; - - -#define NUM_TOTAL_MODES ARRAY_SIZE(retz3fb_predefined) - -static struct fb_var_screeninfo retz3fb_default; - -static int z3fb_inverse = 0; -static int z3fb_mode __initdata = 0; - - -/* - * Interface used by the world - */ - -int retz3fb_setup(char *options); - -static int retz3fb_get_fix(struct fb_fix_screeninfo *fix, int con, - struct fb_info *info); -static int retz3fb_get_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info); -static int retz3fb_set_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info); -static int retz3fb_get_cmap(struct fb_cmap *cmap, int kspc, int con, - struct fb_info *info); -static int retz3fb_setcolreg(unsigned int regno, unsigned int red, - unsigned int green, unsigned int blue, - unsigned int transp, struct fb_info *info); -static int retz3fb_blank(int blank, struct fb_info *info); - - -/* - * Interface to the low level console driver - */ - -int retz3fb_init(void); -static int z3fb_switch(int con, struct fb_info *info); -static int z3fb_updatevar(int con, struct fb_info *info); - - -/* - * Text console acceleration - */ - -#ifdef FBCON_HAS_CFB8 -static struct display_switch fbcon_retz3_8; -#endif - - -/* - * Accelerated Functions used by the low level console driver - */ - -static void retz3_bitblt(struct display *p, - unsigned short curx, unsigned short cury, unsigned - short destx, unsigned short desty, unsigned short - width, unsigned short height, unsigned short cmd, - unsigned short mask); - -/* - * Hardware Specific Routines - */ - -static int retz3_encode_fix(struct fb_info *info, - struct fb_fix_screeninfo *fix, - struct retz3fb_par *par); -static int retz3_decode_var(struct fb_var_screeninfo *var, - struct retz3fb_par *par); -static int retz3_encode_var(struct fb_var_screeninfo *var, - struct retz3fb_par *par); -static int retz3_getcolreg(unsigned int regno, unsigned int *red, - unsigned int *green, unsigned int *blue, - unsigned int *transp, struct fb_info *info); - -/* - * Internal routines - */ - -static void retz3fb_get_par(struct fb_info *info, struct retz3fb_par *par); -static void retz3fb_set_par(struct fb_info *info, struct retz3fb_par *par); -static int do_fb_set_var(struct fb_info *info, - struct fb_var_screeninfo *var, int isactive); -static void retz3fb_set_disp(int con, struct fb_info *info); -static int get_video_mode(const char *name); - - -/* -------------------- Hardware specific routines ------------------------- */ - -static unsigned short find_fq(unsigned int freq) -{ - unsigned long f; - long tmp; - long prev = 0x7fffffff; - long n2, n1 = 3; - unsigned long m; - unsigned short res = 0; - - if (freq <= 31250000) - n2 = 3; - else if (freq <= 62500000) - n2 = 2; - else if (freq <= 125000000) - n2 = 1; - else if (freq <= 250000000) - n2 = 0; - else - return 0; - - - do { - f = freq >> (10 - n2); - - m = (f * n1) / (14318180/1024); - - if (m > 129) - break; - - tmp = (((m * 14318180) >> n2) / n1) - freq; - if (tmp < 0) - tmp = -tmp; - - if (tmp < prev) { - prev = tmp; - res = (((n2 << 5) | (n1-2)) << 8) | (m-2); - } - - } while ( (++n1) <= 21); - - return res; -} - - -static int retz3_set_video(struct fb_info *info, - struct fb_var_screeninfo *var, - struct retz3fb_par *par) -{ - volatile unsigned char *regs = retz3info(info)->regs; - unsigned int freq; - - int xres, hfront, hsync, hback; - int yres, vfront, vsync, vback; - unsigned char tmp; - unsigned short best_freq; - struct display_data data; - - short clocksel = 0; /* Apparantly this is always zero */ - - int bpp = var->bits_per_pixel; - - /* - * XXX - */ - if (bpp == 24) - return 0; - - if ((bpp != 8) && (bpp != 16) && (bpp != 24)) - return -EFAULT; - - par->xoffset = 0; - par->yoffset = 0; - - xres = var->xres * bpp / 4; - hfront = var->right_margin * bpp / 4; - hsync = var->hsync_len * bpp / 4; - hback = var->left_margin * bpp / 4; - - if (var->vmode & FB_VMODE_DOUBLE) - { - yres = var->yres * 2; - vfront = var->lower_margin * 2; - vsync = var->vsync_len * 2; - vback = var->upper_margin * 2; - } - else if (var->vmode & FB_VMODE_INTERLACED) - { - yres = (var->yres + 1) / 2; - vfront = (var->lower_margin + 1) / 2; - vsync = (var->vsync_len + 1) / 2; - vback = (var->upper_margin + 1) / 2; - } - else - { - yres = var->yres; /* -1 ? */ - vfront = var->lower_margin; - vsync = var->vsync_len; - vback = var->upper_margin; - } - - data.h_total = (hback / 8) + (xres / 8) - + (hfront / 8) + (hsync / 8) - 1 /* + 1 */; - data.h_dispend = ((xres + bpp - 1)/ 8) - 1; - data.h_bstart = xres / 8 - 1 /* + 1 */; - - data.h_bstop = data.h_total+1 + 2 + 1; - data.h_sstart = (xres / 8) + (hfront / 8) + 1; - data.h_sstop = (xres / 8) + (hfront / 8) + (hsync / 8) + 1; - - data.v_total = yres + vfront + vsync + vback - 1; - - data.v_dispend = yres - 1; - data.v_bstart = yres - 1; - - data.v_bstop = data.v_total; - data.v_sstart = yres + vfront - 1 - 2; - data.v_sstop = yres + vfront + vsync - 1; - -#if 0 /* testing */ - - printk("HBS: %i\n", data.h_bstart); - printk("HSS: %i\n", data.h_sstart); - printk("HSE: %i\n", data.h_sstop); - printk("HBE: %i\n", data.h_bstop); - printk("HT: %i\n", data.h_total); - - printk("hsync: %i\n", hsync); - printk("hfront: %i\n", hfront); - printk("hback: %i\n", hback); - - printk("VBS: %i\n", data.v_bstart); - printk("VSS: %i\n", data.v_sstart); - printk("VSE: %i\n", data.v_sstop); - printk("VBE: %i\n", data.v_bstop); - printk("VT: %i\n", data.v_total); - - printk("vsync: %i\n", vsync); - printk("vfront: %i\n", vfront); - printk("vback: %i\n", vback); -#endif - - if (data.v_total >= 1024) - printk(KERN_ERR "MAYDAY: v_total >= 1024; bailing out!\n"); - - reg_w(regs, GREG_MISC_OUTPUT_W, 0xe3 | ((clocksel & 3) * 0x04)); - reg_w(regs, GREG_FEATURE_CONTROL_W, 0x00); - - seq_w(regs, SEQ_RESET, 0x00); - seq_w(regs, SEQ_RESET, 0x03); /* reset sequencer logic */ - - /* - * CLOCKING_MODE bits: - * 2: This one is only set for certain text-modes, wonder if - * it may be for EGA-lines? (it was referred to as CLKDIV2) - * (The CL drivers sets it to 0x21 with the comment: - * FullBandwidth (video off) and 8/9 dot clock) - */ - seq_w(regs, SEQ_CLOCKING_MODE, 0x01 | 0x00 /* 0x08 */); - - seq_w(regs, SEQ_MAP_MASK, 0x0f); /* enable writing to plane 0-3 */ - seq_w(regs, SEQ_CHAR_MAP_SELECT, 0x00); /* doesn't matter in gfx-mode */ - seq_w(regs, SEQ_MEMORY_MODE, 0x06); /* CL driver says 0x0e for 256 col mode*/ - seq_w(regs, SEQ_RESET, 0x01); - seq_w(regs, SEQ_RESET, 0x03); - - seq_w(regs, SEQ_EXTENDED_ENABLE, 0x05); - - seq_w(regs, SEQ_CURSOR_CONTROL, 0x00); /* disable cursor */ - seq_w(regs, SEQ_PRIM_HOST_OFF_HI, 0x00); - seq_w(regs, SEQ_PRIM_HOST_OFF_HI, 0x00); - seq_w(regs, SEQ_LINEAR_0, 0x4a); - seq_w(regs, SEQ_LINEAR_1, 0x00); - - seq_w(regs, SEQ_SEC_HOST_OFF_HI, 0x00); - seq_w(regs, SEQ_SEC_HOST_OFF_LO, 0x00); - seq_w(regs, SEQ_EXTENDED_MEM_ENA, 0x3 | 0x4 | 0x10 | 0x40); - - /* - * The lower 4 bits (0-3) are used to set the font-width for - * text-mode - DON'T try to set this for gfx-mode. - */ - seq_w(regs, SEQ_EXT_CLOCK_MODE, 0x10); - seq_w(regs, SEQ_EXT_VIDEO_ADDR, 0x03); - - /* - * Extended Pixel Control: - * bit 0: text-mode=0, gfx-mode=1 (Graphics Byte ?) - * bit 1: (Packed/Nibble Pixel Format ?) - * bit 4-5: depth, 0=1-8bpp, 1=9-16bpp, 2=17-24bpp - */ - seq_w(regs, SEQ_EXT_PIXEL_CNTL, 0x01 | (((bpp / 8) - 1) << 4)); - - seq_w(regs, SEQ_BUS_WIDTH_FEEDB, 0x04); - seq_w(regs, SEQ_COLOR_EXP_WFG, 0x01); - seq_w(regs, SEQ_COLOR_EXP_WBG, 0x00); - seq_w(regs, SEQ_EXT_RW_CONTROL, 0x00); - seq_w(regs, SEQ_MISC_FEATURE_SEL, (0x51 | (clocksel & 8))); - seq_w(regs, SEQ_COLOR_KEY_CNTL, 0x40); - seq_w(regs, SEQ_COLOR_KEY_MATCH0, 0x00); - seq_w(regs, SEQ_COLOR_KEY_MATCH1, 0x00); - seq_w(regs, SEQ_COLOR_KEY_MATCH2, 0x00); - seq_w(regs, SEQ_CRC_CONTROL, 0x00); - seq_w(regs, SEQ_PERF_SELECT, 0x10); - seq_w(regs, SEQ_ACM_APERTURE_1, 0x00); - seq_w(regs, SEQ_ACM_APERTURE_2, 0x30); - seq_w(regs, SEQ_ACM_APERTURE_3, 0x00); - seq_w(regs, SEQ_MEMORY_MAP_CNTL, 0x03); - - - /* unlock register CRT0..CRT7 */ - crt_w(regs, CRT_END_VER_RETR, (data.v_sstop & 0x0f) | 0x20); - - /* Zuerst zu schreibende Werte nur per printk ausgeben */ - DEBUG printk("CRT_HOR_TOTAL: %ld\n", data.h_total); - crt_w(regs, CRT_HOR_TOTAL, data.h_total & 0xff); - - DEBUG printk("CRT_HOR_DISP_ENA_END: %ld\n", data.h_dispend); - crt_w(regs, CRT_HOR_DISP_ENA_END, (data.h_dispend) & 0xff); - - DEBUG printk("CRT_START_HOR_BLANK: %ld\n", data.h_bstart); - crt_w(regs, CRT_START_HOR_BLANK, data.h_bstart & 0xff); - - DEBUG printk("CRT_END_HOR_BLANK: 128+%ld\n", data.h_bstop % 32); - crt_w(regs, CRT_END_HOR_BLANK, 0x80 | (data.h_bstop & 0x1f)); - - DEBUG printk("CRT_START_HOR_RETR: %ld\n", data.h_sstart); - crt_w(regs, CRT_START_HOR_RETR, data.h_sstart & 0xff); - - tmp = (data.h_sstop & 0x1f); - if (data.h_bstop & 0x20) - tmp |= 0x80; - DEBUG printk("CRT_END_HOR_RETR: %d\n", tmp); - crt_w(regs, CRT_END_HOR_RETR, tmp); - - DEBUG printk("CRT_VER_TOTAL: %ld\n", data.v_total & 0xff); - crt_w(regs, CRT_VER_TOTAL, (data.v_total & 0xff)); - - tmp = 0x10; /* LineCompare bit #9 */ - if (data.v_total & 256) - tmp |= 0x01; - if (data.v_dispend & 256) - tmp |= 0x02; - if (data.v_sstart & 256) - tmp |= 0x04; - if (data.v_bstart & 256) - tmp |= 0x08; - if (data.v_total & 512) - tmp |= 0x20; - if (data.v_dispend & 512) - tmp |= 0x40; - if (data.v_sstart & 512) - tmp |= 0x80; - DEBUG printk("CRT_OVERFLOW: %d\n", tmp); - crt_w(regs, CRT_OVERFLOW, tmp); - - crt_w(regs, CRT_PRESET_ROW_SCAN, 0x00); /* not CL !!! */ - - tmp = 0x40; /* LineCompare bit #8 */ - if (data.v_bstart & 512) - tmp |= 0x20; - if (var->vmode & FB_VMODE_DOUBLE) - tmp |= 0x80; - DEBUG printk("CRT_MAX_SCAN_LINE: %d\n", tmp); - crt_w(regs, CRT_MAX_SCAN_LINE, tmp); - - crt_w(regs, CRT_CURSOR_START, 0x00); - crt_w(regs, CRT_CURSOR_END, 8 & 0x1f); /* font height */ - - crt_w(regs, CRT_START_ADDR_HIGH, 0x00); - crt_w(regs, CRT_START_ADDR_LOW, 0x00); - - crt_w(regs, CRT_CURSOR_LOC_HIGH, 0x00); - crt_w(regs, CRT_CURSOR_LOC_LOW, 0x00); - - DEBUG printk("CRT_START_VER_RETR: %ld\n", data.v_sstart & 0xff); - crt_w(regs, CRT_START_VER_RETR, (data.v_sstart & 0xff)); - -#if 1 - /* 5 refresh cycles per scanline */ - DEBUG printk("CRT_END_VER_RETR: 64+32+%ld\n", data.v_sstop % 16); - crt_w(regs, CRT_END_VER_RETR, ((data.v_sstop & 0x0f) | 0x40 | 0x20)); -#else - DEBUG printk("CRT_END_VER_RETR: 128+32+%ld\n", data.v_sstop % 16); - crt_w(regs, CRT_END_VER_RETR, ((data.v_sstop & 0x0f) | 128 | 32)); -#endif - DEBUG printk("CRT_VER_DISP_ENA_END: %ld\n", data.v_dispend & 0xff); - crt_w(regs, CRT_VER_DISP_ENA_END, (data.v_dispend & 0xff)); - - DEBUG printk("CRT_START_VER_BLANK: %ld\n", data.v_bstart & 0xff); - crt_w(regs, CRT_START_VER_BLANK, (data.v_bstart & 0xff)); - - DEBUG printk("CRT_END_VER_BLANK: %ld\n", data.v_bstop & 0xff); - crt_w(regs, CRT_END_VER_BLANK, (data.v_bstop & 0xff)); - - DEBUG printk("CRT_MODE_CONTROL: 0xe3\n"); - crt_w(regs, CRT_MODE_CONTROL, 0xe3); - - DEBUG printk("CRT_LINE_COMPARE: 0xff\n"); - crt_w(regs, CRT_LINE_COMPARE, 0xff); - - tmp = (var->xres_virtual / 8) * (bpp / 8); - crt_w(regs, CRT_OFFSET, tmp); - - crt_w(regs, CRT_UNDERLINE_LOC, 0x07); /* probably font-height - 1 */ - - tmp = 0x20; /* Enable extended end bits */ - if (data.h_total & 0x100) - tmp |= 0x01; - if ((data.h_dispend) & 0x100) - tmp |= 0x02; - if (data.h_bstart & 0x100) - tmp |= 0x04; - if (data.h_sstart & 0x100) - tmp |= 0x08; - if (var->vmode & FB_VMODE_INTERLACED) - tmp |= 0x10; - DEBUG printk("CRT_EXT_HOR_TIMING1: %d\n", tmp); - crt_w(regs, CRT_EXT_HOR_TIMING1, tmp); - - tmp = 0x00; - if (((var->xres_virtual / 8) * (bpp / 8)) & 0x100) - tmp |= 0x10; - crt_w(regs, CRT_EXT_START_ADDR, tmp); - - tmp = 0x00; - if (data.h_total & 0x200) - tmp |= 0x01; - if ((data.h_dispend) & 0x200) - tmp |= 0x02; - if (data.h_bstart & 0x200) - tmp |= 0x04; - if (data.h_sstart & 0x200) - tmp |= 0x08; - tmp |= ((data.h_bstop & 0xc0) >> 2); - tmp |= ((data.h_sstop & 0x60) << 1); - crt_w(regs, CRT_EXT_HOR_TIMING2, tmp); - DEBUG printk("CRT_EXT_HOR_TIMING2: %d\n", tmp); - - tmp = 0x10; /* Line compare bit 10 */ - if (data.v_total & 0x400) - tmp |= 0x01; - if ((data.v_dispend) & 0x400) - tmp |= 0x02; - if (data.v_bstart & 0x400) - tmp |= 0x04; - if (data.v_sstart & 0x400) - tmp |= 0x08; - tmp |= ((data.v_bstop & 0x300) >> 3); - if (data.v_sstop & 0x10) - tmp |= 0x80; - crt_w(regs, CRT_EXT_VER_TIMING, tmp); - DEBUG printk("CRT_EXT_VER_TIMING: %d\n", tmp); - - crt_w(regs, CRT_MONITOR_POWER, 0x00); - - /* - * Convert from ps to Hz. - */ - freq = 2000000000 / var->pixclock; - freq = freq * 500; - - best_freq = find_fq(freq); - pll_w(regs, 0x02, best_freq); - best_freq = find_fq(61000000); - pll_w(regs, 0x0a, best_freq); - pll_w(regs, 0x0e, 0x22); - - gfx_w(regs, GFX_SET_RESET, 0x00); - gfx_w(regs, GFX_ENABLE_SET_RESET, 0x00); - gfx_w(regs, GFX_COLOR_COMPARE, 0x00); - gfx_w(regs, GFX_DATA_ROTATE, 0x00); - gfx_w(regs, GFX_READ_MAP_SELECT, 0x00); - gfx_w(regs, GFX_GRAPHICS_MODE, 0x00); - gfx_w(regs, GFX_MISC, 0x05); - gfx_w(regs, GFX_COLOR_XCARE, 0x0f); - gfx_w(regs, GFX_BITMASK, 0xff); - - reg_r(regs, ACT_ADDRESS_RESET); - attr_w(regs, ACT_PALETTE0 , 0x00); - attr_w(regs, ACT_PALETTE1 , 0x01); - attr_w(regs, ACT_PALETTE2 , 0x02); - attr_w(regs, ACT_PALETTE3 , 0x03); - attr_w(regs, ACT_PALETTE4 , 0x04); - attr_w(regs, ACT_PALETTE5 , 0x05); - attr_w(regs, ACT_PALETTE6 , 0x06); - attr_w(regs, ACT_PALETTE7 , 0x07); - attr_w(regs, ACT_PALETTE8 , 0x08); - attr_w(regs, ACT_PALETTE9 , 0x09); - attr_w(regs, ACT_PALETTE10, 0x0a); - attr_w(regs, ACT_PALETTE11, 0x0b); - attr_w(regs, ACT_PALETTE12, 0x0c); - attr_w(regs, ACT_PALETTE13, 0x0d); - attr_w(regs, ACT_PALETTE14, 0x0e); - attr_w(regs, ACT_PALETTE15, 0x0f); - reg_r(regs, ACT_ADDRESS_RESET); - - attr_w(regs, ACT_ATTR_MODE_CNTL, 0x09); /* 0x01 for CL */ - - attr_w(regs, ACT_OVERSCAN_COLOR, 0x00); - attr_w(regs, ACT_COLOR_PLANE_ENA, 0x0f); - attr_w(regs, ACT_HOR_PEL_PANNING, 0x00); - attr_w(regs, ACT_COLOR_SELECT, 0x00); - - reg_r(regs, ACT_ADDRESS_RESET); - reg_w(regs, ACT_DATA, 0x20); - - reg_w(regs, VDAC_MASK, 0xff); - - /* - * Extended palette addressing ??? - */ - switch (bpp){ - case 8: - reg_w(regs, 0x83c6, 0x00); - break; - case 16: - reg_w(regs, 0x83c6, 0x60); - break; - case 24: - reg_w(regs, 0x83c6, 0xe0); - break; - default: - printk(KERN_INFO "Illegal color-depth: %i\n", bpp); - } - - reg_w(regs, VDAC_ADDRESS, 0x00); - - seq_w(regs, SEQ_MAP_MASK, 0x0f ); - - return 0; -} - - -/* - * This function should fill in the `fix' structure based on the - * values in the `par' structure. - */ - -static int retz3_encode_fix(struct fb_info *info, - struct fb_fix_screeninfo *fix, - struct retz3fb_par *par) -{ - struct retz3_fb_info *zinfo = retz3info(info); - - memset(fix, 0, sizeof(struct fb_fix_screeninfo)); - strcpy(fix->id, retz3fb_name); - fix->smem_start = zinfo->physfbmem; - fix->smem_len = zinfo->fbsize; - fix->mmio_start = zinfo->physregs; - fix->mmio_len = 0x00c00000; - - fix->type = FB_TYPE_PACKED_PIXELS; - fix->type_aux = 0; - if (par->bpp == 8) - fix->visual = FB_VISUAL_PSEUDOCOLOR; - else - fix->visual = FB_VISUAL_TRUECOLOR; - - fix->xpanstep = 0; - fix->ypanstep = 0; - fix->ywrapstep = 0; - fix->line_length = 0; - - fix->accel = FB_ACCEL_NCR_77C32BLT; - - return 0; -} - - -/* - * Get the video params out of `var'. If a value doesn't fit, round - * it up, if it's too big, return -EINVAL. - */ - -static int retz3_decode_var(struct fb_var_screeninfo *var, - struct retz3fb_par *par) -{ - par->xres = var->xres; - par->yres = var->yres; - par->xres_vir = var->xres_virtual; - par->yres_vir = var->yres_virtual; - par->bpp = var->bits_per_pixel; - par->pixclock = var->pixclock; - par->vmode = var->vmode; - - par->red = var->red; - par->green = var->green; - par->blue = var->blue; - par->transp = var->transp; - - par->left_margin = var->left_margin; - par->right_margin = var->right_margin; - par->upper_margin = var->upper_margin; - par->lower_margin = var->lower_margin; - par->hsync_len = var->hsync_len; - par->vsync_len = var->vsync_len; - - if (var->accel_flags & FB_ACCELF_TEXT) - par->accel = FB_ACCELF_TEXT; - else - par->accel = 0; - - return 0; -} - - -/* - * Fill the `var' structure based on the values in `par' and maybe - * other values read out of the hardware. - */ - -static int retz3_encode_var(struct fb_var_screeninfo *var, - struct retz3fb_par *par) -{ - memset(var, 0, sizeof(struct fb_var_screeninfo)); - var->xres = par->xres; - var->yres = par->yres; - var->xres_virtual = par->xres_vir; - var->yres_virtual = par->yres_vir; - var->xoffset = 0; - var->yoffset = 0; - - var->bits_per_pixel = par->bpp; - var->grayscale = 0; - - var->red = par->red; - var->green = par->green; - var->blue = par->blue; - var->transp = par->transp; - - var->nonstd = 0; - var->activate = 0; - - var->height = -1; - var->width = -1; - - var->accel_flags = (par->accel && par->bpp == 8) ? FB_ACCELF_TEXT : 0; - - var->pixclock = par->pixclock; - - var->sync = 0; /* ??? */ - var->left_margin = par->left_margin; - var->right_margin = par->right_margin; - var->upper_margin = par->upper_margin; - var->lower_margin = par->lower_margin; - var->hsync_len = par->hsync_len; - var->vsync_len = par->vsync_len; - - var->vmode = par->vmode; - return 0; -} - - -/* - * Set a single color register. Return != 0 for invalid regno. - */ - -static int retz3fb_setcolreg(unsigned int regno, unsigned int red, - unsigned int green, unsigned int blue, - unsigned int transp, struct fb_info *info) -{ - struct retz3_fb_info *zinfo = retz3info(info); - volatile unsigned char *regs = zinfo->regs; - - /* We'll get to this */ - - if (regno > 255) - return 1; - - red >>= 10; - green >>= 10; - blue >>= 10; - - zinfo->color_table[regno][0] = red; - zinfo->color_table[regno][1] = green; - zinfo->color_table[regno][2] = blue; - - reg_w(regs, VDAC_ADDRESS_W, regno); - reg_w(regs, VDAC_DATA, red); - reg_w(regs, VDAC_DATA, green); - reg_w(regs, VDAC_DATA, blue); - - return 0; -} - - -/* - * Read a single color register and split it into - * colors/transparent. Return != 0 for invalid regno. - */ - -static int retz3_getcolreg(unsigned int regno, unsigned int *red, - unsigned int *green, unsigned int *blue, - unsigned int *transp, struct fb_info *info) -{ - struct retz3_fb_info *zinfo = retz3info(info); - int t; - - if (regno > 255) - return 1; - t = zinfo->color_table[regno][0]; - *red = (t<<10) | (t<<4) | (t>>2); - t = zinfo->color_table[regno][1]; - *green = (t<<10) | (t<<4) | (t>>2); - t = zinfo->color_table[regno][2]; - *blue = (t<<10) | (t<<4) | (t>>2); - *transp = 0; - return 0; -} - - -static inline void retz3_busy(struct display *p) -{ - struct retz3_fb_info *zinfo = retz3info(p->fb_info); - volatile unsigned char *acm = zinfo->base + ACM_OFFSET; - unsigned char blt_status; - - if (zinfo->blitbusy) { - do{ - blt_status = *((acm) + (ACM_START_STATUS + 2)); - }while ((blt_status & 1) == 0); - zinfo->blitbusy = 0; - } -} - - -static void retz3_bitblt (struct display *p, - unsigned short srcx, unsigned short srcy, - unsigned short destx, unsigned short desty, - unsigned short width, unsigned short height, - unsigned short cmd, unsigned short mask) -{ - struct fb_var_screeninfo *var = &p->var; - struct retz3_fb_info *zinfo = retz3info(p->fb_info); - volatile unsigned long *acm = (unsigned long *)(zinfo->base + ACM_OFFSET); - unsigned long *pattern = (unsigned long *)(zinfo->fbmem + PAT_MEM_OFF); - - unsigned short mod; - unsigned long tmp; - unsigned long pat, src, dst; - - int i, xres_virtual = var->xres_virtual; - short bpp = (var->bits_per_pixel & 0xff); - - if (bpp < 8) - bpp = 8; - - tmp = mask | (mask << 16); - - retz3_busy(p); - - i = 0; - do{ - *pattern++ = tmp; - }while(i++ < bpp/4); - - tmp = cmd << 8; - *(acm + ACM_RASTEROP_ROTATION/4) = tmp; - - mod = 0xc0c2; - - pat = 8 * PAT_MEM_OFF; - dst = bpp * (destx + desty * xres_virtual); - - /* - * Source is not set for clear. - */ - if ((cmd != Z3BLTclear) && (cmd != Z3BLTset)) { - src = bpp * (srcx + srcy * xres_virtual); - - if (destx > srcx) { - mod &= ~0x8000; - src += bpp * (width - 1); - dst += bpp * (width - 1); - pat += bpp * 2; - } - if (desty > srcy) { - mod &= ~0x4000; - src += bpp * (height - 1) * xres_virtual; - dst += bpp * (height - 1) * xres_virtual; - pat += bpp * 4; - } - - *(acm + ACM_SOURCE/4) = cpu_to_le32(src); - } - - *(acm + ACM_PATTERN/4) = cpu_to_le32(pat); - - *(acm + ACM_DESTINATION/4) = cpu_to_le32(dst); - - tmp = mod << 16; - *(acm + ACM_CONTROL/4) = tmp; - - tmp = width | (height << 16); - - *(acm + ACM_BITMAP_DIMENSION/4) = cpu_to_le32(tmp); - - *(((volatile unsigned char *)acm) + ACM_START_STATUS) = 0x00; - *(((volatile unsigned char *)acm) + ACM_START_STATUS) = 0x01; - zinfo->blitbusy = 1; -} - -#if 0 -/* - * Move cursor to x, y - */ -static void retz3_MoveCursor (unsigned short x, unsigned short y) -{ - /* Guess we gotta deal with the cursor at some point */ -} -#endif - - -/* - * Fill the hardware's `par' structure. - */ - -static void retz3fb_get_par(struct fb_info *info, struct retz3fb_par *par) -{ - struct retz3_fb_info *zinfo = retz3info(info); - - if (zinfo->current_par_valid) - *par = zinfo->current_par; - else - retz3_decode_var(&retz3fb_default, par); -} - - -static void retz3fb_set_par(struct fb_info *info, struct retz3fb_par *par) -{ - struct retz3_fb_info *zinfo = retz3info(info); - - zinfo->current_par = *par; - zinfo->current_par_valid = 1; -} - - -static int do_fb_set_var(struct fb_info *info, - struct fb_var_screeninfo *var, int isactive) -{ - int err, activate; - struct retz3fb_par par; - struct retz3_fb_info *zinfo = retz3info(info); - - if ((err = retz3_decode_var(var, &par))) - return err; - activate = var->activate; - - /* XXX ... what to do about isactive ? */ - - if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW && isactive) - retz3fb_set_par(info, &par); - retz3_encode_var(var, &par); - var->activate = activate; - - retz3_set_video(info, var, &zinfo->current_par); - - return 0; -} - -/* - * Get the Fixed Part of the Display - */ - -static int retz3fb_get_fix(struct fb_fix_screeninfo *fix, int con, - struct fb_info *info) -{ - struct retz3fb_par par; - int error = 0; - - if (con == -1) - retz3fb_get_par(info, &par); - else - error = retz3_decode_var(&fb_display[con].var, &par); - return(error ? error : retz3_encode_fix(info, fix, &par)); -} - - -/* - * Get the User Defined Part of the Display - */ - -static int retz3fb_get_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info) -{ - struct retz3fb_par par; - int error = 0; - - if (con == -1) { - retz3fb_get_par(info, &par); - error = retz3_encode_var(var, &par); - } else - *var = fb_display[con].var; - return error; -} - - -static void retz3fb_set_disp(int con, struct fb_info *info) -{ - struct fb_fix_screeninfo fix; - struct display *display; - struct retz3_fb_info *zinfo = retz3info(info); - - if (con >= 0) - display = &fb_display[con]; - else - display = &zinfo->disp; /* used during initialization */ - - retz3fb_get_fix(&fix, con, info); - - if (con == -1) - con = 0; - - display->visual = fix.visual; - display->type = fix.type; - display->type_aux = fix.type_aux; - display->ypanstep = fix.ypanstep; - display->ywrapstep = fix.ywrapstep; - display->can_soft_blank = 1; - display->inverse = z3fb_inverse; - - /* - * This seems to be about 20% faster. - */ - display->scrollmode = SCROLL_YREDRAW; - - switch (display->var.bits_per_pixel) { -#ifdef FBCON_HAS_CFB8 - case 8: - if (display->var.accel_flags & FB_ACCELF_TEXT) { - display->dispsw = &fbcon_retz3_8; - retz3_set_video(info, &display->var, &zinfo->current_par); - } else - display->dispsw = &fbcon_cfb8; - break; -#endif -#ifdef FBCON_HAS_CFB16 - case 16: - display->dispsw = &fbcon_cfb16; - break; -#endif - default: - display->dispsw = &fbcon_dummy; - break; - } -} - - -/* - * Set the User Defined Part of the Display - */ - -static int retz3fb_set_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info) -{ - int err, oldxres, oldyres, oldvxres, oldvyres, oldbpp, oldaccel; - struct display *display; - struct retz3_fb_info *zinfo = retz3info(info); - - if (con >= 0) - display = &fb_display[con]; - else - display = &zinfo->disp; /* used during initialization */ - - if ((err = do_fb_set_var(info, var, con == info->currcon))) - return err; - if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) { - oldxres = display->var.xres; - oldyres = display->var.yres; - oldvxres = display->var.xres_virtual; - oldvyres = display->var.yres_virtual; - oldbpp = display->var.bits_per_pixel; - oldaccel = display->var.accel_flags; - display->var = *var; - - if (oldxres != var->xres || oldyres != var->yres || - oldvxres != var->xres_virtual || - oldvyres != var->yres_virtual || - oldbpp != var->bits_per_pixel || - oldaccel != var->accel_flags) { - - struct fb_fix_screeninfo fix; - retz3fb_get_fix(&fix, con, info); - - display->visual = fix.visual; - display->type = fix.type; - display->type_aux = fix.type_aux; - display->ypanstep = fix.ypanstep; - display->ywrapstep = fix.ywrapstep; - display->line_length = fix.line_length; - display->can_soft_blank = 1; - display->inverse = z3fb_inverse; - switch (display->var.bits_per_pixel) { -#ifdef FBCON_HAS_CFB8 - case 8: - if (var->accel_flags & FB_ACCELF_TEXT) { - display->dispsw = &fbcon_retz3_8; - } else - display->dispsw = &fbcon_cfb8; - break; -#endif -#ifdef FBCON_HAS_CFB16 - case 16: - display->dispsw = &fbcon_cfb16; - break; -#endif - default: - display->dispsw = &fbcon_dummy; - break; - } - /* - * We still need to find a way to tell the X - * server that the video mem has been fiddled with - * so it redraws the entire screen when switching - * between X and a text console. - */ - retz3_set_video(info, var, &zinfo->current_par); - - if (info->changevar) - (*info->changevar)(con); - } - - if (oldbpp != var->bits_per_pixel) { - if ((err = fb_alloc_cmap(&display->cmap, 0, 0))) - return err; - do_install_cmap(con, info); - } - } - return 0; -} - - -/* - * Get the Colormap - */ - -static int retz3fb_get_cmap(struct fb_cmap *cmap, int kspc, int con, - struct fb_info *info) -{ - if (con == info->currcon) /* current console? */ - return(fb_get_cmap(cmap, kspc, retz3_getcolreg, info)); - else if (fb_display[con].cmap.len) /* non default colormap? */ - fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2); - else - fb_copy_cmap(fb_default_cmap(1<<fb_display[con].var.bits_per_pixel), - cmap, kspc ? 0 : 2); - return 0; -} - -/* - * Blank the display. - */ - -static int retz3fb_blank(int blank, struct fb_info *info) -{ - struct retz3_fb_info *zinfo = retz3info(info); - volatile unsigned char *regs = retz3info(info)->regs; - short i; - - if (blank) - for (i = 0; i < 256; i++){ - reg_w(regs, VDAC_ADDRESS_W, i); - reg_w(regs, VDAC_DATA, 0); - reg_w(regs, VDAC_DATA, 0); - reg_w(regs, VDAC_DATA, 0); - } - else - for (i = 0; i < 256; i++){ - reg_w(regs, VDAC_ADDRESS_W, i); - reg_w(regs, VDAC_DATA, zinfo->color_table[i][0]); - reg_w(regs, VDAC_DATA, zinfo->color_table[i][1]); - reg_w(regs, VDAC_DATA, zinfo->color_table[i][2]); - } - return 0; -} - -static struct fb_ops retz3fb_ops = { - .owner = THIS_MODULE, - .fb_get_fix = retz3fb_get_fix, - .fb_get_var = retz3fb_get_var, - .fb_set_var = retz3fb_set_var, - .fb_get_cmap = retz3fb_get_cmap, - .fb_set_cmap = gen_set_cmap, - .fb_setcolreg = retz3fb_setcolreg, - .fb_blank = retz3fb_blank, -}; - -int __init retz3fb_setup(char *options) -{ - char *this_opt; - - if (!options || !*options) - return 0; - - while ((this_opt = strsep(&options, ",")) != NULL) { - if (!*this_opt) - continue; - if (!strcmp(this_opt, "inverse")) { - z3fb_inverse = 1; - fb_invert_cmaps(); - } else if (!strncmp(this_opt, "font:", 5)) { - strlcpy(fontname, this_opt+5, sizeof(fontname)); - } else - z3fb_mode = get_video_mode(this_opt); - } - return 0; -} - - -/* - * Initialization - */ - -int __init retz3fb_init(void) -{ - unsigned long board_addr, board_size; - struct zorro_dev *z = NULL; - volatile unsigned char *regs; - struct retz3fb_par par; - struct retz3_fb_info *zinfo; - struct fb_info *fb_info; - short i; - int res = -ENXIO; - - while ((z = zorro_find_device(ZORRO_PROD_MACROSYSTEMS_RETINA_Z3, z))) { - board_addr = z->resource.start; - board_size = z->resource.end-z->resource.start+1; - if (!request_mem_region(board_addr, 0x0c00000, - "ncr77c32blt")) { - continue; - if (!request_mem_region(board_addr+VIDEO_MEM_OFFSET, - 0x00400000, "RAM")) - release_mem_region(board_addr, 0x00c00000); - continue; - } - if (!(zinfo = kmalloc(sizeof(struct retz3_fb_info), - GFP_KERNEL))) - return -ENOMEM; - memset(zinfo, 0, sizeof(struct retz3_fb_info)); - - zinfo->base = ioremap(board_addr, board_size); - zinfo->regs = zinfo->base; - zinfo->fbmem = zinfo->base + VIDEO_MEM_OFFSET; - /* Get memory size - for now we asume it's a 4MB board */ - zinfo->fbsize = 0x00400000; /* 4 MB */ - zinfo->physregs = board_addr; - zinfo->physfbmem = board_addr + VIDEO_MEM_OFFSET; - - fb_info = fbinfo(zinfo); - - for (i = 0; i < 256; i++){ - for (i = 0; i < 256; i++){ - zinfo->color_table[i][0] = i; - zinfo->color_table[i][1] = i; - zinfo->color_table[i][2] = i; - } - } - - regs = zinfo->regs; - /* Disable hardware cursor */ - seq_w(regs, SEQ_CURSOR_Y_INDEX, 0x00); - - retz3fb_setcolreg (255, 56<<8, 100<<8, 160<<8, 0, fb_info); - retz3fb_setcolreg (254, 0, 0, 0, 0, fb_info); - - strcpy(fb_info->modename, retz3fb_name); - fb_info->changevar = NULL; - fb_info->fbops = &retz3fb_ops; - fb_info->screen_base = zinfo->fbmem; - fb_info->disp = &zinfo->disp; - fb_info->currcon = -1; - fb_info->switch_con = &z3fb_switch; - fb_info->updatevar = &z3fb_updatevar; - fb_info->flags = FBINFO_FLAG_DEFAULT; - strlcpy(fb_info->fontname, fontname, sizeof(fb_info->fontname)); - - if (z3fb_mode == -1) - retz3fb_default = retz3fb_predefined[0].var; - - retz3_decode_var(&retz3fb_default, &par); - retz3_encode_var(&retz3fb_default, &par); - - do_fb_set_var(fb_info, &retz3fb_default, 0); - retz3fb_get_var(&zinfo->disp.var, -1, fb_info); - - retz3fb_set_disp(-1, fb_info); - - do_install_cmap(0, fb_info); - - if (register_framebuffer(fb_info) < 0) { - iounmap(zinfo->base); - return -EINVAL; - } - - printk(KERN_INFO "fb%d: %s frame buffer device, using %ldK of " - "video memory\n", fb_info->node, - fb_info->modename, zinfo->fbsize>>10); - - /* FIXME: This driver cannot be unloaded yet */ - res = 0; - } - return res; -} - - -static int z3fb_switch(int con, struct fb_info *info) -{ - /* Do we have to save the colormap? */ - if (fb_display[info->currcon].cmap.len) - fb_get_cmap(&fb_display[info->currcon].cmap, 1, - retz3_getcolreg, info); - - do_fb_set_var(info, &fb_display[con].var, 1); - info->currcon = con; - /* Install new colormap */ - do_install_cmap(con, info); - return 0; -} - - -/* - * Update the `var' structure (called by fbcon.c) - * - * This call looks only at yoffset and the FB_VMODE_YWRAP flag in `var'. - * Since it's called by a kernel driver, no range checking is done. - */ - -static int z3fb_updatevar(int con, struct fb_info *info) -{ - return 0; -} - -/* - * Get a Video Mode - */ - -static int __init get_video_mode(const char *name) -{ - short i; - - for (i = 0; i < NUM_TOTAL_MODES; i++) - if (!strcmp(name, retz3fb_predefined[i].name)){ - retz3fb_default = retz3fb_predefined[i].var; - return i; - } - return -1; -} - - -#ifdef MODULE -MODULE_LICENSE("GPL"); - -int init_module(void) -{ - return retz3fb_init(); -} -#endif - - -/* - * Text console acceleration - */ - -#ifdef FBCON_HAS_CFB8 -static void retz3_8_bmove(struct display *p, int sy, int sx, - int dy, int dx, int height, int width) -{ - int fontwidth = fontwidth(p); - - sx *= fontwidth; - dx *= fontwidth; - width *= fontwidth; - - retz3_bitblt(p, - (unsigned short)sx, - (unsigned short)(sy*fontheight(p)), - (unsigned short)dx, - (unsigned short)(dy*fontheight(p)), - (unsigned short)width, - (unsigned short)(height*fontheight(p)), - Z3BLTcopy, - 0xffff); -} - -static void retz3_8_clear(struct vc_data *conp, struct display *p, - int sy, int sx, int height, int width) -{ - unsigned short col; - int fontwidth = fontwidth(p); - - sx *= fontwidth; - width *= fontwidth; - - col = attr_bgcol_ec(p, conp); - col &= 0xff; - col |= (col << 8); - - retz3_bitblt(p, - (unsigned short)sx, - (unsigned short)(sy*fontheight(p)), - (unsigned short)sx, - (unsigned short)(sy*fontheight(p)), - (unsigned short)width, - (unsigned short)(height*fontheight(p)), - Z3BLTset, - col); -} - - -static void retz3_putc(struct vc_data *conp, struct display *p, int c, - int yy, int xx) -{ - retz3_busy(p); - fbcon_cfb8_putc(conp, p, c, yy, xx); -} - - -static void retz3_putcs(struct vc_data *conp, struct display *p, - const unsigned short *s, int count, - int yy, int xx) -{ - retz3_busy(p); - fbcon_cfb8_putcs(conp, p, s, count, yy, xx); -} - - -static void retz3_revc(struct display *p, int xx, int yy) -{ - retz3_busy(p); - fbcon_cfb8_revc(p, xx, yy); -} - - -static void retz3_clear_margins(struct vc_data* conp, struct display* p, - int bottom_only) -{ - retz3_busy(p); - fbcon_cfb8_clear_margins(conp, p, bottom_only); -} - - -static struct display_switch fbcon_retz3_8 = { - .setup = fbcon_cfb8_setup, - .bmove = retz3_8_bmove, - .clear = retz3_8_clear, - .putc = retz3_putc, - .putcs = retz3_putcs, - .revc = retz3_revc, - .clear_margins = retz3_clear_margins, - .fontwidthmask = FONTWIDTH(8) -}; -#endif diff --git a/drivers/video/retz3fb.h b/drivers/video/retz3fb.h deleted file mode 100644 index 5cc75106772..00000000000 --- a/drivers/video/retz3fb.h +++ /dev/null @@ -1,286 +0,0 @@ -/* - * linux/drivers/video/retz3fb.h -- Defines and macros for the RetinaZ3 frame - * buffer device - * - * Copyright (C) 1997 Jes Sorensen - * - * History: - * - 22 Jan 97: Initial work - * - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive - * for more details. - */ - -/* - * Macros to read and write to registers. - */ -#define reg_w(regs, reg,dat) (*(regs + reg) = dat) -#define reg_r(regs, reg) (*(regs + reg)) - -/* - * Macro to access the sequencer. - */ -#define seq_w(regs, sreg, sdat) \ - do{ reg_w(regs, SEQ_IDX, sreg); reg_w(regs, SEQ_DATA, sdat); } while(0) - -/* - * Macro to access the CRT controller. - */ -#define crt_w(regs, creg, cdat) \ - do{ reg_w(regs, CRT_IDX, creg); reg_w(regs, CRT_DATA, cdat); } while(0) - -/* - * Macro to access the graphics controller. - */ -#define gfx_w(regs, greg, gdat) \ - do{ reg_w(regs, GFX_IDX, greg); reg_w(regs, GFX_DATA, gdat); } while(0) - -/* - * Macro to access the attribute controller. - */ -#define attr_w(regs, areg, adat) \ - do{ reg_w(regs, ACT_IDX, areg); reg_w(regs, ACT_DATA, adat); } while(0) - -/* - * Macro to access the pll. - */ -#define pll_w(regs, preg, pdat) \ - do{ reg_w(regs, PLL_IDX, preg); \ - reg_w(regs, PLL_DATA, (pdat & 0xff)); \ - reg_w(regs, PLL_DATA, (pdat >> 8));\ - } while(0) - -/* - * Offsets - */ -#define VIDEO_MEM_OFFSET 0x00c00000 -#define ACM_OFFSET 0x00b00000 - -/* - * Accelerator Control Menu - */ -#define ACM_PRIMARY_OFFSET 0x00 -#define ACM_SECONDARY_OFFSET 0x04 -#define ACM_MODE_CONTROL 0x08 -#define ACM_CURSOR_POSITION 0x0c -#define ACM_START_STATUS 0x30 -#define ACM_CONTROL 0x34 -#define ACM_RASTEROP_ROTATION 0x38 -#define ACM_BITMAP_DIMENSION 0x3c -#define ACM_DESTINATION 0x40 -#define ACM_SOURCE 0x44 -#define ACM_PATTERN 0x48 -#define ACM_FOREGROUND 0x4c -#define ACM_BACKGROUND 0x50 - -/* - * Video DAC addresses - */ -#define VDAC_ADDRESS 0x03c8 -#define VDAC_ADDRESS_W 0x03c8 -#define VDAC_ADDRESS_R 0x03c7 -#define VDAC_STATE 0x03c7 -#define VDAC_DATA 0x03c9 -#define VDAC_MASK 0x03c6 - -/* - * Sequencer - */ -#define SEQ_IDX 0x03c4 /* Sequencer Index */ -#define SEQ_DATA 0x03c5 -#define SEQ_RESET 0x00 -#define SEQ_CLOCKING_MODE 0x01 -#define SEQ_MAP_MASK 0x02 -#define SEQ_CHAR_MAP_SELECT 0x03 -#define SEQ_MEMORY_MODE 0x04 -#define SEQ_EXTENDED_ENABLE 0x05 /* NCR extensions */ -#define SEQ_UNKNOWN1 0x06 -#define SEQ_UNKNOWN2 0x07 -#define SEQ_CHIP_ID 0x08 -#define SEQ_UNKNOWN3 0x09 -#define SEQ_CURSOR_COLOR1 0x0a -#define SEQ_CURSOR_COLOR0 0x0b -#define SEQ_CURSOR_CONTROL 0x0c -#define SEQ_CURSOR_X_LOC_HI 0x0d -#define SEQ_CURSOR_X_LOC_LO 0x0e -#define SEQ_CURSOR_Y_LOC_HI 0x0f -#define SEQ_CURSOR_Y_LOC_LO 0x10 -#define SEQ_CURSOR_X_INDEX 0x11 -#define SEQ_CURSOR_Y_INDEX 0x12 -#define SEQ_CURSOR_STORE_HI 0x13 -#define SEQ_CURSOR_STORE_LO 0x14 -#define SEQ_CURSOR_ST_OFF_HI 0x15 -#define SEQ_CURSOR_ST_OFF_LO 0x16 -#define SEQ_CURSOR_PIXELMASK 0x17 -#define SEQ_PRIM_HOST_OFF_HI 0x18 -#define SEQ_PRIM_HOST_OFF_LO 0x19 -#define SEQ_LINEAR_0 0x1a -#define SEQ_LINEAR_1 0x1b -#define SEQ_SEC_HOST_OFF_HI 0x1c -#define SEQ_SEC_HOST_OFF_LO 0x1d -#define SEQ_EXTENDED_MEM_ENA 0x1e -#define SEQ_EXT_CLOCK_MODE 0x1f -#define SEQ_EXT_VIDEO_ADDR 0x20 -#define SEQ_EXT_PIXEL_CNTL 0x21 -#define SEQ_BUS_WIDTH_FEEDB 0x22 -#define SEQ_PERF_SELECT 0x23 -#define SEQ_COLOR_EXP_WFG 0x24 -#define SEQ_COLOR_EXP_WBG 0x25 -#define SEQ_EXT_RW_CONTROL 0x26 -#define SEQ_MISC_FEATURE_SEL 0x27 -#define SEQ_COLOR_KEY_CNTL 0x28 -#define SEQ_COLOR_KEY_MATCH0 0x29 -#define SEQ_COLOR_KEY_MATCH1 0x2a -#define SEQ_COLOR_KEY_MATCH2 0x2b -#define SEQ_UNKNOWN6 0x2c -#define SEQ_CRC_CONTROL 0x2d -#define SEQ_CRC_DATA_LOW 0x2e -#define SEQ_CRC_DATA_HIGH 0x2f -#define SEQ_MEMORY_MAP_CNTL 0x30 -#define SEQ_ACM_APERTURE_1 0x31 -#define SEQ_ACM_APERTURE_2 0x32 -#define SEQ_ACM_APERTURE_3 0x33 -#define SEQ_BIOS_UTILITY_0 0x3e -#define SEQ_BIOS_UTILITY_1 0x3f - -/* - * Graphics Controller - */ -#define GFX_IDX 0x03ce -#define GFX_DATA 0x03cf -#define GFX_SET_RESET 0x00 -#define GFX_ENABLE_SET_RESET 0x01 -#define GFX_COLOR_COMPARE 0x02 -#define GFX_DATA_ROTATE 0x03 -#define GFX_READ_MAP_SELECT 0x04 -#define GFX_GRAPHICS_MODE 0x05 -#define GFX_MISC 0x06 -#define GFX_COLOR_XCARE 0x07 -#define GFX_BITMASK 0x08 - -/* - * CRT Controller - */ -#define CRT_IDX 0x03d4 -#define CRT_DATA 0x03d5 -#define CRT_HOR_TOTAL 0x00 -#define CRT_HOR_DISP_ENA_END 0x01 -#define CRT_START_HOR_BLANK 0x02 -#define CRT_END_HOR_BLANK 0x03 -#define CRT_START_HOR_RETR 0x04 -#define CRT_END_HOR_RETR 0x05 -#define CRT_VER_TOTAL 0x06 -#define CRT_OVERFLOW 0x07 -#define CRT_PRESET_ROW_SCAN 0x08 -#define CRT_MAX_SCAN_LINE 0x09 -#define CRT_CURSOR_START 0x0a -#define CRT_CURSOR_END 0x0b -#define CRT_START_ADDR_HIGH 0x0c -#define CRT_START_ADDR_LOW 0x0d -#define CRT_CURSOR_LOC_HIGH 0x0e -#define CRT_CURSOR_LOC_LOW 0x0f -#define CRT_START_VER_RETR 0x10 -#define CRT_END_VER_RETR 0x11 -#define CRT_VER_DISP_ENA_END 0x12 -#define CRT_OFFSET 0x13 -#define CRT_UNDERLINE_LOC 0x14 -#define CRT_START_VER_BLANK 0x15 -#define CRT_END_VER_BLANK 0x16 -#define CRT_MODE_CONTROL 0x17 -#define CRT_LINE_COMPARE 0x18 -#define CRT_UNKNOWN1 0x19 -#define CRT_UNKNOWN2 0x1a -#define CRT_UNKNOWN3 0x1b -#define CRT_UNKNOWN4 0x1c -#define CRT_UNKNOWN5 0x1d -#define CRT_UNKNOWN6 0x1e -#define CRT_UNKNOWN7 0x1f -#define CRT_UNKNOWN8 0x20 -#define CRT_UNKNOWN9 0x21 -#define CRT_UNKNOWN10 0x22 -#define CRT_UNKNOWN11 0x23 -#define CRT_UNKNOWN12 0x24 -#define CRT_UNKNOWN13 0x25 -#define CRT_UNKNOWN14 0x26 -#define CRT_UNKNOWN15 0x27 -#define CRT_UNKNOWN16 0x28 -#define CRT_UNKNOWN17 0x29 -#define CRT_UNKNOWN18 0x2a -#define CRT_UNKNOWN19 0x2b -#define CRT_UNKNOWN20 0x2c -#define CRT_UNKNOWN21 0x2d -#define CRT_UNKNOWN22 0x2e -#define CRT_UNKNOWN23 0x2f -#define CRT_EXT_HOR_TIMING1 0x30 /* NCR crt extensions */ -#define CRT_EXT_START_ADDR 0x31 -#define CRT_EXT_HOR_TIMING2 0x32 -#define CRT_EXT_VER_TIMING 0x33 -#define CRT_MONITOR_POWER 0x34 - -/* - * General Registers - */ -#define GREG_STATUS0_R 0x03c2 -#define GREG_STATUS1_R 0x03da -#define GREG_MISC_OUTPUT_R 0x03cc -#define GREG_MISC_OUTPUT_W 0x03c2 -#define GREG_FEATURE_CONTROL_R 0x03ca -#define GREG_FEATURE_CONTROL_W 0x03da -#define GREG_POS 0x0102 - -/* - * Attribute Controller - */ -#define ACT_IDX 0x03C0 -#define ACT_ADDRESS_R 0x03C0 -#define ACT_DATA 0x03C0 -#define ACT_ADDRESS_RESET 0x03DA -#define ACT_PALETTE0 0x00 -#define ACT_PALETTE1 0x01 -#define ACT_PALETTE2 0x02 -#define ACT_PALETTE3 0x03 -#define ACT_PALETTE4 0x04 -#define ACT_PALETTE5 0x05 -#define ACT_PALETTE6 0x06 -#define ACT_PALETTE7 0x07 -#define ACT_PALETTE8 0x08 -#define ACT_PALETTE9 0x09 -#define ACT_PALETTE10 0x0A -#define ACT_PALETTE11 0x0B -#define ACT_PALETTE12 0x0C -#define ACT_PALETTE13 0x0D -#define ACT_PALETTE14 0x0E -#define ACT_PALETTE15 0x0F -#define ACT_ATTR_MODE_CNTL 0x10 -#define ACT_OVERSCAN_COLOR 0x11 -#define ACT_COLOR_PLANE_ENA 0x12 -#define ACT_HOR_PEL_PANNING 0x13 -#define ACT_COLOR_SELECT 0x14 - -/* - * PLL - */ -#define PLL_IDX 0x83c8 -#define PLL_DATA 0x83c9 - -/* - * Blitter operations - */ -#define Z3BLTclear 0x00 /* 0 */ -#define Z3BLTand 0x80 /* src AND dst */ -#define Z3BLTandReverse 0x40 /* src AND NOT dst */ -#define Z3BLTcopy 0xc0 /* src */ -#define Z3BLTandInverted 0x20 /* NOT src AND dst */ -#define Z3BLTnoop 0xa0 /* dst */ -#define Z3BLTxor 0x60 /* src XOR dst */ -#define Z3BLTor 0xe0 /* src OR dst */ -#define Z3BLTnor 0x10 /* NOT src AND NOT dst */ -#define Z3BLTequiv 0x90 /* NOT src XOR dst */ -#define Z3BLTinvert 0x50 /* NOT dst */ -#define Z3BLTorReverse 0xd0 /* src OR NOT dst */ -#define Z3BLTcopyInverted 0x30 /* NOT src */ -#define Z3BLTorInverted 0xb0 /* NOT src OR dst */ -#define Z3BLTnand 0x70 /* NOT src OR NOT dst */ -#define Z3BLTset 0xf0 /* 1 */ diff --git a/drivers/video/riva/fbdev.c b/drivers/video/riva/fbdev.c index 1a13966b7d5..f2e9b742c92 100644 --- a/drivers/video/riva/fbdev.c +++ b/drivers/video/riva/fbdev.c @@ -894,7 +894,8 @@ out: return rc; } -static void riva_update_var(struct fb_var_screeninfo *var, struct fb_videomode *modedb) +static void riva_update_var(struct fb_var_screeninfo *var, + const struct fb_videomode *modedb) { NVTRACE_ENTER(); var->xres = var->xres_virtual = modedb->xres; @@ -1101,10 +1102,10 @@ static int riva_get_cmap_len(const struct fb_var_screeninfo *var) static int rivafb_open(struct fb_info *info, int user) { struct riva_par *par = info->par; - int cnt = atomic_read(&par->ref_count); NVTRACE_ENTER(); - if (!cnt) { + mutex_lock(&par->open_lock); + if (!par->ref_count) { #ifdef CONFIG_X86 memset(&par->state, 0, sizeof(struct vgastate)); par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS; @@ -1119,7 +1120,8 @@ static int rivafb_open(struct fb_info *info, int user) riva_save_state(par, &par->initial_state); } - atomic_inc(&par->ref_count); + par->ref_count++; + mutex_unlock(&par->open_lock); NVTRACE_LEAVE(); return 0; } @@ -1127,12 +1129,14 @@ static int rivafb_open(struct fb_info *info, int user) static int rivafb_release(struct fb_info *info, int user) { struct riva_par *par = info->par; - int cnt = atomic_read(&par->ref_count); NVTRACE_ENTER(); - if (!cnt) + mutex_lock(&par->open_lock); + if (!par->ref_count) { + mutex_unlock(&par->open_lock); return -EINVAL; - if (cnt == 1) { + } + if (par->ref_count == 1) { par->riva.LockUnlock(&par->riva, 0); par->riva.LoadStateExt(&par->riva, &par->initial_state.ext); riva_load_state(par, &par->initial_state); @@ -1141,14 +1145,15 @@ static int rivafb_release(struct fb_info *info, int user) #endif par->riva.LockUnlock(&par->riva, 1); } - atomic_dec(&par->ref_count); + par->ref_count--; + mutex_unlock(&par->open_lock); NVTRACE_LEAVE(); return 0; } static int rivafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) { - struct fb_videomode *mode; + const struct fb_videomode *mode; struct riva_par *par = info->par; int nom, den; /* translating from pixels->bytes */ int mode_valid = 0; @@ -1980,12 +1985,11 @@ static int __devinit rivafb_probe(struct pci_dev *pd, default_par = info->par; default_par->pdev = pd; - info->pixmap.addr = kmalloc(8 * 1024, GFP_KERNEL); + info->pixmap.addr = kzalloc(8 * 1024, GFP_KERNEL); if (info->pixmap.addr == NULL) { ret = -ENOMEM; goto err_framebuffer_release; } - memset(info->pixmap.addr, 0, 8 * 1024); ret = pci_enable_device(pd); if (ret < 0) { @@ -1999,6 +2003,7 @@ static int __devinit rivafb_probe(struct pci_dev *pd, goto err_disable_device; } + mutex_init(&default_par->open_lock); default_par->riva.Architecture = riva_get_arch(pd); default_par->Chipset = (pd->vendor << 16) | pd->device; diff --git a/drivers/video/riva/rivafb.h b/drivers/video/riva/rivafb.h index 7fa13fc9c41..48ead6d72f2 100644 --- a/drivers/video/riva/rivafb.h +++ b/drivers/video/riva/rivafb.h @@ -53,7 +53,8 @@ struct riva_par { #ifdef CONFIG_X86 struct vgastate state; #endif - atomic_t ref_count; + struct mutex open_lock; + unsigned int ref_count; unsigned char *EDID; unsigned int Chipset; int forceCRTC; diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c new file mode 100644 index 00000000000..3162c37b144 --- /dev/null +++ b/drivers/video/s3fb.c @@ -0,0 +1,1180 @@ +/* + * linux/drivers/video/s3fb.c -- Frame buffer device driver for S3 Trio/Virge + * + * Copyright (c) 2006-2007 Ondrej Zajicek <santiago@crfreenet.org> + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive for + * more details. + * + * Code is based on David Boucher's viafb (http://davesdomain.org.uk/viafb/) + * which is based on the code of neofb. + */ + +#include <linux/version.h> +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/string.h> +#include <linux/mm.h> +#include <linux/tty.h> +#include <linux/slab.h> +#include <linux/delay.h> +#include <linux/fb.h> +#include <linux/svga.h> +#include <linux/init.h> +#include <linux/pci.h> +#include <linux/console.h> /* Why should fb driver call console functions? because acquire_console_sem() */ +#include <video/vga.h> + +#ifdef CONFIG_MTRR +#include <asm/mtrr.h> +#endif + +struct s3fb_info { + int chip, rev, mclk_freq; + int mtrr_reg; + struct vgastate state; + struct mutex open_lock; + unsigned int ref_count; + u32 pseudo_palette[16]; +}; + + +/* ------------------------------------------------------------------------- */ + +static const struct svga_fb_format s3fb_formats[] = { + { 0, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, + FB_TYPE_TEXT, FB_AUX_TEXT_SVGA_STEP4, FB_VISUAL_PSEUDOCOLOR, 8, 16}, + { 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, + FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 8, 16}, + { 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 1, + FB_TYPE_INTERLEAVED_PLANES, 1, FB_VISUAL_PSEUDOCOLOR, 8, 16}, + { 8, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, + FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 4, 8}, + {16, {10, 5, 0}, {5, 5, 0}, {0, 5, 0}, {0, 0, 0}, 0, + FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 2, 4}, + {16, {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, 0, + FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 2, 4}, + {24, {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {0, 0, 0}, 0, + FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 1, 2}, + {32, {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {0, 0, 0}, 0, + FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 1, 2}, + SVGA_FORMAT_END +}; + + +static const struct svga_pll s3_pll = {3, 129, 3, 33, 0, 3, + 60000, 240000, 14318}; + +static const int s3_memsizes[] = {4096, 0, 3072, 8192, 2048, 6144, 1024, 512}; + +static const char * const s3_names[] = {"S3 Unknown", "S3 Trio32", "S3 Trio64", "S3 Trio64V+", + "S3 Trio64UV+", "S3 Trio64V2/DX", "S3 Trio64V2/GX", + "S3 Plato/PX", "S3 Aurora64VP", "S3 Virge", + "S3 Virge/VX", "S3 Virge/DX", "S3 Virge/GX", + "S3 Virge/GX2", "S3 Virge/GX2P", "S3 Virge/GX2P"}; + +#define CHIP_UNKNOWN 0x00 +#define CHIP_732_TRIO32 0x01 +#define CHIP_764_TRIO64 0x02 +#define CHIP_765_TRIO64VP 0x03 +#define CHIP_767_TRIO64UVP 0x04 +#define CHIP_775_TRIO64V2_DX 0x05 +#define CHIP_785_TRIO64V2_GX 0x06 +#define CHIP_551_PLATO_PX 0x07 +#define CHIP_M65_AURORA64VP 0x08 +#define CHIP_325_VIRGE 0x09 +#define CHIP_988_VIRGE_VX 0x0A +#define CHIP_375_VIRGE_DX 0x0B +#define CHIP_385_VIRGE_GX 0x0C +#define CHIP_356_VIRGE_GX2 0x0D +#define CHIP_357_VIRGE_GX2P 0x0E +#define CHIP_359_VIRGE_GX2P 0x0F + +#define CHIP_XXX_TRIO 0x80 +#define CHIP_XXX_TRIO64V2_DXGX 0x81 +#define CHIP_XXX_VIRGE_DXGX 0x82 + +#define CHIP_UNDECIDED_FLAG 0x80 +#define CHIP_MASK 0xFF + +/* CRT timing register sets */ + +static const struct vga_regset s3_h_total_regs[] = {{0x00, 0, 7}, {0x5D, 0, 0}, VGA_REGSET_END}; +static const struct vga_regset s3_h_display_regs[] = {{0x01, 0, 7}, {0x5D, 1, 1}, VGA_REGSET_END}; +static const struct vga_regset s3_h_blank_start_regs[] = {{0x02, 0, 7}, {0x5D, 2, 2}, VGA_REGSET_END}; +static const struct vga_regset s3_h_blank_end_regs[] = {{0x03, 0, 4}, {0x05, 7, 7}, VGA_REGSET_END}; +static const struct vga_regset s3_h_sync_start_regs[] = {{0x04, 0, 7}, {0x5D, 4, 4}, VGA_REGSET_END}; +static const struct vga_regset s3_h_sync_end_regs[] = {{0x05, 0, 4}, VGA_REGSET_END}; + +static const struct vga_regset s3_v_total_regs[] = {{0x06, 0, 7}, {0x07, 0, 0}, {0x07, 5, 5}, {0x5E, 0, 0}, VGA_REGSET_END}; +static const struct vga_regset s3_v_display_regs[] = {{0x12, 0, 7}, {0x07, 1, 1}, {0x07, 6, 6}, {0x5E, 1, 1}, VGA_REGSET_END}; +static const struct vga_regset s3_v_blank_start_regs[] = {{0x15, 0, 7}, {0x07, 3, 3}, {0x09, 5, 5}, {0x5E, 2, 2}, VGA_REGSET_END}; +static const struct vga_regset s3_v_blank_end_regs[] = {{0x16, 0, 7}, VGA_REGSET_END}; +static const struct vga_regset s3_v_sync_start_regs[] = {{0x10, 0, 7}, {0x07, 2, 2}, {0x07, 7, 7}, {0x5E, 4, 4}, VGA_REGSET_END}; +static const struct vga_regset s3_v_sync_end_regs[] = {{0x11, 0, 3}, VGA_REGSET_END}; + +static const struct vga_regset s3_line_compare_regs[] = {{0x18, 0, 7}, {0x07, 4, 4}, {0x09, 6, 6}, {0x5E, 6, 6}, VGA_REGSET_END}; +static const struct vga_regset s3_start_address_regs[] = {{0x0d, 0, 7}, {0x0c, 0, 7}, {0x31, 4, 5}, {0x51, 0, 1}, VGA_REGSET_END}; +static const struct vga_regset s3_offset_regs[] = {{0x13, 0, 7}, {0x51, 4, 5}, VGA_REGSET_END}; /* set 0x43 bit 2 to 0 */ + +static const struct svga_timing_regs s3_timing_regs = { + s3_h_total_regs, s3_h_display_regs, s3_h_blank_start_regs, + s3_h_blank_end_regs, s3_h_sync_start_regs, s3_h_sync_end_regs, + s3_v_total_regs, s3_v_display_regs, s3_v_blank_start_regs, + s3_v_blank_end_regs, s3_v_sync_start_regs, s3_v_sync_end_regs, +}; + + +/* ------------------------------------------------------------------------- */ + +/* Module parameters */ + + +static char *mode = "640x480-8@60"; + +#ifdef CONFIG_MTRR +static int mtrr = 1; +#endif + +static int fasttext = 1; + + +MODULE_AUTHOR("(c) 2006-2007 Ondrej Zajicek <santiago@crfreenet.org>"); +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("fbdev driver for S3 Trio/Virge"); + +module_param(mode, charp, 0444); +MODULE_PARM_DESC(mode, "Default video mode ('640x480-8@60', etc)"); + +#ifdef CONFIG_MTRR +module_param(mtrr, int, 0444); +MODULE_PARM_DESC(mtrr, "Enable write-combining with MTRR (1=enable, 0=disable, default=1)"); +#endif + +module_param(fasttext, int, 0644); +MODULE_PARM_DESC(fasttext, "Enable S3 fast text mode (1=enable, 0=disable, default=1)"); + + +/* ------------------------------------------------------------------------- */ + +/* Set font in S3 fast text mode */ + +static void s3fb_settile_fast(struct fb_info *info, struct fb_tilemap *map) +{ + const u8 *font = map->data; + u8* fb = (u8 *) info->screen_base; + int i, c; + + if ((map->width != 8) || (map->height != 16) || + (map->depth != 1) || (map->length != 256)) { + printk(KERN_ERR "fb%d: unsupported font parameters: width %d, height %d, depth %d, length %d\n", + info->node, map->width, map->height, map->depth, map->length); + return; + } + + fb += 2; + for (i = 0; i < map->height; i++) { + for (c = 0; c < map->length; c++) { + fb[c * 4] = font[c * map->height + i]; + } + fb += 1024; + } +} + + + +static struct fb_tile_ops s3fb_tile_ops = { + .fb_settile = svga_settile, + .fb_tilecopy = svga_tilecopy, + .fb_tilefill = svga_tilefill, + .fb_tileblit = svga_tileblit, + .fb_tilecursor = svga_tilecursor, +}; + +static struct fb_tile_ops s3fb_fast_tile_ops = { + .fb_settile = s3fb_settile_fast, + .fb_tilecopy = svga_tilecopy, + .fb_tilefill = svga_tilefill, + .fb_tileblit = svga_tileblit, + .fb_tilecursor = svga_tilecursor, +}; + + +/* ------------------------------------------------------------------------- */ + +/* image data is MSB-first, fb structure is MSB-first too */ +static inline u32 expand_color(u32 c) +{ + return ((c & 1) | ((c & 2) << 7) | ((c & 4) << 14) | ((c & 8) << 21)) * 0xFF; +} + +/* s3fb_iplan_imageblit silently assumes that almost everything is 8-pixel aligned */ +static void s3fb_iplan_imageblit(struct fb_info *info, const struct fb_image *image) +{ + u32 fg = expand_color(image->fg_color); + u32 bg = expand_color(image->bg_color); + const u8 *src1, *src; + u8 __iomem *dst1; + u32 __iomem *dst; + u32 val; + int x, y; + + src1 = image->data; + dst1 = info->screen_base + (image->dy * info->fix.line_length) + + ((image->dx / 8) * 4); + + for (y = 0; y < image->height; y++) { + src = src1; + dst = (u32 __iomem *) dst1; + for (x = 0; x < image->width; x += 8) { + val = *(src++) * 0x01010101; + val = (val & fg) | (~val & bg); + fb_writel(val, dst++); + } + src1 += image->width / 8; + dst1 += info->fix.line_length; + } + +} + +/* s3fb_iplan_fillrect silently assumes that almost everything is 8-pixel aligned */ +static void s3fb_iplan_fillrect(struct fb_info *info, const struct fb_fillrect *rect) +{ + u32 fg = expand_color(rect->color); + u8 __iomem *dst1; + u32 __iomem *dst; + int x, y; + + dst1 = info->screen_base + (rect->dy * info->fix.line_length) + + ((rect->dx / 8) * 4); + + for (y = 0; y < rect->height; y++) { + dst = (u32 __iomem *) dst1; + for (x = 0; x < rect->width; x += 8) { + fb_writel(fg, dst++); + } + dst1 += info->fix.line_length; + } +} + + +/* image data is MSB-first, fb structure is high-nibble-in-low-byte-first */ +static inline u32 expand_pixel(u32 c) +{ + return (((c & 1) << 24) | ((c & 2) << 27) | ((c & 4) << 14) | ((c & 8) << 17) | + ((c & 16) << 4) | ((c & 32) << 7) | ((c & 64) >> 6) | ((c & 128) >> 3)) * 0xF; +} + +/* s3fb_cfb4_imageblit silently assumes that almost everything is 8-pixel aligned */ +static void s3fb_cfb4_imageblit(struct fb_info *info, const struct fb_image *image) +{ + u32 fg = image->fg_color * 0x11111111; + u32 bg = image->bg_color * 0x11111111; + const u8 *src1, *src; + u8 __iomem *dst1; + u32 __iomem *dst; + u32 val; + int x, y; + + src1 = image->data; + dst1 = info->screen_base + (image->dy * info->fix.line_length) + + ((image->dx / 8) * 4); + + for (y = 0; y < image->height; y++) { + src = src1; + dst = (u32 __iomem *) dst1; + for (x = 0; x < image->width; x += 8) { + val = expand_pixel(*(src++)); + val = (val & fg) | (~val & bg); + fb_writel(val, dst++); + } + src1 += image->width / 8; + dst1 += info->fix.line_length; + } +} + +static void s3fb_imageblit(struct fb_info *info, const struct fb_image *image) +{ + if ((info->var.bits_per_pixel == 4) && (image->depth == 1) + && ((image->width % 8) == 0) && ((image->dx % 8) == 0)) { + if (info->fix.type == FB_TYPE_INTERLEAVED_PLANES) + s3fb_iplan_imageblit(info, image); + else + s3fb_cfb4_imageblit(info, image); + } else + cfb_imageblit(info, image); +} + +static void s3fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect) +{ + if ((info->var.bits_per_pixel == 4) + && ((rect->width % 8) == 0) && ((rect->dx % 8) == 0) + && (info->fix.type == FB_TYPE_INTERLEAVED_PLANES)) + s3fb_iplan_fillrect(info, rect); + else + cfb_fillrect(info, rect); +} + + + +/* ------------------------------------------------------------------------- */ + + +static void s3_set_pixclock(struct fb_info *info, u32 pixclock) +{ + u16 m, n, r; + u8 regval; + + svga_compute_pll(&s3_pll, 1000000000 / pixclock, &m, &n, &r, info->node); + + /* Set VGA misc register */ + regval = vga_r(NULL, VGA_MIS_R); + vga_w(NULL, VGA_MIS_W, regval | VGA_MIS_ENB_PLL_LOAD); + + /* Set S3 clock registers */ + vga_wseq(NULL, 0x12, ((n - 2) | (r << 5))); + vga_wseq(NULL, 0x13, m - 2); + + udelay(1000); + + /* Activate clock - write 0, 1, 0 to seq/15 bit 5 */ + regval = vga_rseq (NULL, 0x15); /* | 0x80; */ + vga_wseq(NULL, 0x15, regval & ~(1<<5)); + vga_wseq(NULL, 0x15, regval | (1<<5)); + vga_wseq(NULL, 0x15, regval & ~(1<<5)); +} + + +/* Open framebuffer */ + +static int s3fb_open(struct fb_info *info, int user) +{ + struct s3fb_info *par = info->par; + + mutex_lock(&(par->open_lock)); + if (par->ref_count == 0) { + memset(&(par->state), 0, sizeof(struct vgastate)); + par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS | VGA_SAVE_CMAP; + par->state.num_crtc = 0x70; + par->state.num_seq = 0x20; + save_vga(&(par->state)); + } + + par->ref_count++; + mutex_unlock(&(par->open_lock)); + + return 0; +} + +/* Close framebuffer */ + +static int s3fb_release(struct fb_info *info, int user) +{ + struct s3fb_info *par = info->par; + + mutex_lock(&(par->open_lock)); + if (par->ref_count == 0) { + mutex_unlock(&(par->open_lock)); + return -EINVAL; + } + + if (par->ref_count == 1) + restore_vga(&(par->state)); + + par->ref_count--; + mutex_unlock(&(par->open_lock)); + + return 0; +} + +/* Validate passed in var */ + +static int s3fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) +{ + struct s3fb_info *par = info->par; + int rv, mem, step; + + /* Find appropriate format */ + rv = svga_match_format (s3fb_formats, var, NULL); + if ((rv < 0) || ((par->chip == CHIP_988_VIRGE_VX) ? (rv == 7) : (rv == 6))) + { /* 24bpp on VIRGE VX, 32bpp on others */ + printk(KERN_ERR "fb%d: unsupported mode requested\n", info->node); + return rv; + } + + /* Do not allow to have real resoulution larger than virtual */ + if (var->xres > var->xres_virtual) + var->xres_virtual = var->xres; + + if (var->yres > var->yres_virtual) + var->yres_virtual = var->yres; + + /* Round up xres_virtual to have proper alignment of lines */ + step = s3fb_formats[rv].xresstep - 1; + var->xres_virtual = (var->xres_virtual+step) & ~step; + + /* Check whether have enough memory */ + mem = ((var->bits_per_pixel * var->xres_virtual) >> 3) * var->yres_virtual; + if (mem > info->screen_size) + { + printk(KERN_ERR "fb%d: not enough framebuffer memory (%d kB requested , %d kB available)\n", + info->node, mem >> 10, (unsigned int) (info->screen_size >> 10)); + return -EINVAL; + } + + rv = svga_check_timings (&s3_timing_regs, var, info->node); + if (rv < 0) + { + printk(KERN_ERR "fb%d: invalid timings requested\n", info->node); + return rv; + } + + return 0; +} + +/* Set video mode from par */ + +static int s3fb_set_par(struct fb_info *info) +{ + struct s3fb_info *par = info->par; + u32 value, mode, hmul, offset_value, screen_size, multiplex; + u32 bpp = info->var.bits_per_pixel; + + if (bpp != 0) { + info->fix.ypanstep = 1; + info->fix.line_length = (info->var.xres_virtual * bpp) / 8; + + info->flags &= ~FBINFO_MISC_TILEBLITTING; + info->tileops = NULL; + + offset_value = (info->var.xres_virtual * bpp) / 64; + screen_size = info->var.yres_virtual * info->fix.line_length; + } else { + info->fix.ypanstep = 16; + info->fix.line_length = 0; + + info->flags |= FBINFO_MISC_TILEBLITTING; + info->tileops = fasttext ? &s3fb_fast_tile_ops : &s3fb_tile_ops; + + offset_value = info->var.xres_virtual / 16; + screen_size = (info->var.xres_virtual * info->var.yres_virtual) / 64; + } + + info->var.xoffset = 0; + info->var.yoffset = 0; + info->var.activate = FB_ACTIVATE_NOW; + + /* Unlock registers */ + vga_wcrt(NULL, 0x38, 0x48); + vga_wcrt(NULL, 0x39, 0xA5); + vga_wseq(NULL, 0x08, 0x06); + svga_wcrt_mask(0x11, 0x00, 0x80); + + /* Blank screen and turn off sync */ + svga_wseq_mask(0x01, 0x20, 0x20); + svga_wcrt_mask(0x17, 0x00, 0x80); + + /* Set default values */ + svga_set_default_gfx_regs(); + svga_set_default_atc_regs(); + svga_set_default_seq_regs(); + svga_set_default_crt_regs(); + svga_wcrt_multi(s3_line_compare_regs, 0xFFFFFFFF); + svga_wcrt_multi(s3_start_address_regs, 0); + + /* S3 specific initialization */ + svga_wcrt_mask(0x58, 0x10, 0x10); /* enable linear framebuffer */ + svga_wcrt_mask(0x31, 0x08, 0x08); /* enable sequencer access to framebuffer above 256 kB */ + +/* svga_wcrt_mask(0x33, 0x08, 0x08); */ /* DDR ? */ +/* svga_wcrt_mask(0x43, 0x01, 0x01); */ /* DDR ? */ + svga_wcrt_mask(0x33, 0x00, 0x08); /* no DDR ? */ + svga_wcrt_mask(0x43, 0x00, 0x01); /* no DDR ? */ + + svga_wcrt_mask(0x5D, 0x00, 0x28); // Clear strange HSlen bits + +/* svga_wcrt_mask(0x58, 0x03, 0x03); */ + +/* svga_wcrt_mask(0x53, 0x12, 0x13); */ /* enable MMIO */ +/* svga_wcrt_mask(0x40, 0x08, 0x08); */ /* enable write buffer */ + + + /* Set the offset register */ + pr_debug("fb%d: offset register : %d\n", info->node, offset_value); + svga_wcrt_multi(s3_offset_regs, offset_value); + + vga_wcrt(NULL, 0x54, 0x18); /* M parameter */ + vga_wcrt(NULL, 0x60, 0xff); /* N parameter */ + vga_wcrt(NULL, 0x61, 0xff); /* L parameter */ + vga_wcrt(NULL, 0x62, 0xff); /* L parameter */ + + vga_wcrt(NULL, 0x3A, 0x35); + svga_wattr(0x33, 0x00); + + if (info->var.vmode & FB_VMODE_DOUBLE) + svga_wcrt_mask(0x09, 0x80, 0x80); + else + svga_wcrt_mask(0x09, 0x00, 0x80); + + if (info->var.vmode & FB_VMODE_INTERLACED) + svga_wcrt_mask(0x42, 0x20, 0x20); + else + svga_wcrt_mask(0x42, 0x00, 0x20); + + /* Disable hardware graphics cursor */ + svga_wcrt_mask(0x45, 0x00, 0x01); + /* Disable Streams engine */ + svga_wcrt_mask(0x67, 0x00, 0x0C); + + mode = svga_match_format(s3fb_formats, &(info->var), &(info->fix)); + + /* S3 virge DX hack */ + if (par->chip == CHIP_375_VIRGE_DX) { + vga_wcrt(NULL, 0x86, 0x80); + vga_wcrt(NULL, 0x90, 0x00); + } + + /* S3 virge VX hack */ + if (par->chip == CHIP_988_VIRGE_VX) { + vga_wcrt(NULL, 0x50, 0x00); + vga_wcrt(NULL, 0x67, 0x50); + + vga_wcrt(NULL, 0x63, (mode <= 2) ? 0x90 : 0x09); + vga_wcrt(NULL, 0x66, 0x90); + } + + svga_wcrt_mask(0x31, 0x00, 0x40); + multiplex = 0; + hmul = 1; + + /* Set mode-specific register values */ + switch (mode) { + case 0: + pr_debug("fb%d: text mode\n", info->node); + svga_set_textmode_vga_regs(); + + /* Set additional registers like in 8-bit mode */ + svga_wcrt_mask(0x50, 0x00, 0x30); + svga_wcrt_mask(0x67, 0x00, 0xF0); + + /* Disable enhanced mode */ + svga_wcrt_mask(0x3A, 0x00, 0x30); + + if (fasttext) { + pr_debug("fb%d: high speed text mode set\n", info->node); + svga_wcrt_mask(0x31, 0x40, 0x40); + } + break; + case 1: + pr_debug("fb%d: 4 bit pseudocolor\n", info->node); + vga_wgfx(NULL, VGA_GFX_MODE, 0x40); + + /* Set additional registers like in 8-bit mode */ + svga_wcrt_mask(0x50, 0x00, 0x30); + svga_wcrt_mask(0x67, 0x00, 0xF0); + + /* disable enhanced mode */ + svga_wcrt_mask(0x3A, 0x00, 0x30); + break; + case 2: + pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node); + + /* Set additional registers like in 8-bit mode */ + svga_wcrt_mask(0x50, 0x00, 0x30); + svga_wcrt_mask(0x67, 0x00, 0xF0); + + /* disable enhanced mode */ + svga_wcrt_mask(0x3A, 0x00, 0x30); + break; + case 3: + pr_debug("fb%d: 8 bit pseudocolor\n", info->node); + if (info->var.pixclock > 20000) { + svga_wcrt_mask(0x50, 0x00, 0x30); + svga_wcrt_mask(0x67, 0x00, 0xF0); + } else { + svga_wcrt_mask(0x50, 0x00, 0x30); + svga_wcrt_mask(0x67, 0x10, 0xF0); + multiplex = 1; + } + break; + case 4: + pr_debug("fb%d: 5/5/5 truecolor\n", info->node); + if (par->chip == CHIP_988_VIRGE_VX) { + if (info->var.pixclock > 20000) + svga_wcrt_mask(0x67, 0x20, 0xF0); + else + svga_wcrt_mask(0x67, 0x30, 0xF0); + } else { + svga_wcrt_mask(0x50, 0x10, 0x30); + svga_wcrt_mask(0x67, 0x30, 0xF0); + hmul = 2; + } + break; + case 5: + pr_debug("fb%d: 5/6/5 truecolor\n", info->node); + if (par->chip == CHIP_988_VIRGE_VX) { + if (info->var.pixclock > 20000) + svga_wcrt_mask(0x67, 0x40, 0xF0); + else + svga_wcrt_mask(0x67, 0x50, 0xF0); + } else { + svga_wcrt_mask(0x50, 0x10, 0x30); + svga_wcrt_mask(0x67, 0x50, 0xF0); + hmul = 2; + } + break; + case 6: + /* VIRGE VX case */ + pr_debug("fb%d: 8/8/8 truecolor\n", info->node); + svga_wcrt_mask(0x67, 0xD0, 0xF0); + break; + case 7: + pr_debug("fb%d: 8/8/8/8 truecolor\n", info->node); + svga_wcrt_mask(0x50, 0x30, 0x30); + svga_wcrt_mask(0x67, 0xD0, 0xF0); + break; + default: + printk(KERN_ERR "fb%d: unsupported mode - bug\n", info->node); + return -EINVAL; + } + + if (par->chip != CHIP_988_VIRGE_VX) { + svga_wseq_mask(0x15, multiplex ? 0x10 : 0x00, 0x10); + svga_wseq_mask(0x18, multiplex ? 0x80 : 0x00, 0x80); + } + + s3_set_pixclock(info, info->var.pixclock); + svga_set_timings(&s3_timing_regs, &(info->var), hmul, 1, + (info->var.vmode & FB_VMODE_DOUBLE) ? 2 : 1, + (info->var.vmode & FB_VMODE_INTERLACED) ? 2 : 1, + hmul, info->node); + + /* Set interlaced mode start/end register */ + value = info->var.xres + info->var.left_margin + info->var.right_margin + info->var.hsync_len; + value = ((value * hmul) / 8) - 5; + vga_wcrt(NULL, 0x3C, (value + 1) / 2); + + memset((u8*)info->screen_base, 0x00, screen_size); + /* Device and screen back on */ + svga_wcrt_mask(0x17, 0x80, 0x80); + svga_wseq_mask(0x01, 0x00, 0x20); + + return 0; +} + +/* Set a colour register */ + +static int s3fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, + u_int transp, struct fb_info *fb) +{ + switch (fb->var.bits_per_pixel) { + case 0: + case 4: + if (regno >= 16) + return -EINVAL; + + if ((fb->var.bits_per_pixel == 4) && + (fb->var.nonstd == 0)) { + outb(0xF0, VGA_PEL_MSK); + outb(regno*16, VGA_PEL_IW); + } else { + outb(0x0F, VGA_PEL_MSK); + outb(regno, VGA_PEL_IW); + } + outb(red >> 10, VGA_PEL_D); + outb(green >> 10, VGA_PEL_D); + outb(blue >> 10, VGA_PEL_D); + break; + case 8: + if (regno >= 256) + return -EINVAL; + + outb(0xFF, VGA_PEL_MSK); + outb(regno, VGA_PEL_IW); + outb(red >> 10, VGA_PEL_D); + outb(green >> 10, VGA_PEL_D); + outb(blue >> 10, VGA_PEL_D); + break; + case 16: + if (regno >= 16) + return -EINVAL; + + if (fb->var.green.length == 5) + ((u32*)fb->pseudo_palette)[regno] = ((red & 0xF800) >> 1) | + ((green & 0xF800) >> 6) | ((blue & 0xF800) >> 11); + else if (fb->var.green.length == 6) + ((u32*)fb->pseudo_palette)[regno] = (red & 0xF800) | + ((green & 0xFC00) >> 5) | ((blue & 0xF800) >> 11); + else return -EINVAL; + break; + case 24: + case 32: + if (regno >= 16) + return -EINVAL; + + ((u32*)fb->pseudo_palette)[regno] = ((transp & 0xFF00) << 16) | ((red & 0xFF00) << 8) | + (green & 0xFF00) | ((blue & 0xFF00) >> 8); + break; + default: + return -EINVAL; + } + + return 0; +} + + +/* Set the display blanking state */ + +static int s3fb_blank(int blank_mode, struct fb_info *info) +{ + switch (blank_mode) { + case FB_BLANK_UNBLANK: + pr_debug("fb%d: unblank\n", info->node); + svga_wcrt_mask(0x56, 0x00, 0x06); + svga_wseq_mask(0x01, 0x00, 0x20); + break; + case FB_BLANK_NORMAL: + pr_debug("fb%d: blank\n", info->node); + svga_wcrt_mask(0x56, 0x00, 0x06); + svga_wseq_mask(0x01, 0x20, 0x20); + break; + case FB_BLANK_HSYNC_SUSPEND: + pr_debug("fb%d: hsync\n", info->node); + svga_wcrt_mask(0x56, 0x02, 0x06); + svga_wseq_mask(0x01, 0x20, 0x20); + break; + case FB_BLANK_VSYNC_SUSPEND: + pr_debug("fb%d: vsync\n", info->node); + svga_wcrt_mask(0x56, 0x04, 0x06); + svga_wseq_mask(0x01, 0x20, 0x20); + break; + case FB_BLANK_POWERDOWN: + pr_debug("fb%d: sync down\n", info->node); + svga_wcrt_mask(0x56, 0x06, 0x06); + svga_wseq_mask(0x01, 0x20, 0x20); + break; + } + + return 0; +} + + +/* Pan the display */ + +static int s3fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) { + + unsigned int offset; + + /* Validate the offsets */ + if ((var->xoffset + var->xres) > var->xres_virtual) + return -EINVAL; + if ((var->yoffset + var->yres) > var->yres_virtual) + return -EINVAL; + + /* Calculate the offset */ + if (var->bits_per_pixel == 0) { + offset = (var->yoffset / 16) * (var->xres_virtual / 2) + (var->xoffset / 2); + offset = offset >> 2; + } else { + offset = (var->yoffset * info->fix.line_length) + + (var->xoffset * var->bits_per_pixel / 8); + offset = offset >> 2; + } + + /* Set the offset */ + svga_wcrt_multi(s3_start_address_regs, offset); + + return 0; +} + +/* ------------------------------------------------------------------------- */ + +/* Frame buffer operations */ + +static struct fb_ops s3fb_ops = { + .owner = THIS_MODULE, + .fb_open = s3fb_open, + .fb_release = s3fb_release, + .fb_check_var = s3fb_check_var, + .fb_set_par = s3fb_set_par, + .fb_setcolreg = s3fb_setcolreg, + .fb_blank = s3fb_blank, + .fb_pan_display = s3fb_pan_display, + .fb_fillrect = s3fb_fillrect, + .fb_copyarea = cfb_copyarea, + .fb_imageblit = s3fb_imageblit, +}; + +/* ------------------------------------------------------------------------- */ + +static int __devinit s3_identification(int chip) +{ + if (chip == CHIP_XXX_TRIO) { + u8 cr30 = vga_rcrt(NULL, 0x30); + u8 cr2e = vga_rcrt(NULL, 0x2e); + u8 cr2f = vga_rcrt(NULL, 0x2f); + + if ((cr30 == 0xE0) || (cr30 == 0xE1)) { + if (cr2e == 0x10) + return CHIP_732_TRIO32; + if (cr2e == 0x11) { + if (! (cr2f & 0x40)) + return CHIP_764_TRIO64; + else + return CHIP_765_TRIO64VP; + } + } + } + + if (chip == CHIP_XXX_TRIO64V2_DXGX) { + u8 cr6f = vga_rcrt(NULL, 0x6f); + + if (! (cr6f & 0x01)) + return CHIP_775_TRIO64V2_DX; + else + return CHIP_785_TRIO64V2_GX; + } + + if (chip == CHIP_XXX_VIRGE_DXGX) { + u8 cr6f = vga_rcrt(NULL, 0x6f); + + if (! (cr6f & 0x01)) + return CHIP_375_VIRGE_DX; + else + return CHIP_385_VIRGE_GX; + } + + return CHIP_UNKNOWN; +} + + +/* PCI probe */ + +static int __devinit s3_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) +{ + struct fb_info *info; + struct s3fb_info *par; + int rc; + u8 regval, cr38, cr39; + + /* Ignore secondary VGA device because there is no VGA arbitration */ + if (! svga_primary_device(dev)) { + dev_info(&(dev->dev), "ignoring secondary device\n"); + return -ENODEV; + } + + /* Allocate and fill driver data structure */ + info = framebuffer_alloc(sizeof(struct s3fb_info), NULL); + if (!info) { + dev_err(&(dev->dev), "cannot allocate memory\n"); + return -ENOMEM; + } + + par = info->par; + mutex_init(&par->open_lock); + + info->flags = FBINFO_PARTIAL_PAN_OK | FBINFO_HWACCEL_YPAN; + info->fbops = &s3fb_ops; + + /* Prepare PCI device */ + rc = pci_enable_device(dev); + if (rc < 0) { + dev_err(&(dev->dev), "cannot enable PCI device\n"); + goto err_enable_device; + } + + rc = pci_request_regions(dev, "s3fb"); + if (rc < 0) { + dev_err(&(dev->dev), "cannot reserve framebuffer region\n"); + goto err_request_regions; + } + + + info->fix.smem_start = pci_resource_start(dev, 0); + info->fix.smem_len = pci_resource_len(dev, 0); + + /* Map physical IO memory address into kernel space */ + info->screen_base = pci_iomap(dev, 0, 0); + if (! info->screen_base) { + rc = -ENOMEM; + dev_err(&(dev->dev), "iomap for framebuffer failed\n"); + goto err_iomap; + } + + /* Unlock regs */ + cr38 = vga_rcrt(NULL, 0x38); + cr39 = vga_rcrt(NULL, 0x39); + vga_wseq(NULL, 0x08, 0x06); + vga_wcrt(NULL, 0x38, 0x48); + vga_wcrt(NULL, 0x39, 0xA5); + + /* Find how many physical memory there is on card */ + /* 0x36 register is accessible even if other registers are locked */ + regval = vga_rcrt(NULL, 0x36); + info->screen_size = s3_memsizes[regval >> 5] << 10; + info->fix.smem_len = info->screen_size; + + par->chip = id->driver_data & CHIP_MASK; + par->rev = vga_rcrt(NULL, 0x2f); + if (par->chip & CHIP_UNDECIDED_FLAG) + par->chip = s3_identification(par->chip); + + /* Find MCLK frequency */ + regval = vga_rseq(NULL, 0x10); + par->mclk_freq = ((vga_rseq(NULL, 0x11) + 2) * 14318) / ((regval & 0x1F) + 2); + par->mclk_freq = par->mclk_freq >> (regval >> 5); + + /* Restore locks */ + vga_wcrt(NULL, 0x38, cr38); + vga_wcrt(NULL, 0x39, cr39); + + strcpy(info->fix.id, s3_names [par->chip]); + info->fix.mmio_start = 0; + info->fix.mmio_len = 0; + info->fix.type = FB_TYPE_PACKED_PIXELS; + info->fix.visual = FB_VISUAL_PSEUDOCOLOR; + info->fix.ypanstep = 0; + info->fix.accel = FB_ACCEL_NONE; + info->pseudo_palette = (void*) (par->pseudo_palette); + + /* Prepare startup mode */ + rc = fb_find_mode(&(info->var), info, mode, NULL, 0, NULL, 8); + if (! ((rc == 1) || (rc == 2))) { + rc = -EINVAL; + dev_err(&(dev->dev), "mode %s not found\n", mode); + goto err_find_mode; + } + + rc = fb_alloc_cmap(&info->cmap, 256, 0); + if (rc < 0) { + dev_err(&(dev->dev), "cannot allocate colormap\n"); + goto err_alloc_cmap; + } + + rc = register_framebuffer(info); + if (rc < 0) { + dev_err(&(dev->dev), "cannot register framebuffer\n"); + goto err_reg_fb; + } + + printk(KERN_INFO "fb%d: %s on %s, %d MB RAM, %d MHz MCLK\n", info->node, info->fix.id, + pci_name(dev), info->fix.smem_len >> 20, (par->mclk_freq + 500) / 1000); + + if (par->chip == CHIP_UNKNOWN) + printk(KERN_INFO "fb%d: unknown chip, CR2D=%x, CR2E=%x, CRT2F=%x, CRT30=%x\n", + info->node, vga_rcrt(NULL, 0x2d), vga_rcrt(NULL, 0x2e), + vga_rcrt(NULL, 0x2f), vga_rcrt(NULL, 0x30)); + + /* Record a reference to the driver data */ + pci_set_drvdata(dev, info); + +#ifdef CONFIG_MTRR + if (mtrr) { + par->mtrr_reg = -1; + par->mtrr_reg = mtrr_add(info->fix.smem_start, info->fix.smem_len, MTRR_TYPE_WRCOMB, 1); + } +#endif + + return 0; + + /* Error handling */ +err_reg_fb: + fb_dealloc_cmap(&info->cmap); +err_alloc_cmap: +err_find_mode: + pci_iounmap(dev, info->screen_base); +err_iomap: + pci_release_regions(dev); +err_request_regions: +/* pci_disable_device(dev); */ +err_enable_device: + framebuffer_release(info); + return rc; +} + + +/* PCI remove */ + +static void __devexit s3_pci_remove(struct pci_dev *dev) +{ + struct fb_info *info = pci_get_drvdata(dev); + struct s3fb_info *par = info->par; + + if (info) { + +#ifdef CONFIG_MTRR + if (par->mtrr_reg >= 0) { + mtrr_del(par->mtrr_reg, 0, 0); + par->mtrr_reg = -1; + } +#endif + + unregister_framebuffer(info); + fb_dealloc_cmap(&info->cmap); + + pci_iounmap(dev, info->screen_base); + pci_release_regions(dev); +/* pci_disable_device(dev); */ + + pci_set_drvdata(dev, NULL); + framebuffer_release(info); + } +} + +/* PCI suspend */ + +static int s3_pci_suspend(struct pci_dev* dev, pm_message_t state) +{ + struct fb_info *info = pci_get_drvdata(dev); + struct s3fb_info *par = info->par; + + dev_info(&(dev->dev), "suspend\n"); + + acquire_console_sem(); + mutex_lock(&(par->open_lock)); + + if ((state.event == PM_EVENT_FREEZE) || (par->ref_count == 0)) { + mutex_unlock(&(par->open_lock)); + release_console_sem(); + return 0; + } + + fb_set_suspend(info, 1); + + pci_save_state(dev); + pci_disable_device(dev); + pci_set_power_state(dev, pci_choose_state(dev, state)); + + mutex_unlock(&(par->open_lock)); + release_console_sem(); + + return 0; +} + + +/* PCI resume */ + +static int s3_pci_resume(struct pci_dev* dev) +{ + struct fb_info *info = pci_get_drvdata(dev); + struct s3fb_info *par = info->par; + + dev_info(&(dev->dev), "resume\n"); + + acquire_console_sem(); + mutex_lock(&(par->open_lock)); + + if (par->ref_count == 0) { + mutex_unlock(&(par->open_lock)); + release_console_sem(); + return 0; + } + + pci_set_power_state(dev, PCI_D0); + pci_restore_state(dev); + pci_enable_device(dev); + pci_set_master(dev); + + s3fb_set_par(info); + fb_set_suspend(info, 0); + + mutex_unlock(&(par->open_lock)); + release_console_sem(); + + return 0; +} + + +/* List of boards that we are trying to support */ + +static struct pci_device_id s3_devices[] __devinitdata = { + {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8810), .driver_data = CHIP_XXX_TRIO}, + {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8811), .driver_data = CHIP_XXX_TRIO}, + {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8812), .driver_data = CHIP_M65_AURORA64VP}, + {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8814), .driver_data = CHIP_767_TRIO64UVP}, + {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8901), .driver_data = CHIP_XXX_TRIO64V2_DXGX}, + {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8902), .driver_data = CHIP_551_PLATO_PX}, + + {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x5631), .driver_data = CHIP_325_VIRGE}, + {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x883D), .driver_data = CHIP_988_VIRGE_VX}, + {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8A01), .driver_data = CHIP_XXX_VIRGE_DXGX}, + {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8A10), .driver_data = CHIP_356_VIRGE_GX2}, + {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8A11), .driver_data = CHIP_357_VIRGE_GX2P}, + {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8A12), .driver_data = CHIP_359_VIRGE_GX2P}, + + {0, 0, 0, 0, 0, 0, 0} +}; + + +MODULE_DEVICE_TABLE(pci, s3_devices); + +static struct pci_driver s3fb_pci_driver = { + .name = "s3fb", + .id_table = s3_devices, + .probe = s3_pci_probe, + .remove = __devexit_p(s3_pci_remove), + .suspend = s3_pci_suspend, + .resume = s3_pci_resume, +}; + +/* Parse user speficied options */ + +#ifndef MODULE +static int __init s3fb_setup(char *options) +{ + char *opt; + + if (!options || !*options) + return 0; + + while ((opt = strsep(&options, ",")) != NULL) { + + if (!*opt) + continue; +#ifdef CONFIG_MTRR + else if (!strcmp(opt, "mtrr:")) + mtrr = simple_strtoul(opt + 5, NULL, 0); +#endif + else if (!strcmp(opt, "fasttext:")) + mtrr = simple_strtoul(opt + 9, NULL, 0); + else + mode = opt; + } + + return 0; +} +#endif + +/* Cleanup */ + +static void __exit s3fb_cleanup(void) +{ + pr_debug("s3fb: cleaning up\n"); + pci_unregister_driver(&s3fb_pci_driver); +} + +/* Driver Initialisation */ + +static int __init s3fb_init(void) +{ + +#ifndef MODULE + char *option = NULL; + + if (fb_get_options("s3fb", &option)) + return -ENODEV; + s3fb_setup(option); +#endif + + pr_debug("s3fb: initializing\n"); + return pci_register_driver(&s3fb_pci_driver); +} + +/* ------------------------------------------------------------------------- */ + +/* Modularization */ + +module_init(s3fb_init); +module_exit(s3fb_cleanup); diff --git a/drivers/video/sa1100fb.h b/drivers/video/sa1100fb.h index 0b07f6ae336..48066ef3af0 100644 --- a/drivers/video/sa1100fb.h +++ b/drivers/video/sa1100fb.h @@ -110,9 +110,7 @@ struct sa1100fb_info { #endif }; -#define __type_entry(ptr,type,member) ((type *)((char *)(ptr)-offsetof(type,member))) - -#define TO_INF(ptr,member) __type_entry(ptr,struct sa1100fb_info,member) +#define TO_INF(ptr,member) container_of(ptr,struct sa1100fb_info,member) #define SA1100_PALETTE_MODE_VAL(bpp) (((bpp) & 0x018) << 9) diff --git a/drivers/video/savage/savagefb_driver.c b/drivers/video/savage/savagefb_driver.c index 82b3deaae02..4afa30522fd 100644 --- a/drivers/video/savage/savagefb_driver.c +++ b/drivers/video/savage/savagefb_driver.c @@ -833,7 +833,8 @@ static void savage_set_default_par(struct savagefb_par *par, vga_out8(0x3d5, cr66, par); } -static void savage_update_var(struct fb_var_screeninfo *var, struct fb_videomode *modedb) +static void savage_update_var(struct fb_var_screeninfo *var, + const struct fb_videomode *modedb) { var->xres = var->xres_virtual = modedb->xres; var->yres = modedb->yres; @@ -902,7 +903,7 @@ static int savagefb_check_var(struct fb_var_screeninfo *var, } if (!mode_valid) { - struct fb_videomode *mode; + const struct fb_videomode *mode; mode = fb_find_best_mode(var, &info->modelist); if (mode) { @@ -2206,11 +2207,10 @@ static int __devinit savagefb_probe(struct pci_dev* dev, info->monspecs.modedb, info->monspecs.modedb_len, NULL, 8); } else if (info->monspecs.modedb != NULL) { - struct fb_videomode *modedb; + const struct fb_videomode *mode; - modedb = fb_find_best_display(&info->monspecs, - &info->modelist); - savage_update_var(&info->var, modedb); + mode = fb_find_best_display(&info->monspecs, &info->modelist); + savage_update_var(&info->var, mode); } /* maximize virtual vertical length */ diff --git a/drivers/video/sis/init.c b/drivers/video/sis/init.c index 2ab3868efde..c311ad3c368 100644 --- a/drivers/video/sis/init.c +++ b/drivers/video/sis/init.c @@ -317,23 +317,23 @@ InitTo310Pointer(struct SiS_Private *SiS_Pr) } #endif -BOOLEAN +bool SiSInitPtr(struct SiS_Private *SiS_Pr) { if(SiS_Pr->ChipType < SIS_315H) { #ifdef SIS300 InitTo300Pointer(SiS_Pr); #else - return FALSE; + return false; #endif } else { #ifdef SIS315H InitTo310Pointer(SiS_Pr); #else - return FALSE; + return false; #endif } - return TRUE; + return true; } /*********************************************/ @@ -345,7 +345,7 @@ static #endif unsigned short SiS_GetModeID(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, - int Depth, BOOLEAN FSTN, int LCDwidth, int LCDheight) + int Depth, bool FSTN, int LCDwidth, int LCDheight) { unsigned short ModeIndex = 0; @@ -483,7 +483,7 @@ SiS_GetModeID(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, - int Depth, BOOLEAN FSTN, unsigned short CustomT, int LCDwidth, int LCDheight, + int Depth, bool FSTN, unsigned short CustomT, int LCDwidth, int LCDheight, unsigned int VBFlags2) { unsigned short ModeIndex = 0; @@ -873,7 +873,7 @@ SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDispl break; } - return SiS_GetModeID(VGAEngine, 0, HDisplay, VDisplay, Depth, FALSE, 0, 0); + return SiS_GetModeID(VGAEngine, 0, HDisplay, VDisplay, Depth, false, 0, 0); } @@ -1020,12 +1020,12 @@ SiS_GetSysFlags(struct SiS_Private *SiS_Pr) /* 661 and newer: NEVER write non-zero to SR11[7:4] */ /* (SR11 is used for DDC and in enable/disablebridge) */ - SiS_Pr->SiS_SensibleSR11 = FALSE; + SiS_Pr->SiS_SensibleSR11 = false; SiS_Pr->SiS_MyCR63 = 0x63; if(SiS_Pr->ChipType >= SIS_330) { SiS_Pr->SiS_MyCR63 = 0x53; if(SiS_Pr->ChipType >= SIS_661) { - SiS_Pr->SiS_SensibleSR11 = TRUE; + SiS_Pr->SiS_SensibleSR11 = true; } } @@ -1253,7 +1253,7 @@ SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo, /* HELPER: Determine ROM usage */ /*********************************************/ -BOOLEAN +bool SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr) { unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; @@ -1261,16 +1261,16 @@ SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr) if(SiS_Pr->ChipType >= XGI_20) { /* XGI ROMs don't qualify */ - return FALSE; + return false; } else if(SiS_Pr->ChipType >= SIS_761) { /* I very much assume 761, 340 and newer will use new layout */ - return TRUE; + return true; } else if(SiS_Pr->ChipType >= SIS_661) { if((ROMAddr[0x1a] == 'N') && (ROMAddr[0x1b] == 'e') && (ROMAddr[0x1c] == 'w') && (ROMAddr[0x1d] == 'V')) { - return TRUE; + return true; } romversoffs = ROMAddr[0x16] | (ROMAddr[0x17] << 8); if(romversoffs) { @@ -1280,17 +1280,17 @@ SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr) } } if((romvmaj != 0) || (romvmin >= 92)) { - return TRUE; + return true; } } else if(IS_SIS650740) { if((ROMAddr[0x1a] == 'N') && (ROMAddr[0x1b] == 'e') && (ROMAddr[0x1c] == 'w') && (ROMAddr[0x1d] == 'V')) { - return TRUE; + return true; } } - return FALSE; + return false; } static void @@ -1299,8 +1299,8 @@ SiSDetermineROMUsage(struct SiS_Private *SiS_Pr) unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; unsigned short romptr = 0; - SiS_Pr->SiS_UseROM = FALSE; - SiS_Pr->SiS_ROMNew = FALSE; + SiS_Pr->SiS_UseROM = false; + SiS_Pr->SiS_ROMNew = false; SiS_Pr->SiS_PWDOffset = 0; if(SiS_Pr->ChipType >= XGI_20) return; @@ -1312,15 +1312,15 @@ SiSDetermineROMUsage(struct SiS_Private *SiS_Pr) * of the BIOS image. */ if((ROMAddr[3] == 0xe9) && ((ROMAddr[5] << 8) | ROMAddr[4]) > 0x21a) - SiS_Pr->SiS_UseROM = TRUE; + SiS_Pr->SiS_UseROM = true; } else if(SiS_Pr->ChipType < SIS_315H) { /* Sony's VAIO BIOS 1.09 follows the standard, so perhaps * the others do as well */ - SiS_Pr->SiS_UseROM = TRUE; + SiS_Pr->SiS_UseROM = true; } else { /* 315/330 series stick to the standard(s) */ - SiS_Pr->SiS_UseROM = TRUE; + SiS_Pr->SiS_UseROM = true; if((SiS_Pr->SiS_ROMNew = SiSDetermineROMLayout661(SiS_Pr))) { SiS_Pr->SiS_EMIOffset = 14; SiS_Pr->SiS_PWDOffset = 17; @@ -1488,7 +1488,7 @@ SiS_GetVBType(struct SiS_Private *SiS_Pr) /*********************************************/ #ifdef SIS_LINUX_KERNEL -static BOOLEAN +static bool SiS_CheckMemorySize(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex) { @@ -1496,10 +1496,10 @@ SiS_CheckMemorySize(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex); unsigned short memorysize = ((modeflag & MemoryInfoFlag) >> MemorySizeShift) + 1; - if(!AdapterMemSize) return TRUE; + if(!AdapterMemSize) return true; - if(AdapterMemSize < memorysize) return FALSE; - return TRUE; + if(AdapterMemSize < memorysize) return false; + return true; } #endif @@ -1605,7 +1605,7 @@ SiS_ClearBuffer(struct SiS_Private *SiS_Pr, unsigned short ModeNo) /* HELPER: SearchModeID */ /*********************************************/ -BOOLEAN +bool SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo, unsigned short *ModeIdIndex) { @@ -1617,7 +1617,7 @@ SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo, for((*ModeIdIndex) = 0; ;(*ModeIdIndex)++) { if(SiS_Pr->SiS_SModeIDTable[(*ModeIdIndex)].St_ModeID == (*ModeNo)) break; - if(SiS_Pr->SiS_SModeIDTable[(*ModeIdIndex)].St_ModeID == 0xFF) return FALSE; + if(SiS_Pr->SiS_SModeIDTable[(*ModeIdIndex)].St_ModeID == 0xFF) return false; } if((*ModeNo) == 0x07) { @@ -1635,11 +1635,11 @@ SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo, for((*ModeIdIndex) = 0; ;(*ModeIdIndex)++) { if(SiS_Pr->SiS_EModeIDTable[(*ModeIdIndex)].Ext_ModeID == (*ModeNo)) break; - if(SiS_Pr->SiS_EModeIDTable[(*ModeIdIndex)].Ext_ModeID == 0xFF) return FALSE; + if(SiS_Pr->SiS_EModeIDTable[(*ModeIdIndex)].Ext_ModeID == 0xFF) return false; } } - return TRUE; + return true; } /*********************************************/ @@ -1696,13 +1696,13 @@ SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide /* HELPER: LowModeTests */ /*********************************************/ -static BOOLEAN +static bool SiS_DoLowModeTest(struct SiS_Private *SiS_Pr, unsigned short ModeNo) { unsigned short temp, temp1, temp2; if((ModeNo != 0x03) && (ModeNo != 0x10) && (ModeNo != 0x12)) - return TRUE; + return true; temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x11); SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x11,0x80); temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00); @@ -1712,13 +1712,13 @@ SiS_DoLowModeTest(struct SiS_Private *SiS_Pr, unsigned short ModeNo) SiS_SetReg(SiS_Pr->SiS_P3d4,0x11,temp); if((SiS_Pr->ChipType >= SIS_315H) || (SiS_Pr->ChipType == SIS_300)) { - if(temp2 == 0x55) return FALSE; - else return TRUE; + if(temp2 == 0x55) return false; + else return true; } else { - if(temp2 != 0x55) return TRUE; + if(temp2 != 0x55) return true; else { SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01); - return FALSE; + return false; } } } @@ -3237,14 +3237,14 @@ static void SiS_SetPitch(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn) { SISPtr pSiS = SISPTR(pScrn); - BOOLEAN isslavemode = FALSE; + bool isslavemode = false; if( (pSiS->VBFlags2 & VB2_VIDEOBRIDGE) && ( ((pSiS->VGAEngine == SIS_300_VGA) && (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0xa0) == 0x20) || ((pSiS->VGAEngine == SIS_315_VGA) && (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x50) == 0x10) ) ) { - isslavemode = TRUE; + isslavemode = true; } /* We need to set pitch for CRT1 if bridge is in slave mode, too */ @@ -3264,10 +3264,10 @@ SiS_SetPitch(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn) #ifdef SIS_XORG_XF86 /* We need pScrn for setting the pitch correctly */ -BOOLEAN -SiSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, unsigned short ModeNo, BOOLEAN dosetpitch) +bool +SiSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, unsigned short ModeNo, bool dosetpitch) #else -BOOLEAN +bool SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo) #endif { @@ -3277,8 +3277,8 @@ SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo) #ifdef SIS_LINUX_KERNEL unsigned short KeepLockReg; - SiS_Pr->UseCustomMode = FALSE; - SiS_Pr->CRT1UsesCustomMode = FALSE; + SiS_Pr->UseCustomMode = false; + SiS_Pr->CRT1UsesCustomMode = false; #endif SiS_Pr->SiS_flag_clearbuffer = 0; @@ -3317,7 +3317,7 @@ SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo) SiS_UnLockCRT2(SiS_Pr); if(!SiS_Pr->UseCustomMode) { - if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE; + if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return false; } else { ModeIdIndex = 0; } @@ -3347,18 +3347,18 @@ SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo) #ifdef SIS_LINUX_KERNEL /* Check memory size (kernel framebuffer driver only) */ if(!SiS_CheckMemorySize(SiS_Pr, ModeNo, ModeIdIndex)) { - return FALSE; + return false; } #endif SiS_OpenCRTC(SiS_Pr); if(SiS_Pr->UseCustomMode) { - SiS_Pr->CRT1UsesCustomMode = TRUE; + SiS_Pr->CRT1UsesCustomMode = true; SiS_Pr->CSRClock_CRT1 = SiS_Pr->CSRClock; SiS_Pr->CModeFlag_CRT1 = SiS_Pr->CModeFlag; } else { - SiS_Pr->CRT1UsesCustomMode = FALSE; + SiS_Pr->CRT1UsesCustomMode = false; } /* Set mode on CRT1 */ @@ -3445,7 +3445,7 @@ SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo) if(KeepLockReg != 0xA1) SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x00); #endif - return TRUE; + return true; } /*********************************************/ @@ -3454,14 +3454,14 @@ SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo) /*********************************************/ #ifdef SIS_XORG_XF86 -BOOLEAN +bool SiSBIOSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, - DisplayModePtr mode, BOOLEAN IsCustom) + DisplayModePtr mode, bool IsCustom) { SISPtr pSiS = SISPTR(pScrn); unsigned short ModeNo = 0; - SiS_Pr->UseCustomMode = FALSE; + SiS_Pr->UseCustomMode = false; if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) { @@ -3475,13 +3475,13 @@ SiSBIOSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, /* Don't need vbflags here; checks done earlier */ ModeNo = SiS_GetModeNumber(pScrn, mode, pSiS->VBFlags); - if(!ModeNo) return FALSE; + if(!ModeNo) return false; xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting standard mode 0x%x\n", ModeNo); } - return(SiSSetMode(SiS_Pr, pScrn, ModeNo, TRUE)); + return(SiSSetMode(SiS_Pr, pScrn, ModeNo, true)); } /*********************************************/ @@ -3489,9 +3489,9 @@ SiSBIOSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, /* for Dual-Head modes */ /*********************************************/ -BOOLEAN +bool SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, - DisplayModePtr mode, BOOLEAN IsCustom) + DisplayModePtr mode, bool IsCustom) { SISIOADDRESS BaseAddr = SiS_Pr->IOAddress; SISPtr pSiS = SISPTR(pScrn); @@ -3502,7 +3502,7 @@ SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, unsigned short ModeNo = 0; unsigned char backupreg = 0; - SiS_Pr->UseCustomMode = FALSE; + SiS_Pr->UseCustomMode = false; /* Remember: Custom modes for CRT2 are ONLY supported * -) on the 30x/B/C, and @@ -3516,7 +3516,7 @@ SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, } else { ModeNo = SiS_GetModeNumber(pScrn, mode, pSiS->VBFlags); - if(!ModeNo) return FALSE; + if(!ModeNo) return false; } @@ -3550,10 +3550,10 @@ SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, if(pSiSEnt->CRT1ModeNo == -1) { xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting CRT2 mode delayed until after setting CRT1 mode\n"); - return TRUE; + return true; } #endif - pSiSEnt->CRT2ModeSet = TRUE; + pSiSEnt->CRT2ModeSet = true; } #endif @@ -3578,7 +3578,7 @@ SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, SiS_UnLockCRT2(SiS_Pr); if(!SiS_Pr->UseCustomMode) { - if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE; + if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return false; } else { ModeIdIndex = 0; } @@ -3658,7 +3658,7 @@ SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, SiS_Handle760(SiS_Pr); - return TRUE; + return true; } /*********************************************/ @@ -3666,9 +3666,9 @@ SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, /* for Dual-Head modes */ /*********************************************/ -BOOLEAN +bool SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, - DisplayModePtr mode, BOOLEAN IsCustom) + DisplayModePtr mode, bool IsCustom) { SISIOADDRESS BaseAddr = SiS_Pr->IOAddress; SISPtr pSiS = SISPTR(pScrn); @@ -3677,10 +3677,10 @@ SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, #ifdef SISDUALHEAD SISEntPtr pSiSEnt = pSiS->entityPrivate; unsigned char backupcr30, backupcr31, backupcr38, backupcr35, backupp40d=0; - BOOLEAN backupcustom; + bool backupcustom; #endif - SiS_Pr->UseCustomMode = FALSE; + SiS_Pr->UseCustomMode = false; if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) { @@ -3697,7 +3697,7 @@ SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, } else { ModeNo = SiS_GetModeNumber(pScrn, mode, 0); /* don't give VBFlags */ - if(!ModeNo) return FALSE; + if(!ModeNo) return false; xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting standard mode 0x%x on CRT1\n", ModeNo); @@ -3721,7 +3721,7 @@ SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, SiS_UnLockCRT2(SiS_Pr); if(!SiS_Pr->UseCustomMode) { - if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE; + if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return false; } else { ModeIdIndex = 0; } @@ -3771,11 +3771,11 @@ SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, #endif if(SiS_Pr->UseCustomMode) { - SiS_Pr->CRT1UsesCustomMode = TRUE; + SiS_Pr->CRT1UsesCustomMode = true; SiS_Pr->CSRClock_CRT1 = SiS_Pr->CSRClock; SiS_Pr->CModeFlag_CRT1 = SiS_Pr->CModeFlag; } else { - SiS_Pr->CRT1UsesCustomMode = FALSE; + SiS_Pr->CRT1UsesCustomMode = false; } /* Reset CRT2 if changing mode on CRT1 */ @@ -3838,7 +3838,7 @@ SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, /* Backup/Set ModeNo in BIOS scratch area */ SiS_GetSetModeID(pScrn,ModeNo); - return TRUE; + return true; } #endif /* Linux_XF86 */ @@ -4082,7 +4082,7 @@ SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, DisplayModePtr current #endif #ifdef SIS_LINUX_KERNEL - struct fb_var_screeninfo *var, BOOLEAN writeres + struct fb_var_screeninfo *var, bool writeres #endif ) { diff --git a/drivers/video/sis/init.h b/drivers/video/sis/init.h index 59d12844b4d..f40a680df86 100644 --- a/drivers/video/sis/init.h +++ b/drivers/video/sis/init.h @@ -1521,13 +1521,13 @@ static const struct SiS_LVDSCRT1Data SiS_LVDSCRT1640x480_1_H[] = 0x00}} }; -BOOLEAN SiSInitPtr(struct SiS_Private *SiS_Pr); +bool SiSInitPtr(struct SiS_Private *SiS_Pr); #ifdef SIS_XORG_XF86 unsigned short SiS_GetModeID(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, - int Depth, BOOLEAN FSTN, int LCDwith, int LCDheight); + int Depth, bool FSTN, int LCDwith, int LCDheight); #endif unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay, - int VDisplay, int Depth, BOOLEAN FSTN, + int VDisplay, int Depth, bool FSTN, unsigned short CustomT, int LCDwith, int LCDheight, unsigned int VBFlags2); unsigned short SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay, @@ -1558,12 +1558,12 @@ void SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable); void SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable); unsigned short SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex); -BOOLEAN SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr); +bool SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr); #ifndef SIS_LINUX_KERNEL void SiS_GetVBType(struct SiS_Private *SiS_Pr); #endif -BOOLEAN SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo, +bool SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo, unsigned short *ModeIdIndex); unsigned short SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex); @@ -1581,17 +1581,17 @@ unsigned short SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned shor #endif void SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex); #ifdef SIS_XORG_XF86 -BOOLEAN SiSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, unsigned short ModeNo, - BOOLEAN dosetpitch); -BOOLEAN SiSBIOSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, - DisplayModePtr mode, BOOLEAN IsCustom); -BOOLEAN SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, - DisplayModePtr mode, BOOLEAN IsCustom); -BOOLEAN SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, - DisplayModePtr mode, BOOLEAN IsCustom); +bool SiSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, unsigned short ModeNo, + bool dosetpitch); +bool SiSBIOSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, + DisplayModePtr mode, bool IsCustom); +bool SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, + DisplayModePtr mode, bool IsCustom); +bool SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, + DisplayModePtr mode, bool IsCustom); #endif #ifdef SIS_LINUX_KERNEL -BOOLEAN SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo); +bool SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo); #endif void SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth); void SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo, @@ -1602,7 +1602,7 @@ void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdat #endif #ifdef SIS_LINUX_KERNEL void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, int xres, - int yres, struct fb_var_screeninfo *var, BOOLEAN writeres); + int yres, struct fb_var_screeninfo *var, bool writeres); #endif /* From init301.c: */ @@ -1615,7 +1615,7 @@ extern void SiS_SetTVMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex); extern void SiS_UnLockCRT2(struct SiS_Private *SiS_Pr); extern void SiS_DisableBridge(struct SiS_Private *); -extern BOOLEAN SiS_SetCRT2Group(struct SiS_Private *, unsigned short); +extern bool SiS_SetCRT2Group(struct SiS_Private *, unsigned short); extern unsigned short SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex); extern void SiS_WaitRetrace1(struct SiS_Private *SiS_Pr); @@ -1624,8 +1624,8 @@ extern unsigned short SiS_GetResInfo(struct SiS_Private *SiS_Pr, unsigned short extern unsigned short SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short tempax); extern unsigned short SiS_GetVCLK2Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex, unsigned short RRTI); -extern BOOLEAN SiS_IsVAMode(struct SiS_Private *); -extern BOOLEAN SiS_IsDualEdge(struct SiS_Private *); +extern bool SiS_IsVAMode(struct SiS_Private *); +extern bool SiS_IsDualEdge(struct SiS_Private *); #ifdef SIS_XORG_XF86 /* From other modules: */ diff --git a/drivers/video/sis/init301.c b/drivers/video/sis/init301.c index 47e1896cffe..da33d801c22 100644 --- a/drivers/video/sis/init301.c +++ b/drivers/video/sis/init301.c @@ -200,7 +200,7 @@ GetLCDStructPtr661_2(struct SiS_Private *SiS_Pr) /* Adjust Rate for CRT2 */ /*********************************************/ -static BOOLEAN +static bool SiS_AdjustCRT2Rate(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex, unsigned short RRTI, unsigned short *i) { @@ -269,7 +269,7 @@ SiS_AdjustCRT2Rate(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s /* Look backwards in table for matching CRT2 mode */ for(; SiS_Pr->SiS_RefIndex[RRTI + (*i)].ModeID == modeid; (*i)--) { infoflag = SiS_Pr->SiS_RefIndex[RRTI + (*i)].Ext_InfoFlag; - if(infoflag & checkmask) return TRUE; + if(infoflag & checkmask) return true; if((*i) == 0) break; } @@ -279,9 +279,9 @@ SiS_AdjustCRT2Rate(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s for((*i) = 0; ; (*i)++) { if(SiS_Pr->SiS_RefIndex[RRTI + (*i)].ModeID != modeid) break; infoflag = SiS_Pr->SiS_RefIndex[RRTI + (*i)].Ext_InfoFlag; - if(infoflag & checkmask) return TRUE; + if(infoflag & checkmask) return true; } - return FALSE; + return false; } /*********************************************/ @@ -405,7 +405,7 @@ SiS_SaveCRT2Info(struct SiS_Private *SiS_Pr, unsigned short ModeNo) /*********************************************/ #ifdef SIS300 -static BOOLEAN +static bool SiS_CR36BIOSWord23b(struct SiS_Private *SiS_Pr) { unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; @@ -415,13 +415,13 @@ SiS_CR36BIOSWord23b(struct SiS_Private *SiS_Pr) if((ROMAddr[0x233] == 0x12) && (ROMAddr[0x234] == 0x34)) { temp = 1 << ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) >> 4) & 0x0f); temp1 = SISGETROMW(0x23b); - if(temp1 & temp) return TRUE; + if(temp1 & temp) return true; } } - return FALSE; + return false; } -static BOOLEAN +static bool SiS_CR36BIOSWord23d(struct SiS_Private *SiS_Pr) { unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; @@ -431,10 +431,10 @@ SiS_CR36BIOSWord23d(struct SiS_Private *SiS_Pr) if((ROMAddr[0x233] == 0x12) && (ROMAddr[0x234] == 0x34)) { temp = 1 << ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) >> 4) & 0x0f); temp1 = SISGETROMW(0x23d); - if(temp1 & temp) return TRUE; + if(temp1 & temp) return true; } } - return FALSE; + return false; } #endif @@ -687,38 +687,38 @@ SiS_VBLongWait(struct SiS_Private *SiS_Pr) /*********************************************/ #ifdef SIS300 -static BOOLEAN +static bool SiS_Is301B(struct SiS_Private *SiS_Pr) { - if(SiS_GetReg(SiS_Pr->SiS_Part4Port,0x01) >= 0xb0) return TRUE; - return FALSE; + if(SiS_GetReg(SiS_Pr->SiS_Part4Port,0x01) >= 0xb0) return true; + return false; } #endif -static BOOLEAN +static bool SiS_CRT2IsLCD(struct SiS_Private *SiS_Pr) { if(SiS_Pr->ChipType == SIS_730) { - if(SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x20) return TRUE; + if(SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x20) return true; } - if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & 0x20) return TRUE; - return FALSE; + if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & 0x20) return true; + return false; } -BOOLEAN +bool SiS_IsDualEdge(struct SiS_Private *SiS_Pr) { #ifdef SIS315H if(SiS_Pr->ChipType >= SIS_315H) { if((SiS_Pr->ChipType != SIS_650) || (SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0)) { - if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & EnableDualEdge) return TRUE; + if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & EnableDualEdge) return true; } } #endif - return FALSE; + return false; } -BOOLEAN +bool SiS_IsVAMode(struct SiS_Private *SiS_Pr) { #ifdef SIS315H @@ -726,70 +726,70 @@ SiS_IsVAMode(struct SiS_Private *SiS_Pr) if(SiS_Pr->ChipType >= SIS_315H) { flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); - if((flag & EnableDualEdge) && (flag & SetToLCDA)) return TRUE; + if((flag & EnableDualEdge) && (flag & SetToLCDA)) return true; } #endif - return FALSE; + return false; } #ifdef SIS315H -static BOOLEAN +static bool SiS_IsVAorLCD(struct SiS_Private *SiS_Pr) { - if(SiS_IsVAMode(SiS_Pr)) return TRUE; - if(SiS_CRT2IsLCD(SiS_Pr)) return TRUE; - return FALSE; + if(SiS_IsVAMode(SiS_Pr)) return true; + if(SiS_CRT2IsLCD(SiS_Pr)) return true; + return false; } #endif -static BOOLEAN +static bool SiS_IsDualLink(struct SiS_Private *SiS_Pr) { #ifdef SIS315H if(SiS_Pr->ChipType >= SIS_315H) { if((SiS_CRT2IsLCD(SiS_Pr)) || (SiS_IsVAMode(SiS_Pr))) { - if(SiS_Pr->SiS_LCDInfo & LCDDualLink) return TRUE; + if(SiS_Pr->SiS_LCDInfo & LCDDualLink) return true; } } #endif - return FALSE; + return false; } #ifdef SIS315H -static BOOLEAN +static bool SiS_TVEnabled(struct SiS_Private *SiS_Pr) { - if((SiS_GetReg(SiS_Pr->SiS_Part2Port,0x00) & 0x0f) != 0x0c) return TRUE; + if((SiS_GetReg(SiS_Pr->SiS_Part2Port,0x00) & 0x0f) != 0x0c) return true; if(SiS_Pr->SiS_VBType & VB_SISYPBPR) { - if(SiS_GetReg(SiS_Pr->SiS_Part2Port,0x4d) & 0x10) return TRUE; + if(SiS_GetReg(SiS_Pr->SiS_Part2Port,0x4d) & 0x10) return true; } - return FALSE; + return false; } #endif #ifdef SIS315H -static BOOLEAN +static bool SiS_LCDAEnabled(struct SiS_Private *SiS_Pr) { - if(SiS_GetReg(SiS_Pr->SiS_Part1Port,0x13) & 0x04) return TRUE; - return FALSE; + if(SiS_GetReg(SiS_Pr->SiS_Part1Port,0x13) & 0x04) return true; + return false; } #endif #ifdef SIS315H -static BOOLEAN +static bool SiS_WeHaveBacklightCtrl(struct SiS_Private *SiS_Pr) { if((SiS_Pr->ChipType >= SIS_315H) && (SiS_Pr->ChipType < SIS_661)) { - if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x79) & 0x10) return TRUE; + if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x79) & 0x10) return true; } - return FALSE; + return false; } #endif #ifdef SIS315H -static BOOLEAN +static bool SiS_IsNotM650orLater(struct SiS_Private *SiS_Pr) { unsigned short flag; @@ -798,90 +798,90 @@ SiS_IsNotM650orLater(struct SiS_Private *SiS_Pr) flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0; /* Check for revision != A0 only */ if((flag == 0xe0) || (flag == 0xc0) || - (flag == 0xb0) || (flag == 0x90)) return FALSE; - } else if(SiS_Pr->ChipType >= SIS_661) return FALSE; - return TRUE; + (flag == 0xb0) || (flag == 0x90)) return false; + } else if(SiS_Pr->ChipType >= SIS_661) return false; + return true; } #endif #ifdef SIS315H -static BOOLEAN +static bool SiS_IsYPbPr(struct SiS_Private *SiS_Pr) { if(SiS_Pr->ChipType >= SIS_315H) { /* YPrPb = 0x08 */ - if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & EnableCHYPbPr) return TRUE; + if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & EnableCHYPbPr) return true; } - return FALSE; + return false; } #endif #ifdef SIS315H -static BOOLEAN +static bool SiS_IsChScart(struct SiS_Private *SiS_Pr) { if(SiS_Pr->ChipType >= SIS_315H) { /* Scart = 0x04 */ - if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & EnableCHScart) return TRUE; + if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & EnableCHScart) return true; } - return FALSE; + return false; } #endif #ifdef SIS315H -static BOOLEAN +static bool SiS_IsTVOrYPbPrOrScart(struct SiS_Private *SiS_Pr) { unsigned short flag; if(SiS_Pr->ChipType >= SIS_315H) { flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); - if(flag & SetCRT2ToTV) return TRUE; + if(flag & SetCRT2ToTV) return true; flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); - if(flag & EnableCHYPbPr) return TRUE; /* = YPrPb = 0x08 */ - if(flag & EnableCHScart) return TRUE; /* = Scart = 0x04 - TW */ + if(flag & EnableCHYPbPr) return true; /* = YPrPb = 0x08 */ + if(flag & EnableCHScart) return true; /* = Scart = 0x04 - TW */ } else { flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); - if(flag & SetCRT2ToTV) return TRUE; + if(flag & SetCRT2ToTV) return true; } - return FALSE; + return false; } #endif #ifdef SIS315H -static BOOLEAN +static bool SiS_IsLCDOrLCDA(struct SiS_Private *SiS_Pr) { unsigned short flag; if(SiS_Pr->ChipType >= SIS_315H) { flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); - if(flag & SetCRT2ToLCD) return TRUE; + if(flag & SetCRT2ToLCD) return true; flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); - if(flag & SetToLCDA) return TRUE; + if(flag & SetToLCDA) return true; } else { flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); - if(flag & SetCRT2ToLCD) return TRUE; + if(flag & SetCRT2ToLCD) return true; } - return FALSE; + return false; } #endif -static BOOLEAN +static bool SiS_HaveBridge(struct SiS_Private *SiS_Pr) { unsigned short flag; if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { - return TRUE; + return true; } else if(SiS_Pr->SiS_VBType & VB_SISVB) { flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00); - if((flag == 1) || (flag == 2)) return TRUE; + if((flag == 1) || (flag == 2)) return true; } - return FALSE; + return false; } -static BOOLEAN +static bool SiS_BridgeIsEnabled(struct SiS_Private *SiS_Pr) { unsigned short flag; @@ -890,23 +890,23 @@ SiS_BridgeIsEnabled(struct SiS_Private *SiS_Pr) flag = SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00); if(SiS_Pr->ChipType < SIS_315H) { flag &= 0xa0; - if((flag == 0x80) || (flag == 0x20)) return TRUE; + if((flag == 0x80) || (flag == 0x20)) return true; } else { flag &= 0x50; - if((flag == 0x40) || (flag == 0x10)) return TRUE; + if((flag == 0x40) || (flag == 0x10)) return true; } } - return FALSE; + return false; } -static BOOLEAN +static bool SiS_BridgeInSlavemode(struct SiS_Private *SiS_Pr) { unsigned short flag1; flag1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x31); - if(flag1 & (SetInSlaveMode >> 8)) return TRUE; - return FALSE; + if(flag1 & (SetInSlaveMode >> 8)) return true; + return false; } /*********************************************/ @@ -1461,11 +1461,11 @@ SiS_GetLCDInfoBIOS(struct SiS_Private *SiS_Pr) if((ROMAddr = GetLCDStructPtr661(SiS_Pr))) { if((temp = SISGETROMW(6)) != SiS_Pr->PanelHT) { - SiS_Pr->SiS_NeedRomModeData = TRUE; + SiS_Pr->SiS_NeedRomModeData = true; SiS_Pr->PanelHT = temp; } if((temp = SISGETROMW(8)) != SiS_Pr->PanelVT) { - SiS_Pr->SiS_NeedRomModeData = TRUE; + SiS_Pr->SiS_NeedRomModeData = true; SiS_Pr->PanelVT = temp; } SiS_Pr->PanelHRS = SISGETROMW(10); @@ -1516,7 +1516,7 @@ void SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex) { unsigned short temp,modeflag,resinfo=0,modexres=0,modeyres=0; - BOOLEAN panelcanscale = FALSE; + bool panelcanscale = false; #ifdef SIS300 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; static const unsigned char SiS300SeriesLCDRes[] = @@ -1534,10 +1534,10 @@ SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned sh SiS_Pr->PanelHRE = 999; /* HSync end */ SiS_Pr->PanelVRS = 999; /* VSync start */ SiS_Pr->PanelVRE = 999; /* VSync end */ - SiS_Pr->SiS_NeedRomModeData = FALSE; + SiS_Pr->SiS_NeedRomModeData = false; /* Alternative 1600x1200@60 timing for 1600x1200 LCDA */ - SiS_Pr->Alternate1600x1200 = FALSE; + SiS_Pr->Alternate1600x1200 = false; if(!(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA))) return; @@ -1633,7 +1633,7 @@ SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned sh SiS_Pr->SiS_LCDInfo |= DontExpandLCD; } - panelcanscale = (SiS_Pr->SiS_LCDInfo & DontExpandLCD) ? TRUE : FALSE; + panelcanscale = (bool)(SiS_Pr->SiS_LCDInfo & DontExpandLCD); if(!SiS_Pr->UsePanelScaler) SiS_Pr->SiS_LCDInfo &= ~DontExpandLCD; else if(SiS_Pr->UsePanelScaler == 1) SiS_Pr->SiS_LCDInfo |= DontExpandLCD; @@ -1833,7 +1833,7 @@ SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned sh SiS_Pr->PanelHRS = 48; SiS_Pr->PanelHRE = 32; SiS_Pr->PanelVRS = 2; SiS_Pr->PanelVRE = 4; SiS_Pr->PanelVCLKIdx315 = VCLK130_315; - SiS_Pr->Alternate1600x1200 = TRUE; + SiS_Pr->Alternate1600x1200 = true; } } else if(SiS_Pr->SiS_IF_DEF_LVDS) { SiS_Pr->PanelHT = 2048; SiS_Pr->PanelVT = 1320; @@ -3448,7 +3448,7 @@ SiS_GetCRT2Data301(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s } else { - BOOLEAN gotit = FALSE; + bool gotit = false; if((SiS_Pr->SiS_LCDInfo & DontExpandLCD) && (!(SiS_Pr->SiS_LCDInfo & LCDPass11))) { @@ -3456,7 +3456,7 @@ SiS_GetCRT2Data301(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s SiS_Pr->SiS_VGAVT = SiS_Pr->PanelVT; SiS_Pr->SiS_HT = SiS_Pr->PanelHT; SiS_Pr->SiS_VT = SiS_Pr->PanelVT; - gotit = TRUE; + gotit = true; } else if( (!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) && (romptr) && (ROMAddr) ) { @@ -3474,7 +3474,7 @@ SiS_GetCRT2Data301(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s if(ROMAddr[romptr+9] & 0x80) SiS_Pr->SiS_RVBHRS2 -= tempax; else SiS_Pr->SiS_RVBHRS2 += tempax; } - if(SiS_Pr->SiS_VGAHT) gotit = TRUE; + if(SiS_Pr->SiS_VGAHT) gotit = true; else { SiS_Pr->SiS_LCDInfo |= DontExpandLCD; SiS_Pr->SiS_LCDInfo &= ~LCDPass11; @@ -3485,7 +3485,7 @@ SiS_GetCRT2Data301(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s SiS_Pr->SiS_HT = SiS_Pr->PanelHT; SiS_Pr->SiS_VT = SiS_Pr->PanelVT; SiS_Pr->SiS_RVBHRS2 = 0; - gotit = TRUE; + gotit = true; } #endif @@ -3960,8 +3960,8 @@ SiS_DisableBridge(struct SiS_Private *SiS_Pr) #ifdef SIS315H /* 315 series */ int didpwd = 0; - BOOLEAN custom1 = ((SiS_Pr->SiS_CustomT == CUT_COMPAQ1280) || - (SiS_Pr->SiS_CustomT == CUT_CLEVO1400)) ? TRUE : FALSE; + bool custom1 = (SiS_Pr->SiS_CustomT == CUT_COMPAQ1280) || + (SiS_Pr->SiS_CustomT == CUT_CLEVO1400); modenum = SiS_GetReg(SiS_Pr->SiS_P3d4,0x34) & 0x7f; @@ -4313,7 +4313,7 @@ SiS_EnableBridge(struct SiS_Private *SiS_Pr) unsigned short temp=0, tempah; #ifdef SIS315H unsigned short temp1, pushax=0; - BOOLEAN delaylong = FALSE; + bool delaylong = false; #endif if(SiS_Pr->SiS_VBType & VB_SISVB) { @@ -4448,7 +4448,7 @@ SiS_EnableBridge(struct SiS_Private *SiS_Pr) if(!(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40)) { SiS_PanelDelayLoop(SiS_Pr, 3, 10); - delaylong = TRUE; + delaylong = true; } } @@ -4530,7 +4530,7 @@ SiS_EnableBridge(struct SiS_Private *SiS_Pr) SiS_Pr->EMI_33 = ROMAddr[romptr + SiS_Pr->SiS_EMIOffset + 2]; if(ROMAddr[romptr + 1] & 0x10) SiS_Pr->EMI_30 = 0x40; /* emidelay = SISGETROMW((romptr + 0x22)); */ - SiS_Pr->HaveEMI = SiS_Pr->HaveEMILCD = SiS_Pr->OverruleEMI = TRUE; + SiS_Pr->HaveEMI = SiS_Pr->HaveEMILCD = SiS_Pr->OverruleEMI = true; } } @@ -4644,7 +4644,7 @@ SiS_EnableBridge(struct SiS_Private *SiS_Pr) SiS_PanelDelayLoop(SiS_Pr, 3, 5); if(delaylong) { SiS_PanelDelayLoop(SiS_Pr, 3, 5); - delaylong = FALSE; + delaylong = false; } SiS_WaitVBRetrace(SiS_Pr); SiS_WaitVBRetrace(SiS_Pr); @@ -5454,7 +5454,7 @@ SiS_SetGroup1_LVDS(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s unsigned short modeflag, resinfo = 0; unsigned short push2, tempax, tempbx, tempcx, temp; unsigned int tempeax = 0, tempebx, tempecx, tempvcfact = 0; - BOOLEAN islvds = FALSE, issis = FALSE, chkdclkfirst = FALSE; + bool islvds = false, issis = false, chkdclkfirst = false; #ifdef SIS300 unsigned short crt2crtc = 0; #endif @@ -5480,17 +5480,17 @@ SiS_SetGroup1_LVDS(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s /* is lvds if really LVDS, or 301B-DH with external LVDS transmitter */ if((SiS_Pr->SiS_IF_DEF_LVDS == 1) || (SiS_Pr->SiS_VBType & VB_NoLCD)) { - islvds = TRUE; + islvds = true; } /* is really sis if sis bridge, but not 301B-DH */ if((SiS_Pr->SiS_VBType & VB_SISVB) && (!(SiS_Pr->SiS_VBType & VB_NoLCD))) { - issis = TRUE; + issis = true; } if((SiS_Pr->ChipType >= SIS_315H) && (islvds) && (!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA))) { if((!SiS_Pr->SiS_IF_DEF_FSTN) && (!SiS_Pr->SiS_IF_DEF_DSTN)) { - chkdclkfirst = TRUE; + chkdclkfirst = true; } } @@ -6447,13 +6447,13 @@ SiS_SetGroup2_C_ELV(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x4e,0xeb,temp); } -static BOOLEAN +static bool SiS_GetCRT2Part2Ptr(struct SiS_Private *SiS_Pr,unsigned short ModeNo,unsigned short ModeIdIndex, unsigned short RefreshRateTableIndex,unsigned short *CRT2Index, unsigned short *ResIndex) { - if(SiS_Pr->ChipType < SIS_315H) return FALSE; + if(SiS_Pr->ChipType < SIS_315H) return false; if(ModeNo <= 0x13) (*ResIndex) = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC; @@ -6688,7 +6688,7 @@ SiS_SetGroup2(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short unsigned short i, j, tempax, tempbx, tempcx, tempch, tempcl, temp; unsigned short push2, modeflag, crt2crtc, bridgeoffset; unsigned int longtemp, PhaseIndex; - BOOLEAN newtvphase; + bool newtvphase; const unsigned char *TimingPoint; #ifdef SIS315H unsigned short resindex, CRT2Index; @@ -6721,11 +6721,11 @@ SiS_SetGroup2(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short PhaseIndex = 0x01; /* SiS_PALPhase */ TimingPoint = SiS_Pr->SiS_PALTiming; - newtvphase = FALSE; + newtvphase = false; if( (SiS_Pr->SiS_VBType & VB_SIS30xBLV) && ( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) || (SiS_Pr->SiS_TVMode & TVSetTVSimuMode) ) ) { - newtvphase = TRUE; + newtvphase = true; } if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) { @@ -7754,13 +7754,13 @@ SiS_SetGroup5(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short /* MODIFY CRT1 GROUP FOR SLAVE MODE */ /*********************************************/ -static BOOLEAN +static bool SiS_GetLVDSCRT1Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex, unsigned short RefreshRateTableIndex, unsigned short *ResIndex, unsigned short *DisplayType) { unsigned short modeflag = 0; - BOOLEAN checkhd = TRUE; + bool checkhd = true; /* Pass 1:1 not supported here */ @@ -7792,7 +7792,7 @@ SiS_GetLVDSCRT1Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s (*DisplayType = 0); switch(SiS_Pr->SiS_LCDResInfo) { case Panel_320x240_1: (*DisplayType) = 50; - checkhd = FALSE; + checkhd = false; break; case Panel_320x240_2: (*DisplayType) = 14; break; @@ -7802,7 +7802,7 @@ SiS_GetLVDSCRT1Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s break; case Panel_1024x600: (*DisplayType) = 26; break; - default: return TRUE; + default: return true; } if(checkhd) { @@ -7815,7 +7815,7 @@ SiS_GetLVDSCRT1Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s } - return TRUE; + return true; } static void @@ -8654,7 +8654,7 @@ SiS_ChrontelDoSomething1(struct SiS_Private *SiS_Pr) /* MAIN: SET CRT2 REGISTER GROUP */ /*********************************************/ -BOOLEAN +bool SiS_SetCRT2Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo) { #ifdef SIS300 @@ -8690,7 +8690,7 @@ SiS_SetCRT2Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo) if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) { SiS_LockCRT2(SiS_Pr); SiS_DisplayOn(SiS_Pr); - return TRUE; + return true; } SiS_GetCRT2Data(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex); @@ -8828,7 +8828,7 @@ SiS_SetCRT2Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo) SiS_LockCRT2(SiS_Pr); } - return TRUE; + return true; } @@ -8908,7 +8908,7 @@ SiS_SetTrumpBlockLoop(struct SiS_Private *SiS_Pr, unsigned char *dataptr) return NULL; } -static BOOLEAN +static bool SiS_SetTrumpionBlock(struct SiS_Private *SiS_Pr, unsigned char *dataptr) { SiS_Pr->SiS_DDC_DeviceAddr = 0xF0; /* DAB (Device Address Byte) */ @@ -8921,14 +8921,14 @@ SiS_SetTrumpionBlock(struct SiS_Private *SiS_Pr, unsigned char *dataptr) while(*dataptr) { dataptr = SiS_SetTrumpBlockLoop(SiS_Pr, dataptr); - if(!dataptr) return FALSE; + if(!dataptr) return false; } #ifdef SIS_XORG_XF86 #ifdef TWDEBUG xf86DrvMsg(0, X_INFO, "Trumpion block success\n"); #endif #endif - return TRUE; + return true; } #endif @@ -8939,7 +8939,7 @@ SiS_SetTrumpionBlock(struct SiS_Private *SiS_Pr, unsigned char *dataptr) * 0x0a, possibly for working around the DDC problems */ -static BOOLEAN +static bool SiS_SetChReg(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val, unsigned short myor) { unsigned short temp, i; @@ -8958,9 +8958,9 @@ SiS_SetChReg(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val, if(temp) continue; /* (ERROR: no ack) */ if(SiS_SetStop(SiS_Pr)) continue; /* Set stop condition */ SiS_Pr->SiS_ChrontelInit = 1; - return TRUE; + return true; } - return FALSE; + return false; } /* Write to Chrontel 700x */ @@ -9119,7 +9119,7 @@ static #endif unsigned short SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags, int VGAEngine, - unsigned short adaptnum, unsigned short DDCdatatype, BOOLEAN checkcr32, + unsigned short adaptnum, unsigned short DDCdatatype, bool checkcr32, unsigned int VBFlags2) { unsigned char ddcdtype[] = { 0xa0, 0xa0, 0xa0, 0xa2, 0xa6 }; @@ -9287,7 +9287,7 @@ SiS_DoProbeDDC(struct SiS_Private *SiS_Pr) { unsigned char mask, value; unsigned short temp, ret=0; - BOOLEAN failed = FALSE; + bool failed = false; SiS_SetSwitchDDC2(SiS_Pr); if(SiS_PrepareDDC(SiS_Pr)) { @@ -9308,7 +9308,7 @@ SiS_DoProbeDDC(struct SiS_Private *SiS_Pr) mask = 0xff; value = 0xff; } else { - failed = TRUE; + failed = true; ret = 0xFFFF; #ifdef SIS_XORG_XF86 #ifdef TWDEBUG @@ -9317,7 +9317,7 @@ SiS_DoProbeDDC(struct SiS_Private *SiS_Pr) #endif } } - if(failed == FALSE) { + if(!failed) { temp = (unsigned char)SiS_ReadDDC2Data(SiS_Pr); SiS_SendACK(SiS_Pr, 1); temp &= mask; @@ -9431,7 +9431,7 @@ SiS_HandleDDC(struct SiS_Private *SiS_Pr, unsigned int VBFlags, int VGAEngine, if((!(VBFlags2 & VB2_VIDEOBRIDGE)) && (adaptnum > 0)) return 0xFFFF; - if(SiS_InitDDCRegs(SiS_Pr, VBFlags, VGAEngine, adaptnum, DDCdatatype, FALSE, VBFlags2) == 0xFFFF) + if(SiS_InitDDCRegs(SiS_Pr, VBFlags, VGAEngine, adaptnum, DDCdatatype, false, VBFlags2) == 0xFFFF) return 0xFFFF; sr1f = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1f); @@ -9829,7 +9829,7 @@ SetDelayComp(struct SiS_Private *SiS_Pr, unsigned short ModeNo) { unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; unsigned short delay=0,index,myindex,temp,romptr=0; - BOOLEAN dochiptest = TRUE; + bool dochiptest = true; if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x20,0xbf); @@ -9864,7 +9864,7 @@ SetDelayComp(struct SiS_Private *SiS_Pr, unsigned short ModeNo) } else if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD|SetCRT2ToLCDA)) { /* ---------- LCD/LCDA */ - BOOLEAN gotitfrompci = FALSE; + bool gotitfrompci = false; /* Could we detect a PDC for LCD or did we get a user-defined? If yes, use it */ @@ -9916,22 +9916,22 @@ SetDelayComp(struct SiS_Private *SiS_Pr, unsigned short ModeNo) case CUT_COMPAQ1280: case CUT_COMPAQ12802: if(SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) { - gotitfrompci = TRUE; - dochiptest = FALSE; + gotitfrompci = true; + dochiptest = false; delay = 0x03; } break; case CUT_CLEVO1400: case CUT_CLEVO14002: - gotitfrompci = TRUE; - dochiptest = FALSE; + gotitfrompci = true; + dochiptest = false; delay = 0x02; break; case CUT_CLEVO1024: case CUT_CLEVO10242: if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) { - gotitfrompci = TRUE; - dochiptest = FALSE; + gotitfrompci = true; + dochiptest = false; delay = 0x33; SiS_SetReg(SiS_Pr->SiS_Part1Port,0x2D,delay); delay &= 0x0f; @@ -10009,7 +10009,7 @@ SetDelayComp(struct SiS_Private *SiS_Pr, unsigned short ModeNo) if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2D,0x0F,((delay << 4) & 0xf0)); - dochiptest = FALSE; + dochiptest = false; } } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { /* ------------ TV */ @@ -10043,12 +10043,12 @@ SetDelayComp(struct SiS_Private *SiS_Pr, unsigned short ModeNo) case CUT_CLEVO1400: case CUT_CLEVO14002: delay = 0x02; - dochiptest = FALSE; + dochiptest = false; break; case CUT_CLEVO1024: case CUT_CLEVO10242: delay = 0x03; - dochiptest = FALSE; + dochiptest = false; break; default: delay = SiS310_TVDelayCompensation_651301LV[index]; @@ -10085,7 +10085,7 @@ SetDelayComp(struct SiS_Private *SiS_Pr, unsigned short ModeNo) if(SiS_LCDAEnabled(SiS_Pr)) { delay &= 0x0f; - dochiptest = FALSE; + dochiptest = false; } } else return; @@ -10728,7 +10728,7 @@ SiS_FinalizeLCD(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned shor SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1c,0x00); SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1d,0x1b); } - if((SiS_Pr->Backup == TRUE) && (SiS_Pr->Backup_Mode == ModeNo)) { + if(SiS_Pr->Backup && (SiS_Pr->Backup_Mode == ModeNo)) { SiS_SetReg(SiS_Pr->SiS_Part1Port,0x14,SiS_Pr->Backup_14); SiS_SetReg(SiS_Pr->SiS_Part1Port,0x15,SiS_Pr->Backup_15); SiS_SetReg(SiS_Pr->SiS_Part1Port,0x16,SiS_Pr->Backup_16); diff --git a/drivers/video/sis/init301.h b/drivers/video/sis/init301.h index 4f3a28699d3..7708e1e1d99 100644 --- a/drivers/video/sis/init301.h +++ b/drivers/video/sis/init301.h @@ -363,8 +363,8 @@ void SiS_LockCRT2(struct SiS_Private *SiS_Pr); void SiS_EnableCRT2(struct SiS_Private *SiS_Pr); unsigned short SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex); void SiS_WaitRetrace1(struct SiS_Private *SiS_Pr); -BOOLEAN SiS_IsDualEdge(struct SiS_Private *SiS_Pr); -BOOLEAN SiS_IsVAMode(struct SiS_Private *SiS_Pr); +bool SiS_IsDualEdge(struct SiS_Private *SiS_Pr); +bool SiS_IsVAMode(struct SiS_Private *SiS_Pr); void SiS_GetVBInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex, int checkcrt2mode); void SiS_SetYPbPr(struct SiS_Private *SiS_Pr); @@ -379,7 +379,7 @@ void SiS_DisableBridge(struct SiS_Private *SiS_Pr); #ifndef SIS_LINUX_KERNEL void SiS_EnableBridge(struct SiS_Private *SiS_Pr); #endif -BOOLEAN SiS_SetCRT2Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo); +bool SiS_SetCRT2Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo); void SiS_SiS30xBLOn(struct SiS_Private *SiS_Pr); void SiS_SiS30xBLOff(struct SiS_Private *SiS_Pr); @@ -403,7 +403,7 @@ void SiS_Chrontel701xBLOff(struct SiS_Private *SiS_Pr); #endif /* 315 */ #ifdef SIS300 -static BOOLEAN SiS_SetTrumpionBlock(struct SiS_Private *SiS_Pr, unsigned char *dataptr); +static bool SiS_SetTrumpionBlock(struct SiS_Private *SiS_Pr, unsigned char *dataptr); void SiS_SetChrontelGPIO(struct SiS_Private *SiS_Pr, unsigned short myvbinfo); #endif @@ -416,14 +416,14 @@ unsigned short SiS_HandleDDC(struct SiS_Private *SiS_Pr, unsigned int VBFlags, i #ifdef SIS_XORG_XF86 unsigned short SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags, int VGAEngine, unsigned short adaptnum, unsigned short DDCdatatype, - BOOLEAN checkcr32, unsigned int VBFlags2); + bool checkcr32, unsigned int VBFlags2); unsigned short SiS_ProbeDDC(struct SiS_Private *SiS_Pr); unsigned short SiS_ReadDDC(struct SiS_Private *SiS_Pr, unsigned short DDCdatatype, unsigned char *buffer); #else static unsigned short SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags, int VGAEngine, unsigned short adaptnum, unsigned short DDCdatatype, - BOOLEAN checkcr32, unsigned int VBFlags2); + bool checkcr32, unsigned int VBFlags2); static unsigned short SiS_ProbeDDC(struct SiS_Private *SiS_Pr); static unsigned short SiS_ReadDDC(struct SiS_Private *SiS_Pr, unsigned short DDCdatatype, unsigned char *buffer); @@ -469,7 +469,7 @@ extern void SiS_SetRegOR(SISIOADDRESS, unsigned short, unsigned short); extern void SiS_SetRegAND(SISIOADDRESS, unsigned short, unsigned short); extern void SiS_DisplayOff(struct SiS_Private *SiS_Pr); extern void SiS_DisplayOn(struct SiS_Private *SiS_Pr); -extern BOOLEAN SiS_SearchModeID(struct SiS_Private *, unsigned short *, unsigned short *); +extern bool SiS_SearchModeID(struct SiS_Private *, unsigned short *, unsigned short *); extern unsigned short SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex); extern unsigned short SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex); diff --git a/drivers/video/sis/initextlfb.c b/drivers/video/sis/initextlfb.c index c3884a29f4c..47a33501549 100644 --- a/drivers/video/sis/initextlfb.c +++ b/drivers/video/sis/initextlfb.c @@ -38,14 +38,14 @@ int sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr, unsigned char modeno, unsigned char rateindex); int sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno, unsigned char rateindex, struct fb_var_screeninfo *var); -BOOLEAN sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, +bool sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, int *htotal, int *vtotal, unsigned char rateindex); -extern BOOLEAN SiSInitPtr(struct SiS_Private *SiS_Pr); -extern BOOLEAN SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo, +extern bool SiSInitPtr(struct SiS_Private *SiS_Pr); +extern bool SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo, unsigned short *ModeIdIndex); extern void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, - int xres, int yres, struct fb_var_screeninfo *var, BOOLEAN writeres); + int xres, int yres, struct fb_var_screeninfo *var, bool writeres); int sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr, unsigned char modeno, @@ -131,7 +131,7 @@ sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno, (unsigned char *)&SiS_Pr->SiS_CRT1Table[index].CR[0], SiS_Pr->SiS_RefIndex[RRTI].XRes, SiS_Pr->SiS_RefIndex[RRTI].YRes, - var, FALSE); + var, false); if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & 0x8000) var->sync &= ~FB_SYNC_VERT_HIGH_ACT; @@ -175,7 +175,7 @@ sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno, return 1; } -BOOLEAN +bool sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, int *htotal, int *vtotal, unsigned char rateindex) { @@ -184,7 +184,7 @@ sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, int *ht unsigned short RRTI = 0; unsigned char sr_data, cr_data, cr_data2; - if(!SiSInitPtr(SiS_Pr)) return FALSE; + if(!SiSInitPtr(SiS_Pr)) return false; if(rateindex > 0) rateindex--; @@ -195,7 +195,7 @@ sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, int *ht } #endif - if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE; + if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return false; RRTI = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex; if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & HaveWideTiming) { @@ -226,7 +226,7 @@ sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, int *ht if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & InterlaceMode) *vtotal *= 2; - return TRUE; + return true; } diff --git a/drivers/video/sis/sis.h b/drivers/video/sis/sis.h index a259446ca7f..7d5ee2145e2 100644 --- a/drivers/video/sis/sis.h +++ b/drivers/video/sis/sis.h @@ -526,7 +526,7 @@ struct sis_video_info { u16 vmax; u32 dclockmax; u8 feature; - BOOLEAN datavalid; + bool datavalid; } sisfb_thismonitor; unsigned short chip_id; /* PCI ID of chip */ diff --git a/drivers/video/sis/sis_main.c b/drivers/video/sis/sis_main.c index baaf495a0a6..01197d74021 100644 --- a/drivers/video/sis/sis_main.c +++ b/drivers/video/sis/sis_main.c @@ -110,7 +110,7 @@ sisfb_setdefaultparms(void) /* ------------- Parameter parsing -------------- */ static void __devinit -sisfb_search_vesamode(unsigned int vesamode, BOOLEAN quiet) +sisfb_search_vesamode(unsigned int vesamode, bool quiet) { int i = 0, j = 0; @@ -150,7 +150,7 @@ sisfb_search_vesamode(unsigned int vesamode, BOOLEAN quiet) } static void __devinit -sisfb_search_mode(char *name, BOOLEAN quiet) +sisfb_search_mode(char *name, bool quiet) { unsigned int j = 0, xres = 0, yres = 0, depth = 0, rate = 0; int i = 0; @@ -251,7 +251,7 @@ sisfb_get_vga_mode_from_kernel(void) "sisfb: Using vga mode %s pre-set by kernel as default\n", mymode); - sisfb_search_mode(mymode, TRUE); + sisfb_search_mode(mymode, true); } #endif return; @@ -307,7 +307,7 @@ static void __init sisfb_search_specialtiming(const char *name) { int i = 0; - BOOLEAN found = FALSE; + bool found = false; /* We don't know the hardware specs yet and there is no ivideo */ @@ -322,7 +322,7 @@ sisfb_search_specialtiming(const char *name) if(!strnicmp(name,mycustomttable[i].optionName, strlen(mycustomttable[i].optionName))) { sisfb_specialtiming = mycustomttable[i].SpecialID; - found = TRUE; + found = true; printk(KERN_INFO "sisfb: Special timing for %s %s forced (\"%s\")\n", mycustomttable[i].vendorName, mycustomttable[i].cardName, @@ -353,7 +353,7 @@ sisfb_detect_custom_timing(struct sis_video_info *ivideo) { unsigned char *biosver = NULL; unsigned char *biosdate = NULL; - BOOLEAN footprint; + bool footprint; u32 chksum = 0; int i, j; @@ -380,16 +380,16 @@ sisfb_detect_custom_timing(struct sis_video_info *ivideo) (mycustomttable[i].bioschksum == chksum))) && (mycustomttable[i].pcisubsysvendor == ivideo->subsysvendor) && (mycustomttable[i].pcisubsyscard == ivideo->subsysdevice) ) { - footprint = TRUE; + footprint = true; for(j = 0; j < 5; j++) { if(mycustomttable[i].biosFootprintAddr[j]) { if(ivideo->SiS_Pr.UseROM) { if(ivideo->SiS_Pr.VirtualRomBase[mycustomttable[i].biosFootprintAddr[j]] != mycustomttable[i].biosFootprintData[j]) { - footprint = FALSE; + footprint = false; } } else - footprint = FALSE; + footprint = false; } } if(footprint) { @@ -406,7 +406,7 @@ sisfb_detect_custom_timing(struct sis_video_info *ivideo) } while(mycustomttable[i].chipID); } -static BOOLEAN __devinit +static bool __devinit sisfb_interpret_edid(struct sisfb_monitor *monitor, u8 *buffer) { int i, j, xres, yres, refresh, index; @@ -417,13 +417,13 @@ sisfb_interpret_edid(struct sisfb_monitor *monitor, u8 *buffer) buffer[4] != 0xff || buffer[5] != 0xff || buffer[6] != 0xff || buffer[7] != 0x00) { printk(KERN_DEBUG "sisfb: Bad EDID header\n"); - return FALSE; + return false; } if(buffer[0x12] != 0x01) { printk(KERN_INFO "sisfb: EDID version %d not supported\n", buffer[0x12]); - return FALSE; + return false; } monitor->feature = buffer[0x18]; @@ -449,7 +449,7 @@ sisfb_interpret_edid(struct sisfb_monitor *monitor, u8 *buffer) monitor->vmin = buffer[j + 5]; monitor->vmax = buffer[j + 6]; monitor->dclockmax = buffer[j + 9] * 10 * 1000; - monitor->datavalid = TRUE; + monitor->datavalid = true; break; } j += 18; @@ -501,7 +501,7 @@ sisfb_interpret_edid(struct sisfb_monitor *monitor, u8 *buffer) index += 2; } if((monitor->hmin <= monitor->hmax) && (monitor->vmin <= monitor->vmax)) { - monitor->datavalid = TRUE; + monitor->datavalid = true; } } @@ -514,7 +514,7 @@ sisfb_handle_ddc(struct sis_video_info *ivideo, struct sisfb_monitor *monitor, i unsigned short temp, i, realcrtno = crtno; unsigned char buffer[256]; - monitor->datavalid = FALSE; + monitor->datavalid = false; if(crtno) { if(ivideo->vbflags & CRT2_LCD) realcrtno = 1; @@ -563,7 +563,7 @@ sisfb_handle_ddc(struct sis_video_info *ivideo, struct sisfb_monitor *monitor, i /* -------------- Mode validation --------------- */ -static BOOLEAN +static bool sisfb_verify_rate(struct sis_video_info *ivideo, struct sisfb_monitor *monitor, int mode_idx, int rate_idx, int rate) { @@ -571,10 +571,10 @@ sisfb_verify_rate(struct sis_video_info *ivideo, struct sisfb_monitor *monitor, unsigned int dclock, hsync; if(!monitor->datavalid) - return TRUE; + return true; if(mode_idx < 0) - return FALSE; + return false; /* Skip for 320x200, 320x240, 640x400 */ switch(sisbios_mode[mode_idx].mode_no[ivideo->mni]) { @@ -587,34 +587,34 @@ sisfb_verify_rate(struct sis_video_info *ivideo, struct sisfb_monitor *monitor, case 0x2f: case 0x5d: case 0x5e: - return TRUE; + return true; #ifdef CONFIG_FB_SIS_315 case 0x5a: case 0x5b: - if(ivideo->sisvga_engine == SIS_315_VGA) return TRUE; + if(ivideo->sisvga_engine == SIS_315_VGA) return true; #endif } if(rate < (monitor->vmin - 1)) - return FALSE; + return false; if(rate > (monitor->vmax + 1)) - return FALSE; + return false; if(sisfb_gettotalfrommode(&ivideo->SiS_Pr, sisbios_mode[mode_idx].mode_no[ivideo->mni], &htotal, &vtotal, rate_idx)) { dclock = (htotal * vtotal * rate) / 1000; if(dclock > (monitor->dclockmax + 1000)) - return FALSE; + return false; hsync = dclock / htotal; if(hsync < (monitor->hmin - 1)) - return FALSE; + return false; if(hsync > (monitor->hmax + 1)) - return FALSE; + return false; } else { - return FALSE; + return false; } - return TRUE; + return true; } static int @@ -732,49 +732,49 @@ sisfb_search_refresh_rate(struct sis_video_info *ivideo, unsigned int rate, int } } -static BOOLEAN +static bool sisfb_bridgeisslave(struct sis_video_info *ivideo) { unsigned char P1_00; if(!(ivideo->vbflags2 & VB2_VIDEOBRIDGE)) - return FALSE; + return false; inSISIDXREG(SISPART1,0x00,P1_00); if( ((ivideo->sisvga_engine == SIS_300_VGA) && (P1_00 & 0xa0) == 0x20) || ((ivideo->sisvga_engine == SIS_315_VGA) && (P1_00 & 0x50) == 0x10) ) { - return TRUE; + return true; } else { - return FALSE; + return false; } } -static BOOLEAN +static bool sisfballowretracecrt1(struct sis_video_info *ivideo) { u8 temp; inSISIDXREG(SISCR,0x17,temp); if(!(temp & 0x80)) - return FALSE; + return false; inSISIDXREG(SISSR,0x1f,temp); if(temp & 0xc0) - return FALSE; + return false; - return TRUE; + return true; } -static BOOLEAN +static bool sisfbcheckvretracecrt1(struct sis_video_info *ivideo) { if(!sisfballowretracecrt1(ivideo)) - return FALSE; + return false; if(inSISREG(SISINPSTAT) & 0x08) - return TRUE; + return true; else - return FALSE; + return false; } static void @@ -791,7 +791,7 @@ sisfbwaitretracecrt1(struct sis_video_info *ivideo) while((inSISREG(SISINPSTAT) & 0x08) && --watchdog); } -static BOOLEAN +static bool sisfbcheckvretracecrt2(struct sis_video_info *ivideo) { unsigned char temp, reg; @@ -799,17 +799,17 @@ sisfbcheckvretracecrt2(struct sis_video_info *ivideo) switch(ivideo->sisvga_engine) { case SIS_300_VGA: reg = 0x25; break; case SIS_315_VGA: reg = 0x30; break; - default: return FALSE; + default: return false; } inSISIDXREG(SISPART1, reg, temp); if(temp & 0x02) - return TRUE; + return true; else - return FALSE; + return false; } -static BOOLEAN +static bool sisfb_CheckVBRetrace(struct sis_video_info *ivideo) { if(ivideo->currentvbflags & VB_DISPTYPE_DISP2) { @@ -874,7 +874,7 @@ static int sisfb_myblank(struct sis_video_info *ivideo, int blank) { u8 sr01, sr11, sr1f, cr63=0, p2_0, p1_13; - BOOLEAN backlight = TRUE; + bool backlight = true; switch(blank) { case FB_BLANK_UNBLANK: /* on */ @@ -884,7 +884,7 @@ sisfb_myblank(struct sis_video_info *ivideo, int blank) cr63 = 0x00; p2_0 = 0x20; p1_13 = 0x00; - backlight = TRUE; + backlight = true; break; case FB_BLANK_NORMAL: /* blank */ sr01 = 0x20; @@ -893,7 +893,7 @@ sisfb_myblank(struct sis_video_info *ivideo, int blank) cr63 = 0x00; p2_0 = 0x20; p1_13 = 0x00; - backlight = TRUE; + backlight = true; break; case FB_BLANK_VSYNC_SUSPEND: /* no vsync */ sr01 = 0x20; @@ -902,7 +902,7 @@ sisfb_myblank(struct sis_video_info *ivideo, int blank) cr63 = 0x40; p2_0 = 0x40; p1_13 = 0x80; - backlight = FALSE; + backlight = false; break; case FB_BLANK_HSYNC_SUSPEND: /* no hsync */ sr01 = 0x20; @@ -911,7 +911,7 @@ sisfb_myblank(struct sis_video_info *ivideo, int blank) cr63 = 0x40; p2_0 = 0x80; p1_13 = 0x40; - backlight = FALSE; + backlight = false; break; case FB_BLANK_POWERDOWN: /* off */ sr01 = 0x20; @@ -920,7 +920,7 @@ sisfb_myblank(struct sis_video_info *ivideo, int blank) cr63 = 0x40; p2_0 = 0xc0; p1_13 = 0xc0; - backlight = FALSE; + backlight = false; break; default: return 1; @@ -1109,11 +1109,11 @@ sisfb_calc_pitch(struct sis_video_info *ivideo, struct fb_var_screeninfo *var) static void sisfb_set_pitch(struct sis_video_info *ivideo) { - BOOLEAN isslavemode = FALSE; + bool isslavemode = false; unsigned short HDisplay1 = ivideo->scrnpitchCRT1 >> 3; unsigned short HDisplay2 = ivideo->video_linelength >> 3; - if(sisfb_bridgeisslave(ivideo)) isslavemode = TRUE; + if(sisfb_bridgeisslave(ivideo)) isslavemode = true; /* We need to set pitch for CRT1 if bridge is in slave mode, too */ if((ivideo->currentvbflags & VB_DISPTYPE_DISP1) || (isslavemode)) { @@ -1178,7 +1178,7 @@ sisfb_set_mode(struct sis_video_info *ivideo, int clrscrn) sisfb_pre_setmode(ivideo); - if(SiSSetMode(&ivideo->SiS_Pr, modeno) == 0) { + if(!SiSSetMode(&ivideo->SiS_Pr, modeno)) { printk(KERN_ERR "sisfb: Setting mode[0x%x] failed\n", ivideo->mode_no); return -EINVAL; } @@ -1446,7 +1446,7 @@ sisfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) unsigned int drate = 0, hrate = 0, maxyres; int found_mode = 0; int refresh_rate, search_idx, tidx; - BOOLEAN recalc_clock = FALSE; + bool recalc_clock = false; u32 pixclock; htotal = var->left_margin + var->xres + var->right_margin + var->hsync_len; @@ -1524,7 +1524,7 @@ sisfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) (var->bits_per_pixel == 8) ) { /* Slave modes on LVDS and 301B-DH */ refresh_rate = 60; - recalc_clock = TRUE; + recalc_clock = true; } else if( (ivideo->current_htotal == htotal) && (ivideo->current_vtotal == vtotal) && (ivideo->current_pixclock == pixclock) ) { @@ -1545,17 +1545,17 @@ sisfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) } else { refresh_rate = 60; } - recalc_clock = TRUE; + recalc_clock = true; } else if((pixclock) && (htotal) && (vtotal)) { drate = 1000000000 / pixclock; hrate = (drate * 1000) / htotal; refresh_rate = (unsigned int) (hrate * 2 / vtotal); } else if(ivideo->current_refresh_rate) { refresh_rate = ivideo->current_refresh_rate; - recalc_clock = TRUE; + recalc_clock = true; } else { refresh_rate = 60; - recalc_clock = TRUE; + recalc_clock = true; } myrateindex = sisfb_search_refresh_rate(ivideo, refresh_rate, search_idx); @@ -2181,7 +2181,7 @@ sisfb_detect_VB_connect(struct sis_video_info *ivideo) /* ------------------ Sensing routines ------------------ */ -static BOOLEAN __devinit +static bool __devinit sisfb_test_DDC1(struct sis_video_info *ivideo) { unsigned short old; @@ -2191,13 +2191,13 @@ sisfb_test_DDC1(struct sis_video_info *ivideo) do { if(old != SiS_ReadDDC1Bit(&ivideo->SiS_Pr)) break; } while(count--); - return (count == -1) ? FALSE : TRUE; + return (count != -1); } static void __devinit sisfb_sense_crt1(struct sis_video_info *ivideo) { - BOOLEAN mustwait = FALSE; + bool mustwait = false; u8 sr1F, cr17; #ifdef CONFIG_FB_SIS_315 u8 cr63=0; @@ -2208,7 +2208,7 @@ sisfb_sense_crt1(struct sis_video_info *ivideo) inSISIDXREG(SISSR,0x1F,sr1F); orSISIDXREG(SISSR,0x1F,0x04); andSISIDXREG(SISSR,0x1F,0x3F); - if(sr1F & 0xc0) mustwait = TRUE; + if(sr1F & 0xc0) mustwait = true; #ifdef CONFIG_FB_SIS_315 if(ivideo->sisvga_engine == SIS_315_VGA) { @@ -2222,7 +2222,7 @@ sisfb_sense_crt1(struct sis_video_info *ivideo) cr17 &= 0x80; if(!cr17) { orSISIDXREG(SISCR,0x17,0x80); - mustwait = TRUE; + mustwait = true; outSISIDXREG(SISSR, 0x00, 0x01); outSISIDXREG(SISSR, 0x00, 0x03); } @@ -2284,7 +2284,7 @@ SiS_SenseLCD(struct sis_video_info *ivideo) u8 reg, cr37 = 0, paneltype = 0; u16 xres, yres; - ivideo->SiS_Pr.PanelSelfDetected = FALSE; + ivideo->SiS_Pr.PanelSelfDetected = false; /* LCD detection only for TMDS bridges */ if(!(ivideo->vbflags2 & VB2_SISTMDSBRIDGE)) @@ -2361,7 +2361,7 @@ SiS_SenseLCD(struct sis_video_info *ivideo) setSISIDXREG(SISCR, 0x37, 0x0c, cr37); orSISIDXREG(SISCR, 0x32, 0x08); - ivideo->SiS_Pr.PanelSelfDetected = TRUE; + ivideo->SiS_Pr.PanelSelfDetected = true; } static int __devinit @@ -3016,7 +3016,7 @@ sisfb_save_pdc_emi(struct sis_video_info *ivideo) int tmp; inSISIDXREG(SISPART1,0x13,tmp); if(tmp & 0x04) { - ivideo->SiS_Pr.SiS_UseLCDA = TRUE; + ivideo->SiS_Pr.SiS_UseLCDA = true; ivideo->detectedlcda = 0x03; } } @@ -3071,9 +3071,9 @@ sisfb_save_pdc_emi(struct sis_video_info *ivideo) inSISIDXREG(SISPART4,0x31,ivideo->SiS_Pr.EMI_31); inSISIDXREG(SISPART4,0x32,ivideo->SiS_Pr.EMI_32); inSISIDXREG(SISPART4,0x33,ivideo->SiS_Pr.EMI_33); - ivideo->SiS_Pr.HaveEMI = TRUE; + ivideo->SiS_Pr.HaveEMI = true; if((tmp & 0x20) || (ivideo->detectedlcda != 0xff)) { - ivideo->SiS_Pr.HaveEMILCD = TRUE; + ivideo->SiS_Pr.HaveEMILCD = true; } } } @@ -3558,8 +3558,8 @@ sisfb_pre_setmode(struct sis_video_info *ivideo) } #endif - SiS_SetEnableDstn(&ivideo->SiS_Pr, FALSE); - SiS_SetEnableFstn(&ivideo->SiS_Pr, FALSE); + SiS_SetEnableDstn(&ivideo->SiS_Pr, false); + SiS_SetEnableFstn(&ivideo->SiS_Pr, false); ivideo->curFSTN = ivideo->curDSTN = 0; switch(ivideo->currentvbflags & VB_DISPTYPE_DISP2) { @@ -3814,8 +3814,8 @@ sisfb_set_TVyposoffset(struct sis_video_info *ivideo, int val) static void sisfb_post_setmode(struct sis_video_info *ivideo) { - BOOLEAN crt1isoff = FALSE; - BOOLEAN doit = TRUE; + bool crt1isoff = false; + bool doit = true; #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315) u8 reg; #endif @@ -3834,17 +3834,17 @@ sisfb_post_setmode(struct sis_video_info *ivideo) /* We can't switch off CRT1 if bridge is in slave mode */ if(ivideo->vbflags2 & VB2_VIDEOBRIDGE) { - if(sisfb_bridgeisslave(ivideo)) doit = FALSE; + if(sisfb_bridgeisslave(ivideo)) doit = false; } else ivideo->sisfb_crt1off = 0; #ifdef CONFIG_FB_SIS_300 if(ivideo->sisvga_engine == SIS_300_VGA) { if((ivideo->sisfb_crt1off) && (doit)) { - crt1isoff = TRUE; + crt1isoff = true; reg = 0x00; } else { - crt1isoff = FALSE; + crt1isoff = false; reg = 0x80; } setSISIDXREG(SISCR, 0x17, 0x7f, reg); @@ -3853,11 +3853,11 @@ sisfb_post_setmode(struct sis_video_info *ivideo) #ifdef CONFIG_FB_SIS_315 if(ivideo->sisvga_engine == SIS_315_VGA) { if((ivideo->sisfb_crt1off) && (doit)) { - crt1isoff = TRUE; + crt1isoff = true; reg = 0x40; reg1 = 0xc0; } else { - crt1isoff = FALSE; + crt1isoff = false; reg = 0x00; reg1 = 0x00; } @@ -4004,9 +4004,9 @@ sisfb_setup(char *options) } else if(!strnicmp(this_opt, "tvstandard:",11)) { sisfb_search_tvstd(this_opt + 11); } else if(!strnicmp(this_opt, "mode:", 5)) { - sisfb_search_mode(this_opt + 5, FALSE); + sisfb_search_mode(this_opt + 5, false); } else if(!strnicmp(this_opt, "vesa:", 5)) { - sisfb_search_vesamode(simple_strtoul(this_opt + 5, NULL, 0), FALSE); + sisfb_search_vesamode(simple_strtoul(this_opt + 5, NULL, 0), false); } else if(!strnicmp(this_opt, "rate:", 5)) { sisfb_parm_rate = simple_strtoul(this_opt + 5, NULL, 0); } else if(!strnicmp(this_opt, "forcecrt1:", 10)) { @@ -4062,7 +4062,7 @@ sisfb_setup(char *options) sisfb_lvdshl = temp; } } else if(this_opt[0] >= '0' && this_opt[0] <= '9') { - sisfb_search_mode(this_opt, TRUE); + sisfb_search_mode(this_opt, true); #if !defined(__i386__) && !defined(__x86_64__) } else if(!strnicmp(this_opt, "resetcard", 9)) { sisfb_resetcard = 1; @@ -4564,9 +4564,9 @@ sisfb_post_sis300(struct pci_dev *pdev) sisfb_sense_crt1(ivideo); /* Set default mode, don't clear screen */ - ivideo->SiS_Pr.SiS_UseOEM = FALSE; - SiS_SetEnableDstn(&ivideo->SiS_Pr, FALSE); - SiS_SetEnableFstn(&ivideo->SiS_Pr, FALSE); + ivideo->SiS_Pr.SiS_UseOEM = false; + SiS_SetEnableDstn(&ivideo->SiS_Pr, false); + SiS_SetEnableFstn(&ivideo->SiS_Pr, false); ivideo->curFSTN = ivideo->curDSTN = 0; ivideo->SiS_Pr.VideoMemorySize = 8 << 20; SiSSetMode(&ivideo->SiS_Pr, 0x2e | 0x80); @@ -5680,9 +5680,9 @@ sisfb_post_xgi(struct pci_dev *pdev) } else { /* Set default mode, don't clear screen */ - ivideo->SiS_Pr.SiS_UseOEM = FALSE; - SiS_SetEnableDstn(&ivideo->SiS_Pr, FALSE); - SiS_SetEnableFstn(&ivideo->SiS_Pr, FALSE); + ivideo->SiS_Pr.SiS_UseOEM = false; + SiS_SetEnableDstn(&ivideo->SiS_Pr, false); + SiS_SetEnableFstn(&ivideo->SiS_Pr, false); ivideo->curFSTN = ivideo->curDSTN = 0; ivideo->SiS_Pr.VideoMemorySize = 8 << 20; SiSSetMode(&ivideo->SiS_Pr, 0x2e | 0x80); @@ -5723,9 +5723,9 @@ sisfb_post_xgi(struct pci_dev *pdev) } /* Set default mode, don't clear screen */ - ivideo->SiS_Pr.SiS_UseOEM = FALSE; - SiS_SetEnableDstn(&ivideo->SiS_Pr, FALSE); - SiS_SetEnableFstn(&ivideo->SiS_Pr, FALSE); + ivideo->SiS_Pr.SiS_UseOEM = false; + SiS_SetEnableDstn(&ivideo->SiS_Pr, false); + SiS_SetEnableFstn(&ivideo->SiS_Pr, false); ivideo->curFSTN = ivideo->curDSTN = 0; SiSSetMode(&ivideo->SiS_Pr, 0x2e | 0x80); @@ -5819,7 +5819,7 @@ sisfb_probe(struct pci_dev *pdev, const struct pci_device_id *ent) ivideo->detectedpdca = 0xff; ivideo->detectedlcda = 0xff; - ivideo->sisfb_thismonitor.datavalid = FALSE; + ivideo->sisfb_thismonitor.datavalid = false; ivideo->current_base = 0; @@ -5871,21 +5871,21 @@ sisfb_probe(struct pci_dev *pdev, const struct pci_device_id *ent) ivideo->SiS_Pr.SiS_Backup70xx = 0xff; ivideo->SiS_Pr.SiS_CHOverScan = -1; - ivideo->SiS_Pr.SiS_ChSW = FALSE; - ivideo->SiS_Pr.SiS_UseLCDA = FALSE; - ivideo->SiS_Pr.HaveEMI = FALSE; - ivideo->SiS_Pr.HaveEMILCD = FALSE; - ivideo->SiS_Pr.OverruleEMI = FALSE; - ivideo->SiS_Pr.SiS_SensibleSR11 = FALSE; + ivideo->SiS_Pr.SiS_ChSW = false; + ivideo->SiS_Pr.SiS_UseLCDA = false; + ivideo->SiS_Pr.HaveEMI = false; + ivideo->SiS_Pr.HaveEMILCD = false; + ivideo->SiS_Pr.OverruleEMI = false; + ivideo->SiS_Pr.SiS_SensibleSR11 = false; ivideo->SiS_Pr.SiS_MyCR63 = 0x63; ivideo->SiS_Pr.PDC = -1; ivideo->SiS_Pr.PDCA = -1; - ivideo->SiS_Pr.DDCPortMixup = FALSE; + ivideo->SiS_Pr.DDCPortMixup = false; #ifdef CONFIG_FB_SIS_315 if(ivideo->chip >= SIS_330) { ivideo->SiS_Pr.SiS_MyCR63 = 0x53; if(ivideo->chip >= SIS_661) { - ivideo->SiS_Pr.SiS_SensibleSR11 = TRUE; + ivideo->SiS_Pr.SiS_SensibleSR11 = true; } } #endif @@ -5969,7 +5969,7 @@ sisfb_probe(struct pci_dev *pdev, const struct pci_device_id *ent) do { if(mychswtable[i].subsysVendor == ivideo->subsysvendor && mychswtable[i].subsysCard == ivideo->subsysdevice) { - ivideo->SiS_Pr.SiS_ChSW = TRUE; + ivideo->SiS_Pr.SiS_ChSW = true; printk(KERN_DEBUG "sisfb: Identified [%s %s] " "requiring Chrontel/GPIO setup\n", mychswtable[i].vendorName, @@ -6018,20 +6018,20 @@ sisfb_probe(struct pci_dev *pdev, const struct pci_device_id *ent) /* Search and copy ROM image */ ivideo->bios_abase = NULL; ivideo->SiS_Pr.VirtualRomBase = NULL; - ivideo->SiS_Pr.UseROM = FALSE; - ivideo->haveXGIROM = ivideo->SiS_Pr.SiS_XGIROM = FALSE; + ivideo->SiS_Pr.UseROM = false; + ivideo->haveXGIROM = ivideo->SiS_Pr.SiS_XGIROM = false; if(ivideo->sisfb_userom) { ivideo->SiS_Pr.VirtualRomBase = sisfb_find_rom(pdev); ivideo->bios_abase = ivideo->SiS_Pr.VirtualRomBase; - ivideo->SiS_Pr.UseROM = (ivideo->SiS_Pr.VirtualRomBase) ? TRUE : FALSE; + ivideo->SiS_Pr.UseROM = (bool)(ivideo->SiS_Pr.VirtualRomBase); printk(KERN_INFO "sisfb: Video ROM %sfound\n", ivideo->SiS_Pr.UseROM ? "" : "not "); if((ivideo->SiS_Pr.UseROM) && (ivideo->chip >= XGI_20)) { - ivideo->SiS_Pr.UseROM = FALSE; - ivideo->haveXGIROM = ivideo->SiS_Pr.SiS_XGIROM = TRUE; + ivideo->SiS_Pr.UseROM = false; + ivideo->haveXGIROM = ivideo->SiS_Pr.SiS_XGIROM = true; if( (ivideo->revision_id == 2) && (!(ivideo->bios_abase[0x1d1] & 0x01)) ) { - ivideo->SiS_Pr.DDCPortMixup = TRUE; + ivideo->SiS_Pr.DDCPortMixup = true; } } } else { @@ -6677,9 +6677,9 @@ static int __init sisfb_init_module(void) sisfb_search_tvstd(tvstandard); if(mode) - sisfb_search_mode(mode, FALSE); + sisfb_search_mode(mode, false); else if(vesa != -1) - sisfb_search_vesamode(vesa, FALSE); + sisfb_search_vesamode(vesa, false); sisfb_crt1off = (crt1off == 0) ? 1 : 0; diff --git a/drivers/video/sis/sis_main.h b/drivers/video/sis/sis_main.h index 88e4f1e4147..3e3b7fa05d6 100644 --- a/drivers/video/sis/sis_main.h +++ b/drivers/video/sis/sis_main.h @@ -411,54 +411,54 @@ static const struct _sis_vrate { u16 xres; u16 yres; u16 refresh; - BOOLEAN SiS730valid32bpp; + bool SiS730valid32bpp; } sisfb_vrate[] = { - {1, 320, 200, 70, TRUE}, - {1, 320, 240, 60, TRUE}, - {1, 400, 300, 60, TRUE}, - {1, 512, 384, 60, TRUE}, - {1, 640, 400, 72, TRUE}, - {1, 640, 480, 60, TRUE}, {2, 640, 480, 72, TRUE}, {3, 640, 480, 75, TRUE}, - {4, 640, 480, 85, TRUE}, {5, 640, 480, 100, TRUE}, {6, 640, 480, 120, TRUE}, - {7, 640, 480, 160, TRUE}, {8, 640, 480, 200, TRUE}, - {1, 720, 480, 60, TRUE}, - {1, 720, 576, 58, TRUE}, - {1, 768, 576, 58, TRUE}, - {1, 800, 480, 60, TRUE}, {2, 800, 480, 75, TRUE}, {3, 800, 480, 85, TRUE}, - {1, 800, 600, 56, TRUE}, {2, 800, 600, 60, TRUE}, {3, 800, 600, 72, TRUE}, - {4, 800, 600, 75, TRUE}, {5, 800, 600, 85, TRUE}, {6, 800, 600, 105, TRUE}, - {7, 800, 600, 120, TRUE}, {8, 800, 600, 160, TRUE}, - {1, 848, 480, 39, TRUE}, {2, 848, 480, 60, TRUE}, - {1, 856, 480, 39, TRUE}, {2, 856, 480, 60, TRUE}, - {1, 960, 540, 60, TRUE}, - {1, 960, 600, 60, TRUE}, - {1, 1024, 576, 60, TRUE}, {2, 1024, 576, 75, TRUE}, {3, 1024, 576, 85, TRUE}, - {1, 1024, 600, 60, TRUE}, - {1, 1024, 768, 43, TRUE}, {2, 1024, 768, 60, TRUE}, {3, 1024, 768, 70, FALSE}, - {4, 1024, 768, 75, FALSE}, {5, 1024, 768, 85, TRUE}, {6, 1024, 768, 100, TRUE}, - {7, 1024, 768, 120, TRUE}, - {1, 1152, 768, 60, TRUE}, - {1, 1152, 864, 60, TRUE}, {2, 1152, 864, 75, TRUE}, {3, 1152, 864, 84, TRUE}, - {1, 1280, 720, 60, TRUE}, {2, 1280, 720, 75, TRUE}, {3, 1280, 720, 85, TRUE}, - {1, 1280, 768, 60, TRUE}, - {1, 1280, 800, 60, TRUE}, - {1, 1280, 854, 60, TRUE}, - {1, 1280, 960, 60, TRUE}, {2, 1280, 960, 85, TRUE}, - {1, 1280, 1024, 43, TRUE}, {2, 1280, 1024, 60, TRUE}, {3, 1280, 1024, 75, TRUE}, - {4, 1280, 1024, 85, TRUE}, - {1, 1360, 768, 60, TRUE}, - {1, 1360, 1024, 59, TRUE}, - {1, 1400, 1050, 60, TRUE}, {2, 1400, 1050, 75, TRUE}, - {1, 1600, 1200, 60, TRUE}, {2, 1600, 1200, 65, TRUE}, {3, 1600, 1200, 70, TRUE}, - {4, 1600, 1200, 75, TRUE}, {5, 1600, 1200, 85, TRUE}, {6, 1600, 1200, 100, TRUE}, - {7, 1600, 1200, 120, TRUE}, - {1, 1680, 1050, 60, TRUE}, - {1, 1920, 1080, 30, TRUE}, - {1, 1920, 1440, 60, TRUE}, {2, 1920, 1440, 65, TRUE}, {3, 1920, 1440, 70, TRUE}, - {4, 1920, 1440, 75, TRUE}, {5, 1920, 1440, 85, TRUE}, {6, 1920, 1440, 100, TRUE}, - {1, 2048, 1536, 60, TRUE}, {2, 2048, 1536, 65, TRUE}, {3, 2048, 1536, 70, TRUE}, - {4, 2048, 1536, 75, TRUE}, {5, 2048, 1536, 85, TRUE}, - {0, 0, 0, 0, FALSE} + {1, 320, 200, 70, true}, + {1, 320, 240, 60, true}, + {1, 400, 300, 60, true}, + {1, 512, 384, 60, true}, + {1, 640, 400, 72, true}, + {1, 640, 480, 60, true}, {2, 640, 480, 72, true}, {3, 640, 480, 75, true}, + {4, 640, 480, 85, true}, {5, 640, 480, 100, true}, {6, 640, 480, 120, true}, + {7, 640, 480, 160, true}, {8, 640, 480, 200, true}, + {1, 720, 480, 60, true}, + {1, 720, 576, 58, true}, + {1, 768, 576, 58, true}, + {1, 800, 480, 60, true}, {2, 800, 480, 75, true}, {3, 800, 480, 85, true}, + {1, 800, 600, 56, true}, {2, 800, 600, 60, true}, {3, 800, 600, 72, true}, + {4, 800, 600, 75, true}, {5, 800, 600, 85, true}, {6, 800, 600, 105, true}, + {7, 800, 600, 120, true}, {8, 800, 600, 160, true}, + {1, 848, 480, 39, true}, {2, 848, 480, 60, true}, + {1, 856, 480, 39, true}, {2, 856, 480, 60, true}, + {1, 960, 540, 60, true}, + {1, 960, 600, 60, true}, + {1, 1024, 576, 60, true}, {2, 1024, 576, 75, true}, {3, 1024, 576, 85, true}, + {1, 1024, 600, 60, true}, + {1, 1024, 768, 43, true}, {2, 1024, 768, 60, true}, {3, 1024, 768, 70, false}, + {4, 1024, 768, 75, false}, {5, 1024, 768, 85, true}, {6, 1024, 768, 100, true}, + {7, 1024, 768, 120, true}, + {1, 1152, 768, 60, true}, + {1, 1152, 864, 60, true}, {2, 1152, 864, 75, true}, {3, 1152, 864, 84, true}, + {1, 1280, 720, 60, true}, {2, 1280, 720, 75, true}, {3, 1280, 720, 85, true}, + {1, 1280, 768, 60, true}, + {1, 1280, 800, 60, true}, + {1, 1280, 854, 60, true}, + {1, 1280, 960, 60, true}, {2, 1280, 960, 85, true}, + {1, 1280, 1024, 43, true}, {2, 1280, 1024, 60, true}, {3, 1280, 1024, 75, true}, + {4, 1280, 1024, 85, true}, + {1, 1360, 768, 60, true}, + {1, 1360, 1024, 59, true}, + {1, 1400, 1050, 60, true}, {2, 1400, 1050, 75, true}, + {1, 1600, 1200, 60, true}, {2, 1600, 1200, 65, true}, {3, 1600, 1200, 70, true}, + {4, 1600, 1200, 75, true}, {5, 1600, 1200, 85, true}, {6, 1600, 1200, 100, true}, + {7, 1600, 1200, 120, true}, + {1, 1680, 1050, 60, true}, + {1, 1920, 1080, 30, true}, + {1, 1920, 1440, 60, true}, {2, 1920, 1440, 65, true}, {3, 1920, 1440, 70, true}, + {4, 1920, 1440, 75, true}, {5, 1920, 1440, 85, true}, {6, 1920, 1440, 100, true}, + {1, 2048, 1536, 60, true}, {2, 2048, 1536, 65, true}, {3, 2048, 1536, 70, true}, + {4, 2048, 1536, 75, true}, {5, 2048, 1536, 85, true}, + {0, 0, 0, 0, false} }; static struct _sisfbddcsmodes { @@ -691,7 +691,7 @@ extern int sisfb_initaccel(struct sis_video_info *ivideo); extern void sisfb_syncaccel(struct sis_video_info *ivideo); /* Internal general routines */ -static void sisfb_search_mode(char *name, BOOLEAN quiet); +static void sisfb_search_mode(char *name, bool quiet); static int sisfb_validate_mode(struct sis_video_info *ivideo, int modeindex, u32 vbflags); static u8 sisfb_search_refresh_rate(struct sis_video_info *ivideo, unsigned int rate, int index); @@ -702,10 +702,10 @@ static int sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive, struct fb_info *info); static void sisfb_pre_setmode(struct sis_video_info *ivideo); static void sisfb_post_setmode(struct sis_video_info *ivideo); -static BOOLEAN sisfb_CheckVBRetrace(struct sis_video_info *ivideo); -static BOOLEAN sisfbcheckvretracecrt2(struct sis_video_info *ivideo); -static BOOLEAN sisfbcheckvretracecrt1(struct sis_video_info *ivideo); -static BOOLEAN sisfb_bridgeisslave(struct sis_video_info *ivideo); +static bool sisfb_CheckVBRetrace(struct sis_video_info *ivideo); +static bool sisfbcheckvretracecrt2(struct sis_video_info *ivideo); +static bool sisfbcheckvretracecrt1(struct sis_video_info *ivideo); +static bool sisfb_bridgeisslave(struct sis_video_info *ivideo); static void sisfb_detect_VB_connect(struct sis_video_info *ivideo); static void sisfb_get_VB_type(struct sis_video_info *ivideo); static void sisfb_set_TVxposoffset(struct sis_video_info *ivideo, int val); @@ -737,20 +737,20 @@ static void sisfb_free_node(struct SIS_HEAP *memheap, struct SIS_OH *poh); /* Routines from init.c/init301.c */ extern unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay, - int VDisplay, int Depth, BOOLEAN FSTN, unsigned short CustomT, + int VDisplay, int Depth, bool FSTN, unsigned short CustomT, int LCDwith, int LCDheight, unsigned int VBFlags2); extern unsigned short SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, int Depth, unsigned int VBFlags2); extern unsigned short SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, int Depth, unsigned int VBFlags2); extern void SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr); -extern BOOLEAN SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo); +extern bool SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo); extern void SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable); extern void SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable); -extern BOOLEAN SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr); +extern bool SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr); -extern BOOLEAN sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, +extern bool sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, int *htotal, int *vtotal, unsigned char rateindex); extern int sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr, unsigned char modeno, unsigned char rateindex); diff --git a/drivers/video/sis/vgatypes.h b/drivers/video/sis/vgatypes.h index 05d08b7889a..b532fbd2b04 100644 --- a/drivers/video/sis/vgatypes.h +++ b/drivers/video/sis/vgatypes.h @@ -57,18 +57,6 @@ #include <linux/version.h> #endif -#ifndef FALSE -#define FALSE 0 -#endif - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef BOOLEAN -typedef unsigned int BOOLEAN; -#endif - #define SISIOMEMTYPE #ifdef SIS_LINUX_KERNEL diff --git a/drivers/video/sis/vstruct.h b/drivers/video/sis/vstruct.h index 9ae32923c14..705c8536052 100644 --- a/drivers/video/sis/vstruct.h +++ b/drivers/video/sis/vstruct.h @@ -240,7 +240,7 @@ struct SiS_Private void *ivideo; #endif unsigned char *VirtualRomBase; - BOOLEAN UseROM; + bool UseROM; #ifdef SIS_LINUX_KERNEL unsigned char SISIOMEMTYPE *VideoMemoryAddress; unsigned int VideoMemorySize; @@ -283,24 +283,24 @@ struct SiS_Private #ifdef SIS_XORG_XF86 unsigned short SiS_CP1, SiS_CP2, SiS_CP3, SiS_CP4; #endif - BOOLEAN SiS_UseROM; - BOOLEAN SiS_ROMNew; - BOOLEAN SiS_XGIROM; - BOOLEAN SiS_NeedRomModeData; - BOOLEAN PanelSelfDetected; - BOOLEAN DDCPortMixup; + bool SiS_UseROM; + bool SiS_ROMNew; + bool SiS_XGIROM; + bool SiS_NeedRomModeData; + bool PanelSelfDetected; + bool DDCPortMixup; int SiS_CHOverScan; - BOOLEAN SiS_CHSOverScan; - BOOLEAN SiS_ChSW; - BOOLEAN SiS_UseLCDA; + bool SiS_CHSOverScan; + bool SiS_ChSW; + bool SiS_UseLCDA; int SiS_UseOEM; unsigned int SiS_CustomT; int SiS_UseWide, SiS_UseWideCRT2; int SiS_TVBlue; unsigned short SiS_Backup70xx; - BOOLEAN HaveEMI; - BOOLEAN HaveEMILCD; - BOOLEAN OverruleEMI; + bool HaveEMI; + bool HaveEMILCD; + bool OverruleEMI; unsigned char EMI_30,EMI_31,EMI_32,EMI_33; unsigned short SiS_EMIOffset; unsigned short SiS_PWDOffset; @@ -352,7 +352,7 @@ struct SiS_Private unsigned short SiS_DDC_ReadAddr; unsigned short SiS_DDC_SecAddr; unsigned short SiS_ChrontelInit; - BOOLEAN SiS_SensibleSR11; + bool SiS_SensibleSR11; unsigned short SiS661LCD2TableSize; unsigned short SiS_PanelMinLVDS; @@ -494,10 +494,10 @@ struct SiS_Private unsigned short PanelVRS, PanelVRE; unsigned short PanelVCLKIdx300; unsigned short PanelVCLKIdx315; - BOOLEAN Alternate1600x1200; + bool Alternate1600x1200; - BOOLEAN UseCustomMode; - BOOLEAN CRT1UsesCustomMode; + bool UseCustomMode; + bool CRT1UsesCustomMode; unsigned short CHDisplay; unsigned short CHSyncStart; unsigned short CHSyncEnd; @@ -523,7 +523,7 @@ struct SiS_Private int LVDSHL; - BOOLEAN Backup; + bool Backup; unsigned char Backup_Mode; unsigned char Backup_14; unsigned char Backup_15; @@ -542,12 +542,12 @@ struct SiS_Private int CenterScreen; unsigned short CP_Vendor, CP_Product; - BOOLEAN CP_HaveCustomData; + bool CP_HaveCustomData; int CP_PreferredX, CP_PreferredY, CP_PreferredIndex; int CP_MaxX, CP_MaxY, CP_MaxClock; unsigned char CP_PrefSR2B, CP_PrefSR2C; unsigned short CP_PrefClock; - BOOLEAN CP_Supports64048075; + bool CP_Supports64048075; int CP_HDisplay[7], CP_VDisplay[7]; /* For Custom LCD panel dimensions */ int CP_HTotal[7], CP_VTotal[7]; int CP_HSyncStart[7], CP_VSyncStart[7]; @@ -555,8 +555,8 @@ struct SiS_Private int CP_HBlankStart[7], CP_VBlankStart[7]; int CP_HBlankEnd[7], CP_VBlankEnd[7]; int CP_Clock[7]; - BOOLEAN CP_DataValid[7]; - BOOLEAN CP_HSync_P[7], CP_VSync_P[7], CP_SyncValid[7]; + bool CP_DataValid[7]; + bool CP_HSync_P[7], CP_VSync_P[7], CP_SyncValid[7]; }; #endif diff --git a/drivers/video/sun3fb.c b/drivers/video/sun3fb.c deleted file mode 100644 index f80356dfa8e..00000000000 --- a/drivers/video/sun3fb.c +++ /dev/null @@ -1,702 +0,0 @@ -/* - * linux/drivers/video/sun3fb.c -- Frame buffer driver for Sun3 - * - * (C) 1998 Thomas Bogendoerfer - * - * This driver is bases on sbusfb.c, which is - * - * Copyright (C) 1998 Jakub Jelinek - * - * This driver is partly based on the Open Firmware console driver - * - * Copyright (C) 1997 Geert Uytterhoeven - * - * and SPARC console subsystem - * - * Copyright (C) 1995 Peter Zaitcev (zaitcev@yahoo.com) - * Copyright (C) 1995-1997 David S. Miller (davem@caip.rutgers.edu) - * Copyright (C) 1995-1996 Miguel de Icaza (miguel@nuclecu.unam.mx) - * Copyright (C) 1996 Dave Redman (djhr@tadpole.co.uk) - * Copyright (C) 1996-1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) - * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be) - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/string.h> -#include <linux/mm.h> -#include <linux/slab.h> -#include <linux/vmalloc.h> -#include <linux/delay.h> -#include <linux/interrupt.h> -#include <linux/fb.h> -#include <linux/selection.h> -#include <linux/init.h> -#include <linux/console.h> -#include <linux/kd.h> -#include <linux/vt_kern.h> - -#include <asm/uaccess.h> -#include <asm/pgtable.h> /* io_remap_page_range() */ - -#ifdef CONFIG_SUN3 -#include <asm/oplib.h> -#include <asm/machines.h> -#include <asm/idprom.h> - -#define CGFOUR_OBMEM_ADDR 0x1f300000 -#define BWTWO_OBMEM_ADDR 0x1f000000 -#define BWTWO_OBMEM50_ADDR 0x00100000 - -#endif -#ifdef CONFIG_SUN3X -#include <asm/sun3x.h> -#endif -#include <video/sbusfb.h> - -#define DEFAULT_CURSOR_BLINK_RATE (2*HZ/5) - -#define CURSOR_SHAPE 1 -#define CURSOR_BLINK 2 - -#define mymemset(x,y) memset(x,0,y) - - /* - * Interface used by the world - */ - -int sun3fb_init(void); -void sun3fb_setup(char *options); - -static char fontname[40] __initdata = { 0 }; -static int curblink __initdata = 1; - -static int sun3fb_get_fix(struct fb_fix_screeninfo *fix, int con, - struct fb_info *info); -static int sun3fb_get_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info); -static int sun3fb_set_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info); -static int sun3fb_get_cmap(struct fb_cmap *cmap, int kspc, int con, - struct fb_info *info); -static int sun3fb_set_cmap(struct fb_cmap *cmap, int kspc, int con, - struct fb_info *info); -static int sun3fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, - u_int transp, struct fb_info *info); -static int sun3fb_blank(int blank, struct fb_info *info); -static void sun3fb_cursor(struct display *p, int mode, int x, int y); -static void sun3fb_clear_margin(struct display *p, int s); - - /* - * Interface to the low level console driver - */ - -static int sun3fbcon_switch(int con, struct fb_info *info); -static int sun3fbcon_updatevar(int con, struct fb_info *info); - - /* - * Internal routines - */ - -static int sun3fb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue, - u_int *transp, struct fb_info *info); - -static struct fb_ops sun3fb_ops = { - .owner = THIS_MODULE, - .fb_get_fix = sun3fb_get_fix, - .fb_get_var = sun3fb_get_var, - .fb_set_var = sun3fb_set_var, - .fb_get_cmap = sun3fb_get_cmap, - .fb_set_cmap = sun3fb_set_cmap, - .fb_setcolreg = sun3fb_setcolreg, - .fb_blank = sun3fb_blank, -}; - -static void sun3fb_clear_margin(struct display *p, int s) -{ - struct fb_info_sbusfb *fb = sbusfbinfod(p); - - return; - - if (fb->switch_from_graph) - (*fb->switch_from_graph)(fb); - if (fb->fill) { - unsigned short rects [16]; - - rects [0] = 0; - rects [1] = 0; - rects [2] = fb->var.xres_virtual; - rects [3] = fb->y_margin; - rects [4] = 0; - rects [5] = fb->y_margin; - rects [6] = fb->x_margin; - rects [7] = fb->var.yres_virtual; - rects [8] = fb->var.xres_virtual - fb->x_margin; - rects [9] = fb->y_margin; - rects [10] = fb->var.xres_virtual; - rects [11] = fb->var.yres_virtual; - rects [12] = fb->x_margin; - rects [13] = fb->var.yres_virtual - fb->y_margin; - rects [14] = fb->var.xres_virtual - fb->x_margin; - rects [15] = fb->var.yres_virtual; - (*fb->fill)(fb, p, s, 4, rects); - } else { - unsigned char *fb_base = fb->info.screen_base, *q; - int skip_bytes = fb->y_margin * fb->var.xres_virtual; - int scr_size = fb->var.xres_virtual * fb->var.yres_virtual; - int h, he, incr, size; - - he = fb->var.yres; - if (fb->var.bits_per_pixel == 1) { - fb_base -= (skip_bytes + fb->x_margin) / 8; - skip_bytes /= 8; - scr_size /= 8; - mymemset (fb_base, skip_bytes - fb->x_margin / 8); - mymemset (fb_base + scr_size - skip_bytes + fb->x_margin / 8, skip_bytes - fb->x_margin / 8); - incr = fb->var.xres_virtual / 8; - size = fb->x_margin / 8 * 2; - for (q = fb_base + skip_bytes - fb->x_margin / 8, h = 0; - h <= he; q += incr, h++) - mymemset (q, size); - } else { - fb_base -= (skip_bytes + fb->x_margin); - memset (fb_base, attr_bgcol(p,s), skip_bytes - fb->x_margin); - memset (fb_base + scr_size - skip_bytes + fb->x_margin, attr_bgcol(p,s), skip_bytes - fb->x_margin); - incr = fb->var.xres_virtual; - size = fb->x_margin * 2; - for (q = fb_base + skip_bytes - fb->x_margin, h = 0; - h <= he; q += incr, h++) - memset (q, attr_bgcol(p,s), size); - } - } -} - -static void sun3fb_disp_setup(struct display *p) -{ - struct fb_info_sbusfb *fb = sbusfbinfod(p); - - if (fb->setup) - fb->setup(p); - sun3fb_clear_margin(p, 0); -} - - /* - * Get the Fixed Part of the Display - */ - -static int sun3fb_get_fix(struct fb_fix_screeninfo *fix, int con, - struct fb_info *info) -{ - struct fb_info_sbusfb *fb = sbusfbinfo(info); - - memcpy(fix, &fb->fix, sizeof(struct fb_fix_screeninfo)); - return 0; -} - - /* - * Get the User Defined Part of the Display - */ - -static int sun3fb_get_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info) -{ - struct fb_info_sbusfb *fb = sbusfbinfo(info); - - memcpy(var, &fb->var, sizeof(struct fb_var_screeninfo)); - return 0; -} - - /* - * Set the User Defined Part of the Display - */ - -static int sun3fb_set_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info) -{ - struct fb_info_sbusfb *fb = sbusfbinfo(info); - - if (var->xres > fb->var.xres || var->yres > fb->var.yres || - var->xres_virtual > fb->var.xres_virtual || - var->yres_virtual > fb->var.yres_virtual || - var->bits_per_pixel != fb->var.bits_per_pixel || - var->nonstd || - (var->vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED) - return -EINVAL; - memcpy(var, &fb->var, sizeof(struct fb_var_screeninfo)); - return 0; -} - - /* - * Hardware cursor - */ - -static unsigned char hw_cursor_cmap[2] = { 0, 0xff }; - -static void -sun3fb_cursor_timer_handler(unsigned long dev_addr) -{ - struct fb_info_sbusfb *fb = (struct fb_info_sbusfb *)dev_addr; - - if (!fb->setcursor) return; - - if (fb->cursor.mode & CURSOR_BLINK) { - fb->cursor.enable ^= 1; - fb->setcursor(fb); - } - - fb->cursor.timer.expires = jiffies + fb->cursor.blink_rate; - add_timer(&fb->cursor.timer); -} - -static void sun3fb_cursor(struct display *p, int mode, int x, int y) -{ - struct fb_info_sbusfb *fb = sbusfbinfod(p); - - switch (mode) { - case CM_ERASE: - fb->cursor.mode &= ~CURSOR_BLINK; - fb->cursor.enable = 0; - (*fb->setcursor)(fb); - break; - - case CM_MOVE: - case CM_DRAW: - if (fb->cursor.mode & CURSOR_SHAPE) { - fb->cursor.size.fbx = fontwidth(p); - fb->cursor.size.fby = fontheight(p); - fb->cursor.chot.fbx = 0; - fb->cursor.chot.fby = 0; - fb->cursor.enable = 1; - memset (fb->cursor.bits, 0, sizeof (fb->cursor.bits)); - fb->cursor.bits[0][fontheight(p) - 2] = (0xffffffff << (32 - fontwidth(p))); - fb->cursor.bits[1][fontheight(p) - 2] = (0xffffffff << (32 - fontwidth(p))); - fb->cursor.bits[0][fontheight(p) - 1] = (0xffffffff << (32 - fontwidth(p))); - fb->cursor.bits[1][fontheight(p) - 1] = (0xffffffff << (32 - fontwidth(p))); - (*fb->setcursormap) (fb, hw_cursor_cmap, hw_cursor_cmap, hw_cursor_cmap); - (*fb->setcurshape) (fb); - } - fb->cursor.mode = CURSOR_BLINK; - if (fontwidthlog(p)) - fb->cursor.cpos.fbx = (x << fontwidthlog(p)) + fb->x_margin; - else - fb->cursor.cpos.fbx = (x * fontwidth(p)) + fb->x_margin; - if (fontheightlog(p)) - fb->cursor.cpos.fby = (y << fontheightlog(p)) + fb->y_margin; - else - fb->cursor.cpos.fby = (y * fontheight(p)) + fb->y_margin; - (*fb->setcursor)(fb); - break; - } -} - - /* - * Get the Colormap - */ - -static int sun3fb_get_cmap(struct fb_cmap *cmap, int kspc, int con, - struct fb_info *info) -{ - if (con == info->currcon) /* current console? */ - return fb_get_cmap(cmap, kspc, sun3fb_getcolreg, info); - else if (fb_display[con].cmap.len) /* non default colormap? */ - fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2); - else - fb_copy_cmap(fb_default_cmap(1<<fb_display[con].var.bits_per_pixel), cmap, kspc ? 0 : 2); - return 0; -} - - /* - * Set the Colormap - */ - -static int sun3fb_set_cmap(struct fb_cmap *cmap, int kspc, int con, - struct fb_info *info) -{ - int err; - - if (!fb_display[con].cmap.len) { /* no colormap allocated? */ - if ((err = fb_alloc_cmap(&fb_display[con].cmap, 1<<fb_display[con].var.bits_per_pixel, 0))) - return err; - } - if (con == info->currcon) { /* current console? */ - err = fb_set_cmap(cmap, kspc, info); - if (!err) { - struct fb_info_sbusfb *fb = sbusfbinfo(info); - - if (fb->loadcmap) - (*fb->loadcmap)(fb, &fb_display[con], cmap->start, cmap->len); - } - return err; - } else - fb_copy_cmap(cmap, &fb_display[con].cmap, kspc ? 0 : 1); - return 0; -} - - /* - * Setup: parse used options - */ - -void __init sun3fb_setup(char *options) -{ - char *p; - - for (p = options;;) { - if (!strncmp(p, "font=", 5)) { - int i; - - for (i = 0; i < sizeof(fontname) - 1; i++) - if (p[i+5] == ' ' || !p[i+5]) - break; - memcpy(fontname, p+5, i); - fontname[i] = 0; - } else if (!strncmp(p, "noblink", 7)) - curblink = 0; - while (*p && *p != ' ' && *p != ',') p++; - if (*p != ',') break; - p++; - } - - return; -} - -static int sun3fbcon_switch(int con, struct fb_info *info) -{ - int x_margin, y_margin; - struct fb_info_sbusfb *fb = sbusfbinfo(info); - int lastconsole; - - /* Do we have to save the colormap? */ - if (fb_display[info->currcon].cmap.len) - fb_get_cmap(&fb_display[info->currcon].cmap, 1, sun3fb_getcolreg, info); - - if (info->display_fg) { - lastconsole = info->display_fg->vc_num; - if (lastconsole != con && - (fontwidth(&fb_display[lastconsole]) != fontwidth(&fb_display[con]) || - fontheight(&fb_display[lastconsole]) != fontheight(&fb_display[con]))) - fb->cursor.mode |= CURSOR_SHAPE; - } - x_margin = (fb_display[con].var.xres_virtual - fb_display[con].var.xres) / 2; - y_margin = (fb_display[con].var.yres_virtual - fb_display[con].var.yres) / 2; - if (fb->margins) - fb->margins(fb, &fb_display[con], x_margin, y_margin); - if (fb->graphmode || fb->x_margin != x_margin || fb->y_margin != y_margin) { - fb->x_margin = x_margin; fb->y_margin = y_margin; - sun3fb_clear_margin(&fb_display[con], 0); - } - info->currcon = con; - /* Install new colormap */ - do_install_cmap(con, info); - return 0; -} - - /* - * Update the `var' structure (called by fbcon.c) - */ - -static int sun3fbcon_updatevar(int con, struct fb_info *info) -{ - /* Nothing */ - return 0; -} - - /* - * Blank the display. - */ - -static int sun3fb_blank(int blank, struct fb_info *info) -{ - struct fb_info_sbusfb *fb = sbusfbinfo(info); - - if (blank && fb->blank) - return fb->blank(fb); - else if (!blank && fb->unblank) - return fb->unblank(fb); - return 0; -} - - /* - * Read a single color register and split it into - * colors/transparent. Return != 0 for invalid regno. - */ - -static int sun3fb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue, - u_int *transp, struct fb_info *info) -{ - struct fb_info_sbusfb *fb = sbusfbinfo(info); - - if (!fb->color_map || regno > 255) - return 1; - *red = (fb->color_map CM(regno, 0)<<8) | fb->color_map CM(regno, 0); - *green = (fb->color_map CM(regno, 1)<<8) | fb->color_map CM(regno, 1); - *blue = (fb->color_map CM(regno, 2)<<8) | fb->color_map CM(regno, 2); - *transp = 0; - return 0; -} - - - /* - * Set a single color register. The values supplied are already - * rounded down to the hardware's capabilities (according to the - * entries in the var structure). Return != 0 for invalid regno. - */ - -static int sun3fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, - u_int transp, struct fb_info *info) -{ - struct fb_info_sbusfb *fb = sbusfbinfo(info); - - if (!fb->color_map || regno > 255) - return 1; - red >>= 8; - green >>= 8; - blue >>= 8; - fb->color_map CM(regno, 0) = red; - fb->color_map CM(regno, 1) = green; - fb->color_map CM(regno, 2) = blue; - return 0; -} - -static int sun3fb_set_font(struct display *p, int width, int height) -{ - int w = p->var.xres_virtual, h = p->var.yres_virtual; - int depth = p->var.bits_per_pixel; - struct fb_info_sbusfb *fb = sbusfbinfod(p); - int x_margin, y_margin; - - if (depth > 8) depth = 8; - x_margin = (w % width) / 2; - y_margin = (h % height) / 2; - - p->var.xres = w - 2*x_margin; - p->var.yres = h - 2*y_margin; - - fb->cursor.mode |= CURSOR_SHAPE; - - if (fb->margins) - fb->margins(fb, p, x_margin, y_margin); - if (fb->x_margin != x_margin || fb->y_margin != y_margin) { - fb->x_margin = x_margin; fb->y_margin = y_margin; - sun3fb_clear_margin(p, 0); - } - - return 1; -} - -void sun3fb_palette(int enter) -{ - int i; - struct display *p; - - for (i = 0; i < MAX_NR_CONSOLES; i++) { - p = &fb_display[i]; - if (p->dispsw && p->dispsw->setup == sun3fb_disp_setup && - p->fb_info->display_fg && - p->fb_info->display_fg->vc_num == i) { - struct fb_info_sbusfb *fb = sbusfbinfod(p); - - if (fb->restore_palette) { - if (enter) - fb->restore_palette(fb); - else if (vc_cons[i].d->vc_mode != KD_GRAPHICS) - vc_cons[i].d->vc_sw->con_set_palette(vc_cons[i].d, color_table); - } - } - } -} - - /* - * Initialisation - */ -static int __init sun3fb_init_fb(int fbtype, unsigned long addr) -{ - static struct sbus_dev sdb; - struct fb_fix_screeninfo *fix; - struct fb_var_screeninfo *var; - struct display *disp; - struct fb_info_sbusfb *fb; - struct fbtype *type; - int linebytes, w, h, depth; - char *p = NULL; - - fb = kmalloc(sizeof(struct fb_info_sbusfb), GFP_ATOMIC); - if (!fb) - return -ENOMEM; - - memset(fb, 0, sizeof(struct fb_info_sbusfb)); - fix = &fb->fix; - var = &fb->var; - disp = &fb->disp; - type = &fb->type; - - sdb.reg_addrs[0].phys_addr = addr; - fb->sbdp = &sdb; - - type->fb_type = fbtype; - - type->fb_height = h = 900; - type->fb_width = w = 1152; -sizechange: - type->fb_depth = depth = (fbtype == FBTYPE_SUN2BW) ? 1 : 8; - linebytes = w * depth / 8; - type->fb_size = PAGE_ALIGN((linebytes) * h); -/* - fb->x_margin = (w & 7) / 2; - fb->y_margin = (h & 15) / 2; -*/ - fb->x_margin = fb->y_margin = 0; - - var->xres_virtual = w; - var->yres_virtual = h; - var->xres = w - 2*fb->x_margin; - var->yres = h - 2*fb->y_margin; - - var->bits_per_pixel = depth; - var->height = var->width = -1; - var->pixclock = 10000; - var->vmode = FB_VMODE_NONINTERLACED; - var->red.length = var->green.length = var->blue.length = 8; - - fix->line_length = linebytes; - fix->smem_len = type->fb_size; - fix->type = FB_TYPE_PACKED_PIXELS; - fix->visual = FB_VISUAL_PSEUDOCOLOR; - - fb->info.fbops = &sun3fb_ops; - fb->info.disp = disp; - fb->info.currcon = -1; - strcpy(fb->info.fontname, fontname); - fb->info.changevar = NULL; - fb->info.switch_con = &sun3fbcon_switch; - fb->info.updatevar = &sun3fbcon_updatevar; - fb->info.flags = FBINFO_FLAG_DEFAULT; - - fb->cursor.hwsize.fbx = 32; - fb->cursor.hwsize.fby = 32; - - if (depth > 1 && !fb->color_map) { - if((fb->color_map = kmalloc(256 * 3, GFP_ATOMIC))==NULL) - return -ENOMEM; - } - - switch(fbtype) { -#ifdef CONFIG_FB_CGSIX - case FBTYPE_SUNFAST_COLOR: - p = cgsixfb_init(fb); break; -#endif -#ifdef CONFIG_FB_BWTWO - case FBTYPE_SUN2BW: - p = bwtwofb_init(fb); break; -#endif -#ifdef CONFIG_FB_CGTHREE - case FBTYPE_SUN4COLOR: - case FBTYPE_SUN3COLOR: - type->fb_size = 0x100000; - p = cgthreefb_init(fb); break; -#endif - } - fix->smem_start = (unsigned long)fb->info.screen_base; // FIXME - - if (!p) { - kfree(fb); - return -ENODEV; - } - - if (p == SBUSFBINIT_SIZECHANGE) - goto sizechange; - - disp->dispsw = &fb->dispsw; - if (fb->setcursor) { - fb->dispsw.cursor = sun3fb_cursor; - if (curblink) { - fb->cursor.blink_rate = DEFAULT_CURSOR_BLINK_RATE; - init_timer(&fb->cursor.timer); - fb->cursor.timer.expires = jiffies + fb->cursor.blink_rate; - fb->cursor.timer.data = (unsigned long)fb; - fb->cursor.timer.function = sun3fb_cursor_timer_handler; - add_timer(&fb->cursor.timer); - } - } - fb->cursor.mode = CURSOR_SHAPE; - fb->dispsw.set_font = sun3fb_set_font; - fb->setup = fb->dispsw.setup; - fb->dispsw.setup = sun3fb_disp_setup; - fb->dispsw.clear_margins = NULL; - - disp->var = *var; - disp->visual = fix->visual; - disp->type = fix->type; - disp->type_aux = fix->type_aux; - disp->line_length = fix->line_length; - - if (fb->blank) - disp->can_soft_blank = 1; - - sun3fb_set_var(var, -1, &fb->info); - - if (register_framebuffer(&fb->info) < 0) { - kfree(fb); - return -EINVAL; - } - printk("fb%d: %s\n", fb->info.node, p); - - return 0; -} - - -int __init sun3fb_init(void) -{ - extern int con_is_present(void); - unsigned long addr; - char p4id; - - if (!con_is_present()) return -ENODEV; -#ifdef CONFIG_SUN3 - switch(*(romvec->pv_fbtype)) - { - case FBTYPE_SUN2BW: - addr = 0xfe20000; - return sun3fb_init_fb(FBTYPE_SUN2BW, addr); - case FBTYPE_SUN3COLOR: - case FBTYPE_SUN4COLOR: - if(idprom->id_machtype != (SM_SUN3|SM_3_60)) { - printk("sun3fb: cgthree/four only supported on 3/60\n"); - return -ENODEV; - } - - addr = CGFOUR_OBMEM_ADDR; - return sun3fb_init_fb(*(romvec->pv_fbtype), addr); - default: - printk("sun3fb: unsupported framebuffer\n"); - return -ENODEV; - } -#else - addr = SUN3X_VIDEO_BASE; - p4id = *(char *)SUN3X_VIDEO_P4ID; - - p4id = (p4id == 0x45) ? p4id : (p4id & 0xf0); - switch (p4id) { - case 0x00: - return sun3fb_init_fb(FBTYPE_SUN2BW, addr); -#if 0 /* not yet */ - case 0x40: - return sun3fb_init_fb(FBTYPE_SUN4COLOR, addr); - break; - case 0x45: - return sun3fb_init_fb(FBTYPE_SUN8COLOR, addr); - break; -#endif - case 0x60: - return sun3fb_init_fb(FBTYPE_SUNFAST_COLOR, addr); - } -#endif - - return -ENODEV; -} - -MODULE_LICENSE("GPL"); diff --git a/drivers/video/svgalib.c b/drivers/video/svgalib.c new file mode 100644 index 00000000000..68b30d9eac5 --- /dev/null +++ b/drivers/video/svgalib.c @@ -0,0 +1,632 @@ +/* + * Common utility functions for VGA-based graphics cards. + * + * Copyright (c) 2006-2007 Ondrej Zajicek <santiago@crfreenet.org> + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive for + * more details. + * + * Some parts are based on David Boucher's viafb (http://davesdomain.org.uk/viafb/) + */ + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/string.h> +#include <linux/fb.h> +#include <linux/svga.h> +#include <linux/slab.h> +#include <asm/types.h> +#include <asm/io.h> + + +/* Write a CRT register value spread across multiple registers */ +void svga_wcrt_multi(const struct vga_regset *regset, u32 value) { + + u8 regval, bitval, bitnum; + + while (regset->regnum != VGA_REGSET_END_VAL) { + regval = vga_rcrt(NULL, regset->regnum); + bitnum = regset->lowbit; + while (bitnum <= regset->highbit) { + bitval = 1 << bitnum; + regval = regval & ~bitval; + if (value & 1) regval = regval | bitval; + bitnum ++; + value = value >> 1; + } + vga_wcrt(NULL, regset->regnum, regval); + regset ++; + } +} + +/* Write a sequencer register value spread across multiple registers */ +void svga_wseq_multi(const struct vga_regset *regset, u32 value) { + + u8 regval, bitval, bitnum; + + while (regset->regnum != VGA_REGSET_END_VAL) { + regval = vga_rseq(NULL, regset->regnum); + bitnum = regset->lowbit; + while (bitnum <= regset->highbit) { + bitval = 1 << bitnum; + regval = regval & ~bitval; + if (value & 1) regval = regval | bitval; + bitnum ++; + value = value >> 1; + } + vga_wseq(NULL, regset->regnum, regval); + regset ++; + } +} + +static unsigned int svga_regset_size(const struct vga_regset *regset) +{ + u8 count = 0; + + while (regset->regnum != VGA_REGSET_END_VAL) { + count += regset->highbit - regset->lowbit + 1; + regset ++; + } + return 1 << count; +} + + +/* ------------------------------------------------------------------------- */ + + +/* Set graphics controller registers to sane values */ +void svga_set_default_gfx_regs(void) +{ + /* All standard GFX registers (GR00 - GR08) */ + vga_wgfx(NULL, VGA_GFX_SR_VALUE, 0x00); + vga_wgfx(NULL, VGA_GFX_SR_ENABLE, 0x00); + vga_wgfx(NULL, VGA_GFX_COMPARE_VALUE, 0x00); + vga_wgfx(NULL, VGA_GFX_DATA_ROTATE, 0x00); + vga_wgfx(NULL, VGA_GFX_PLANE_READ, 0x00); + vga_wgfx(NULL, VGA_GFX_MODE, 0x00); +/* vga_wgfx(NULL, VGA_GFX_MODE, 0x20); */ +/* vga_wgfx(NULL, VGA_GFX_MODE, 0x40); */ + vga_wgfx(NULL, VGA_GFX_MISC, 0x05); +/* vga_wgfx(NULL, VGA_GFX_MISC, 0x01); */ + vga_wgfx(NULL, VGA_GFX_COMPARE_MASK, 0x0F); + vga_wgfx(NULL, VGA_GFX_BIT_MASK, 0xFF); +} + +/* Set attribute controller registers to sane values */ +void svga_set_default_atc_regs(void) +{ + u8 count; + + vga_r(NULL, 0x3DA); + vga_w(NULL, VGA_ATT_W, 0x00); + + /* All standard ATC registers (AR00 - AR14) */ + for (count = 0; count <= 0xF; count ++) + svga_wattr(count, count); + + svga_wattr(VGA_ATC_MODE, 0x01); +/* svga_wattr(VGA_ATC_MODE, 0x41); */ + svga_wattr(VGA_ATC_OVERSCAN, 0x00); + svga_wattr(VGA_ATC_PLANE_ENABLE, 0x0F); + svga_wattr(VGA_ATC_PEL, 0x00); + svga_wattr(VGA_ATC_COLOR_PAGE, 0x00); + + vga_r(NULL, 0x3DA); + vga_w(NULL, VGA_ATT_W, 0x20); +} + +/* Set sequencer registers to sane values */ +void svga_set_default_seq_regs(void) +{ + /* Standard sequencer registers (SR01 - SR04), SR00 is not set */ + vga_wseq(NULL, VGA_SEQ_CLOCK_MODE, VGA_SR01_CHAR_CLK_8DOTS); + vga_wseq(NULL, VGA_SEQ_PLANE_WRITE, VGA_SR02_ALL_PLANES); + vga_wseq(NULL, VGA_SEQ_CHARACTER_MAP, 0x00); +/* vga_wseq(NULL, VGA_SEQ_MEMORY_MODE, VGA_SR04_EXT_MEM | VGA_SR04_SEQ_MODE | VGA_SR04_CHN_4M); */ + vga_wseq(NULL, VGA_SEQ_MEMORY_MODE, VGA_SR04_EXT_MEM | VGA_SR04_SEQ_MODE); +} + +/* Set CRTC registers to sane values */ +void svga_set_default_crt_regs(void) +{ + /* Standard CRT registers CR03 CR08 CR09 CR14 CR17 */ + svga_wcrt_mask(0x03, 0x80, 0x80); /* Enable vertical retrace EVRA */ + vga_wcrt(NULL, VGA_CRTC_PRESET_ROW, 0); + svga_wcrt_mask(VGA_CRTC_MAX_SCAN, 0, 0x1F); + vga_wcrt(NULL, VGA_CRTC_UNDERLINE, 0); + vga_wcrt(NULL, VGA_CRTC_MODE, 0xE3); +} + +void svga_set_textmode_vga_regs(void) +{ + /* svga_wseq_mask(0x1, 0x00, 0x01); */ /* Switch 8/9 pixel per char */ + vga_wseq(NULL, VGA_SEQ_MEMORY_MODE, VGA_SR04_EXT_MEM); + vga_wseq(NULL, VGA_SEQ_PLANE_WRITE, 0x03); + + vga_wcrt(NULL, VGA_CRTC_MAX_SCAN, 0x0f); /* 0x4f */ + vga_wcrt(NULL, VGA_CRTC_UNDERLINE, 0x1f); + svga_wcrt_mask(VGA_CRTC_MODE, 0x23, 0x7f); + + vga_wcrt(NULL, VGA_CRTC_CURSOR_START, 0x0d); + vga_wcrt(NULL, VGA_CRTC_CURSOR_END, 0x0e); + vga_wcrt(NULL, VGA_CRTC_CURSOR_HI, 0x00); + vga_wcrt(NULL, VGA_CRTC_CURSOR_LO, 0x00); + + vga_wgfx(NULL, VGA_GFX_MODE, 0x10); /* Odd/even memory mode */ + vga_wgfx(NULL, VGA_GFX_MISC, 0x0E); /* Misc graphics register - text mode enable */ + vga_wgfx(NULL, VGA_GFX_COMPARE_MASK, 0x00); + + vga_r(NULL, 0x3DA); + vga_w(NULL, VGA_ATT_W, 0x00); + + svga_wattr(0x10, 0x0C); /* Attribute Mode Control Register - text mode, blinking and line graphics */ + svga_wattr(0x13, 0x08); /* Horizontal Pixel Panning Register */ + + vga_r(NULL, 0x3DA); + vga_w(NULL, VGA_ATT_W, 0x20); +} + +#if 0 +void svga_dump_var(struct fb_var_screeninfo *var, int node) +{ + pr_debug("fb%d: var.vmode : 0x%X\n", node, var->vmode); + pr_debug("fb%d: var.xres : %d\n", node, var->xres); + pr_debug("fb%d: var.yres : %d\n", node, var->yres); + pr_debug("fb%d: var.bits_per_pixel: %d\n", node, var->bits_per_pixel); + pr_debug("fb%d: var.xres_virtual : %d\n", node, var->xres_virtual); + pr_debug("fb%d: var.yres_virtual : %d\n", node, var->yres_virtual); + pr_debug("fb%d: var.left_margin : %d\n", node, var->left_margin); + pr_debug("fb%d: var.right_margin : %d\n", node, var->right_margin); + pr_debug("fb%d: var.upper_margin : %d\n", node, var->upper_margin); + pr_debug("fb%d: var.lower_margin : %d\n", node, var->lower_margin); + pr_debug("fb%d: var.hsync_len : %d\n", node, var->hsync_len); + pr_debug("fb%d: var.vsync_len : %d\n", node, var->vsync_len); + pr_debug("fb%d: var.sync : 0x%X\n", node, var->sync); + pr_debug("fb%d: var.pixclock : %d\n\n", node, var->pixclock); +} +#endif /* 0 */ + + +/* ------------------------------------------------------------------------- */ + + +void svga_settile(struct fb_info *info, struct fb_tilemap *map) +{ + const u8 *font = map->data; + u8* fb = (u8 *) info->screen_base; + int i, c; + + if ((map->width != 8) || (map->height != 16) || + (map->depth != 1) || (map->length != 256)) { + printk(KERN_ERR "fb%d: unsupported font parameters: width %d, height %d, depth %d, length %d\n", + info->node, map->width, map->height, map->depth, map->length); + return; + } + + fb += 2; + for (c = 0; c < map->length; c++) { + for (i = 0; i < map->height; i++) { + fb[i * 4] = font[i]; + } + fb += 128; + font += map->height; + } +} + +/* Copy area in text (tileblit) mode */ +void svga_tilecopy(struct fb_info *info, struct fb_tilearea *area) +{ + int dx, dy; + /* colstride is halved in this function because u16 are used */ + int colstride = 1 << (info->fix.type_aux & FB_AUX_TEXT_SVGA_MASK); + int rowstride = colstride * (info->var.xres_virtual / 8); + u16 *fb = (u16 *) info->screen_base; + u16 *src, *dst; + + if ((area->sy > area->dy) || + ((area->sy == area->dy) && (area->sx > area->dx))) { + src = fb + area->sx * colstride + area->sy * rowstride; + dst = fb + area->dx * colstride + area->dy * rowstride; + } else { + src = fb + (area->sx + area->width - 1) * colstride + + (area->sy + area->height - 1) * rowstride; + dst = fb + (area->dx + area->width - 1) * colstride + + (area->dy + area->height - 1) * rowstride; + + colstride = -colstride; + rowstride = -rowstride; + } + + for (dy = 0; dy < area->height; dy++) { + u16* src2 = src; + u16* dst2 = dst; + for (dx = 0; dx < area->width; dx++) { + *dst2 = *src2; + src2 += colstride; + dst2 += colstride; + } + src += rowstride; + dst += rowstride; + } +} + +/* Fill area in text (tileblit) mode */ +void svga_tilefill(struct fb_info *info, struct fb_tilerect *rect) +{ + int dx, dy; + int colstride = 2 << (info->fix.type_aux & FB_AUX_TEXT_SVGA_MASK); + int rowstride = colstride * (info->var.xres_virtual / 8); + int attr = (0x0F & rect->bg) << 4 | (0x0F & rect->fg); + u8 *fb = (u8 *) info->screen_base; + fb += rect->sx * colstride + rect->sy * rowstride; + + for (dy = 0; dy < rect->height; dy++) { + u8* fb2 = fb; + for (dx = 0; dx < rect->width; dx++) { + fb2[0] = rect->index; + fb2[1] = attr; + fb2 += colstride; + } + fb += rowstride; + } +} + +/* Write text in text (tileblit) mode */ +void svga_tileblit(struct fb_info *info, struct fb_tileblit *blit) +{ + int dx, dy, i; + int colstride = 2 << (info->fix.type_aux & FB_AUX_TEXT_SVGA_MASK); + int rowstride = colstride * (info->var.xres_virtual / 8); + int attr = (0x0F & blit->bg) << 4 | (0x0F & blit->fg); + u8* fb = (u8 *) info->screen_base; + fb += blit->sx * colstride + blit->sy * rowstride; + + i=0; + for (dy=0; dy < blit->height; dy ++) { + u8* fb2 = fb; + for (dx = 0; dx < blit->width; dx ++) { + fb2[0] = blit->indices[i]; + fb2[1] = attr; + fb2 += colstride; + i ++; + if (i == blit->length) return; + } + fb += rowstride; + } + +} + +/* Set cursor in text (tileblit) mode */ +void svga_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor) +{ + u8 cs = 0x0d; + u8 ce = 0x0e; + u16 pos = cursor->sx + (info->var.xoffset / 8) + + (cursor->sy + (info->var.yoffset / 16)) + * (info->var.xres_virtual / 8); + + if (! cursor -> mode) + return; + + svga_wcrt_mask(0x0A, 0x20, 0x20); /* disable cursor */ + + if (cursor -> shape == FB_TILE_CURSOR_NONE) + return; + + switch (cursor -> shape) { + case FB_TILE_CURSOR_UNDERLINE: + cs = 0x0d; + break; + case FB_TILE_CURSOR_LOWER_THIRD: + cs = 0x09; + break; + case FB_TILE_CURSOR_LOWER_HALF: + cs = 0x07; + break; + case FB_TILE_CURSOR_TWO_THIRDS: + cs = 0x05; + break; + case FB_TILE_CURSOR_BLOCK: + cs = 0x01; + break; + } + + /* set cursor position */ + vga_wcrt(NULL, 0x0E, pos >> 8); + vga_wcrt(NULL, 0x0F, pos & 0xFF); + + vga_wcrt(NULL, 0x0B, ce); /* set cursor end */ + vga_wcrt(NULL, 0x0A, cs); /* set cursor start and enable it */ +} + + +/* ------------------------------------------------------------------------- */ + + +/* + * Compute PLL settings (M, N, R) + * F_VCO = (F_BASE * M) / N + * F_OUT = F_VCO / (2^R) + */ + +static inline u32 abs_diff(u32 a, u32 b) +{ + return (a > b) ? (a - b) : (b - a); +} + +int svga_compute_pll(const struct svga_pll *pll, u32 f_wanted, u16 *m, u16 *n, u16 *r, int node) +{ + u16 am, an, ar; + u32 f_vco, f_current, delta_current, delta_best; + + pr_debug("fb%d: ideal frequency: %d kHz\n", node, (unsigned int) f_wanted); + + ar = pll->r_max; + f_vco = f_wanted << ar; + + /* overflow check */ + if ((f_vco >> ar) != f_wanted) + return -EINVAL; + + /* It is usually better to have greater VCO clock + because of better frequency stability. + So first try r_max, then r smaller. */ + while ((ar > pll->r_min) && (f_vco > pll->f_vco_max)) { + ar--; + f_vco = f_vco >> 1; + } + + /* VCO bounds check */ + if ((f_vco < pll->f_vco_min) || (f_vco > pll->f_vco_max)) + return -EINVAL; + + delta_best = 0xFFFFFFFF; + *m = 0; + *n = 0; + *r = ar; + + am = pll->m_min; + an = pll->n_min; + + while ((am <= pll->m_max) && (an <= pll->n_max)) { + f_current = (pll->f_base * am) / an; + delta_current = abs_diff (f_current, f_vco); + + if (delta_current < delta_best) { + delta_best = delta_current; + *m = am; + *n = an; + } + + if (f_current <= f_vco) { + am ++; + } else { + an ++; + } + } + + f_current = (pll->f_base * *m) / *n; + pr_debug("fb%d: found frequency: %d kHz (VCO %d kHz)\n", node, (int) (f_current >> ar), (int) f_current); + pr_debug("fb%d: m = %d n = %d r = %d\n", node, (unsigned int) *m, (unsigned int) *n, (unsigned int) *r); + return 0; +} + + +/* ------------------------------------------------------------------------- */ + + +/* Check CRT timing values */ +int svga_check_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, int node) +{ + u32 value; + + var->xres = (var->xres+7)&~7; + var->left_margin = (var->left_margin+7)&~7; + var->right_margin = (var->right_margin+7)&~7; + var->hsync_len = (var->hsync_len+7)&~7; + + /* Check horizontal total */ + value = var->xres + var->left_margin + var->right_margin + var->hsync_len; + if (((value / 8) - 5) >= svga_regset_size (tm->h_total_regs)) + return -EINVAL; + + /* Check horizontal display and blank start */ + value = var->xres; + if (((value / 8) - 1) >= svga_regset_size (tm->h_display_regs)) + return -EINVAL; + if (((value / 8) - 1) >= svga_regset_size (tm->h_blank_start_regs)) + return -EINVAL; + + /* Check horizontal sync start */ + value = var->xres + var->right_margin; + if (((value / 8) - 1) >= svga_regset_size (tm->h_sync_start_regs)) + return -EINVAL; + + /* Check horizontal blank end (or length) */ + value = var->left_margin + var->right_margin + var->hsync_len; + if ((value == 0) || ((value / 8) >= svga_regset_size (tm->h_blank_end_regs))) + return -EINVAL; + + /* Check horizontal sync end (or length) */ + value = var->hsync_len; + if ((value == 0) || ((value / 8) >= svga_regset_size (tm->h_sync_end_regs))) + return -EINVAL; + + /* Check vertical total */ + value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; + if ((value - 1) >= svga_regset_size(tm->v_total_regs)) + return -EINVAL; + + /* Check vertical display and blank start */ + value = var->yres; + if ((value - 1) >= svga_regset_size(tm->v_display_regs)) + return -EINVAL; + if ((value - 1) >= svga_regset_size(tm->v_blank_start_regs)) + return -EINVAL; + + /* Check vertical sync start */ + value = var->yres + var->lower_margin; + if ((value - 1) >= svga_regset_size(tm->v_sync_start_regs)) + return -EINVAL; + + /* Check vertical blank end (or length) */ + value = var->upper_margin + var->lower_margin + var->vsync_len; + if ((value == 0) || (value >= svga_regset_size (tm->v_blank_end_regs))) + return -EINVAL; + + /* Check vertical sync end (or length) */ + value = var->vsync_len; + if ((value == 0) || (value >= svga_regset_size (tm->v_sync_end_regs))) + return -EINVAL; + + return 0; +} + +/* Set CRT timing registers */ +void svga_set_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, + u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node) +{ + u8 regval; + u32 value; + + value = var->xres + var->left_margin + var->right_margin + var->hsync_len; + value = (value * hmul) / hdiv; + pr_debug("fb%d: horizontal total : %d\n", node, value); + svga_wcrt_multi(tm->h_total_regs, (value / 8) - 5); + + value = var->xres; + value = (value * hmul) / hdiv; + pr_debug("fb%d: horizontal display : %d\n", node, value); + svga_wcrt_multi(tm->h_display_regs, (value / 8) - 1); + + value = var->xres; + value = (value * hmul) / hdiv; + pr_debug("fb%d: horizontal blank start: %d\n", node, value); + svga_wcrt_multi(tm->h_blank_start_regs, (value / 8) - 1 + hborder); + + value = var->xres + var->left_margin + var->right_margin + var->hsync_len; + value = (value * hmul) / hdiv; + pr_debug("fb%d: horizontal blank end : %d\n", node, value); + svga_wcrt_multi(tm->h_blank_end_regs, (value / 8) - 1 - hborder); + + value = var->xres + var->right_margin; + value = (value * hmul) / hdiv; + pr_debug("fb%d: horizontal sync start : %d\n", node, value); + svga_wcrt_multi(tm->h_sync_start_regs, (value / 8)); + + value = var->xres + var->right_margin + var->hsync_len; + value = (value * hmul) / hdiv; + pr_debug("fb%d: horizontal sync end : %d\n", node, value); + svga_wcrt_multi(tm->h_sync_end_regs, (value / 8)); + + value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; + value = (value * vmul) / vdiv; + pr_debug("fb%d: vertical total : %d\n", node, value); + svga_wcrt_multi(tm->v_total_regs, value - 2); + + value = var->yres; + value = (value * vmul) / vdiv; + pr_debug("fb%d: vertical display : %d\n", node, value); + svga_wcrt_multi(tm->v_display_regs, value - 1); + + value = var->yres; + value = (value * vmul) / vdiv; + pr_debug("fb%d: vertical blank start : %d\n", node, value); + svga_wcrt_multi(tm->v_blank_start_regs, value); + + value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; + value = (value * vmul) / vdiv; + pr_debug("fb%d: vertical blank end : %d\n", node, value); + svga_wcrt_multi(tm->v_blank_end_regs, value - 2); + + value = var->yres + var->lower_margin; + value = (value * vmul) / vdiv; + pr_debug("fb%d: vertical sync start : %d\n", node, value); + svga_wcrt_multi(tm->v_sync_start_regs, value); + + value = var->yres + var->lower_margin + var->vsync_len; + value = (value * vmul) / vdiv; + pr_debug("fb%d: vertical sync end : %d\n", node, value); + svga_wcrt_multi(tm->v_sync_end_regs, value); + + /* Set horizontal and vertical sync pulse polarity in misc register */ + + regval = vga_r(NULL, VGA_MIS_R); + if (var->sync & FB_SYNC_HOR_HIGH_ACT) { + pr_debug("fb%d: positive horizontal sync\n", node); + regval = regval & ~0x80; + } else { + pr_debug("fb%d: negative horizontal sync\n", node); + regval = regval | 0x80; + } + if (var->sync & FB_SYNC_VERT_HIGH_ACT) { + pr_debug("fb%d: positive vertical sync\n", node); + regval = regval & ~0x40; + } else { + pr_debug("fb%d: negative vertical sync\n\n", node); + regval = regval | 0x40; + } + vga_w(NULL, VGA_MIS_W, regval); +} + + +/* ------------------------------------------------------------------------- */ + + +int svga_match_format(const struct svga_fb_format *frm, struct fb_var_screeninfo *var, struct fb_fix_screeninfo *fix) +{ + int i = 0; + + while (frm->bits_per_pixel != SVGA_FORMAT_END_VAL) + { + if ((var->bits_per_pixel == frm->bits_per_pixel) && + (var->red.length <= frm->red.length) && + (var->green.length <= frm->green.length) && + (var->blue.length <= frm->blue.length) && + (var->transp.length <= frm->transp.length) && + (var->nonstd == frm->nonstd)) { + var->bits_per_pixel = frm->bits_per_pixel; + var->red = frm->red; + var->green = frm->green; + var->blue = frm->blue; + var->transp = frm->transp; + var->nonstd = frm->nonstd; + if (fix != NULL) { + fix->type = frm->type; + fix->type_aux = frm->type_aux; + fix->visual = frm->visual; + fix->xpanstep = frm->xpanstep; + } + return i; + } + i++; + frm++; + } + return -EINVAL; +} + + +EXPORT_SYMBOL(svga_wcrt_multi); +EXPORT_SYMBOL(svga_wseq_multi); + +EXPORT_SYMBOL(svga_set_default_gfx_regs); +EXPORT_SYMBOL(svga_set_default_atc_regs); +EXPORT_SYMBOL(svga_set_default_seq_regs); +EXPORT_SYMBOL(svga_set_default_crt_regs); +EXPORT_SYMBOL(svga_set_textmode_vga_regs); + +EXPORT_SYMBOL(svga_settile); +EXPORT_SYMBOL(svga_tilecopy); +EXPORT_SYMBOL(svga_tilefill); +EXPORT_SYMBOL(svga_tileblit); +EXPORT_SYMBOL(svga_tilecursor); + +EXPORT_SYMBOL(svga_compute_pll); +EXPORT_SYMBOL(svga_check_timings); +EXPORT_SYMBOL(svga_set_timings); +EXPORT_SYMBOL(svga_match_format); + +MODULE_AUTHOR("Ondrej Zajicek <santiago@crfreenet.org>"); +MODULE_DESCRIPTION("Common utility functions for VGA-based graphics cards"); +MODULE_LICENSE("GPL"); diff --git a/drivers/video/tgafb.c b/drivers/video/tgafb.c index 4b88fab83b7..b604859b4dd 100644 --- a/drivers/video/tgafb.c +++ b/drivers/video/tgafb.c @@ -43,8 +43,9 @@ static void tgafb_imageblit(struct fb_info *, const struct fb_image *); static void tgafb_fillrect(struct fb_info *, const struct fb_fillrect *); static void tgafb_copyarea(struct fb_info *, const struct fb_copyarea *); -static int tgafb_pci_register(struct pci_dev *, const struct pci_device_id *); -static void tgafb_pci_unregister(struct pci_dev *); +static int __devinit tgafb_pci_register(struct pci_dev *, + const struct pci_device_id *); +static void __devexit tgafb_pci_unregister(struct pci_dev *); static const char *mode_option = "640x480@60"; @@ -70,9 +71,10 @@ static struct fb_ops tgafb_ops = { */ static struct pci_device_id const tgafb_pci_table[] = { - { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TGA, PCI_ANY_ID, PCI_ANY_ID, - 0, 0, 0 } + { PCI_DEVICE(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TGA) }, + { } }; +MODULE_DEVICE_TABLE(pci, tgafb_pci_table); static struct pci_driver tgafb_driver = { .name = "tgafb", @@ -99,6 +101,12 @@ tgafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) if (var->bits_per_pixel != 32) return -EINVAL; } + var->red.length = var->green.length = var->blue.length = 8; + if (var->bits_per_pixel == 32) { + var->red.offset = 16; + var->green.offset = 8; + var->blue.offset = 0; + } if (var->xres_virtual != var->xres || var->yres_virtual != var->yres) return -EINVAL; @@ -137,10 +145,10 @@ tgafb_set_par(struct fb_info *info) 0x00000303 }; static unsigned int const mode_presets[4] = { - 0x00002000, - 0x00002300, + 0x00000000, + 0x00000300, 0xffffffff, - 0x00002300 + 0x00000300 }; static unsigned int const base_addr_presets[4] = { 0x00000000, @@ -152,7 +160,7 @@ tgafb_set_par(struct fb_info *info) struct tga_par *par = (struct tga_par *) info->par; u32 htimings, vtimings, pll_freq; u8 tga_type; - int i, j; + int i; /* Encode video timings. */ htimings = (((info->var.xres/4) & TGA_HORIZ_ACT_LSB) @@ -190,7 +198,9 @@ tgafb_set_par(struct fb_info *info) while (TGA_READ_REG(par, TGA_CMD_STAT_REG) & 1) /* wait for not busy */ continue; mb(); - TGA_WRITE_REG(par, deep_presets[tga_type], TGA_DEEP_REG); + TGA_WRITE_REG(par, deep_presets[tga_type] | + (par->sync_on_green ? 0x0 : 0x00010000), + TGA_DEEP_REG); while (TGA_READ_REG(par, TGA_CMD_STAT_REG) & 1) /* wait for not busy */ continue; mb(); @@ -227,8 +237,10 @@ tgafb_set_par(struct fb_info *info) BT485_WRITE(par, 0x00, BT485_ADDR_PAL_WRITE); TGA_WRITE_REG(par, BT485_DATA_PAL, TGA_RAMDAC_SETUP_REG); +#ifdef CONFIG_HW_CONSOLE for (i = 0; i < 16; i++) { - j = color_table[i]; + int j = color_table[i]; + TGA_WRITE_REG(par, default_red[j]|(BT485_DATA_PAL<<8), TGA_RAMDAC_REG); TGA_WRITE_REG(par, default_grn[j]|(BT485_DATA_PAL<<8), @@ -236,24 +248,27 @@ tgafb_set_par(struct fb_info *info) TGA_WRITE_REG(par, default_blu[j]|(BT485_DATA_PAL<<8), TGA_RAMDAC_REG); } - for (i = 0; i < 240*3; i += 4) { - TGA_WRITE_REG(par, 0x55|(BT485_DATA_PAL<<8), + for (i = 0; i < 240 * 3; i += 4) { +#else + for (i = 0; i < 256 * 3; i += 4) { +#endif + TGA_WRITE_REG(par, 0x55 | (BT485_DATA_PAL << 8), TGA_RAMDAC_REG); - TGA_WRITE_REG(par, 0x00|(BT485_DATA_PAL<<8), + TGA_WRITE_REG(par, 0x00 | (BT485_DATA_PAL << 8), TGA_RAMDAC_REG); - TGA_WRITE_REG(par, 0x00|(BT485_DATA_PAL<<8), + TGA_WRITE_REG(par, 0x00 | (BT485_DATA_PAL << 8), TGA_RAMDAC_REG); - TGA_WRITE_REG(par, 0x00|(BT485_DATA_PAL<<8), + TGA_WRITE_REG(par, 0x00 | (BT485_DATA_PAL << 8), TGA_RAMDAC_REG); } } else { /* 24-plane or 24plusZ */ - /* Init BT463 registers. */ + /* Init BT463 RAMDAC registers. */ BT463_WRITE(par, BT463_REG_ACC, BT463_CMD_REG_0, 0x40); BT463_WRITE(par, BT463_REG_ACC, BT463_CMD_REG_1, 0x08); BT463_WRITE(par, BT463_REG_ACC, BT463_CMD_REG_2, - (par->sync_on_green ? 0x80 : 0x40)); + (par->sync_on_green ? 0xc0 : 0x40)); BT463_WRITE(par, BT463_REG_ACC, BT463_READ_MASK_0, 0xff); BT463_WRITE(par, BT463_REG_ACC, BT463_READ_MASK_1, 0xff); @@ -267,26 +282,24 @@ tgafb_set_par(struct fb_info *info) /* Fill the palette. */ BT463_LOAD_ADDR(par, 0x0000); - TGA_WRITE_REG(par, BT463_PALETTE<<2, TGA_RAMDAC_REG); + TGA_WRITE_REG(par, BT463_PALETTE << 2, TGA_RAMDAC_SETUP_REG); +#ifdef CONFIG_HW_CONSOLE for (i = 0; i < 16; i++) { - j = color_table[i]; - TGA_WRITE_REG(par, default_red[j]|(BT463_PALETTE<<10), - TGA_RAMDAC_REG); - TGA_WRITE_REG(par, default_grn[j]|(BT463_PALETTE<<10), - TGA_RAMDAC_REG); - TGA_WRITE_REG(par, default_blu[j]|(BT463_PALETTE<<10), - TGA_RAMDAC_REG); + int j = color_table[i]; + + TGA_WRITE_REG(par, default_red[j], TGA_RAMDAC_REG); + TGA_WRITE_REG(par, default_grn[j], TGA_RAMDAC_REG); + TGA_WRITE_REG(par, default_blu[j], TGA_RAMDAC_REG); } - for (i = 0; i < 512*3; i += 4) { - TGA_WRITE_REG(par, 0x55|(BT463_PALETTE<<10), - TGA_RAMDAC_REG); - TGA_WRITE_REG(par, 0x00|(BT463_PALETTE<<10), - TGA_RAMDAC_REG); - TGA_WRITE_REG(par, 0x00|(BT463_PALETTE<<10), - TGA_RAMDAC_REG); - TGA_WRITE_REG(par, 0x00|(BT463_PALETTE<<10), - TGA_RAMDAC_REG); + for (i = 0; i < 512 * 3; i += 4) { +#else + for (i = 0; i < 528 * 3; i += 4) { +#endif + TGA_WRITE_REG(par, 0x55, TGA_RAMDAC_REG); + TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG); + TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG); + TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG); } /* Fill window type table after start of vertical retrace. */ @@ -299,15 +312,12 @@ tgafb_set_par(struct fb_info *info) TGA_WRITE_REG(par, 0x01, TGA_INTR_STAT_REG); BT463_LOAD_ADDR(par, BT463_WINDOW_TYPE_BASE); - TGA_WRITE_REG(par, BT463_REG_ACC<<2, TGA_RAMDAC_SETUP_REG); + TGA_WRITE_REG(par, BT463_REG_ACC << 2, TGA_RAMDAC_SETUP_REG); for (i = 0; i < 16; i++) { - TGA_WRITE_REG(par, 0x00|(BT463_REG_ACC<<10), - TGA_RAMDAC_REG); - TGA_WRITE_REG(par, 0x01|(BT463_REG_ACC<<10), - TGA_RAMDAC_REG); - TGA_WRITE_REG(par, 0x80|(BT463_REG_ACC<<10), - TGA_RAMDAC_REG); + TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG); + TGA_WRITE_REG(par, 0x01, TGA_RAMDAC_REG); + TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG); } } @@ -435,9 +445,16 @@ tgafb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue, TGA_WRITE_REG(par, red|(BT485_DATA_PAL<<8),TGA_RAMDAC_REG); TGA_WRITE_REG(par, green|(BT485_DATA_PAL<<8),TGA_RAMDAC_REG); TGA_WRITE_REG(par, blue|(BT485_DATA_PAL<<8),TGA_RAMDAC_REG); - } else if (regno < 16) { - u32 value = (red << 16) | (green << 8) | blue; - ((u32 *)info->pseudo_palette)[regno] = value; + } else { + if (regno < 16) { + u32 value = (regno << 16) | (regno << 8) | regno; + ((u32 *)info->pseudo_palette)[regno] = value; + } + BT463_LOAD_ADDR(par, regno); + TGA_WRITE_REG(par, BT463_PALETTE << 2, TGA_RAMDAC_SETUP_REG); + TGA_WRITE_REG(par, red, TGA_RAMDAC_REG); + TGA_WRITE_REG(par, green, TGA_RAMDAC_REG); + TGA_WRITE_REG(par, blue, TGA_RAMDAC_REG); } return 0; @@ -885,7 +902,7 @@ copyarea_line_8bpp(struct fb_info *info, u32 dy, u32 sy, n64 = (height * width) / 64; - if (dy < sy) { + if (sy < dy) { spos = (sy + height) * width; dpos = (dy + height) * width; @@ -933,7 +950,7 @@ copyarea_line_32bpp(struct fb_info *info, u32 dy, u32 sy, n16 = (height * width) / 16; - if (dy < sy) { + if (sy < dy) { src = tga_fb + (sy + height) * width * 4; dst = tga_fb + (dy + height) * width * 4; @@ -1317,7 +1334,7 @@ tgafb_init_fix(struct fb_info *info) info->fix.type_aux = 0; info->fix.visual = (tga_type == TGA_TYPE_8PLANE ? FB_VISUAL_PSEUDOCOLOR - : FB_VISUAL_TRUECOLOR); + : FB_VISUAL_DIRECTCOLOR); info->fix.line_length = par->xres * (par->bits_per_pixel >> 3); info->fix.smem_start = (size_t) par->tga_fb_base; @@ -1342,14 +1359,10 @@ tgafb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent) TGA_24PLUSZ_FB_OFFSET }; - struct all_info { - struct fb_info info; - struct tga_par par; - u32 pseudo_palette[16]; - } *all; - void __iomem *mem_base; unsigned long bar0_start, bar0_len; + struct fb_info *info; + struct tga_par *par; u8 tga_type; int ret; @@ -1360,13 +1373,14 @@ tgafb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent) } /* Allocate the fb and par structures. */ - all = kmalloc(sizeof(*all), GFP_KERNEL); - if (!all) { + info = framebuffer_alloc(sizeof(struct tga_par), &pdev->dev); + if (!info) { printk(KERN_ERR "tgafb: Cannot allocate memory\n"); return -ENOMEM; } - memset(all, 0, sizeof(*all)); - pci_set_drvdata(pdev, all); + + par = info->par; + pci_set_drvdata(pdev, info); /* Request the mem regions. */ bar0_start = pci_resource_start(pdev, 0); @@ -1386,25 +1400,23 @@ tgafb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent) /* Grab info about the card. */ tga_type = (readl(mem_base) >> 12) & 0x0f; - all->par.pdev = pdev; - all->par.tga_mem_base = mem_base; - all->par.tga_fb_base = mem_base + fb_offset_presets[tga_type]; - all->par.tga_regs_base = mem_base + TGA_REGS_OFFSET; - all->par.tga_type = tga_type; - pci_read_config_byte(pdev, PCI_REVISION_ID, &all->par.tga_chip_rev); + par->pdev = pdev; + par->tga_mem_base = mem_base; + par->tga_fb_base = mem_base + fb_offset_presets[tga_type]; + par->tga_regs_base = mem_base + TGA_REGS_OFFSET; + par->tga_type = tga_type; + pci_read_config_byte(pdev, PCI_REVISION_ID, &par->tga_chip_rev); /* Setup framebuffer. */ - all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_COPYAREA | - FBINFO_HWACCEL_IMAGEBLIT | FBINFO_HWACCEL_FILLRECT; - all->info.fbops = &tgafb_ops; - all->info.screen_base = all->par.tga_fb_base; - all->info.par = &all->par; - all->info.pseudo_palette = all->pseudo_palette; + info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_COPYAREA | + FBINFO_HWACCEL_IMAGEBLIT | FBINFO_HWACCEL_FILLRECT; + info->fbops = &tgafb_ops; + info->screen_base = par->tga_fb_base; + info->pseudo_palette = (void *)(par + 1); /* This should give a reasonable default video mode. */ - ret = fb_find_mode(&all->info.var, &all->info, mode_option, - NULL, 0, NULL, + ret = fb_find_mode(&info->var, info, mode_option, NULL, 0, NULL, tga_type == TGA_TYPE_8PLANE ? 8 : 32); if (ret == 0 || ret == 4) { printk(KERN_ERR "tgafb: Could not find valid video mode\n"); @@ -1412,29 +1424,28 @@ tgafb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent) goto err1; } - if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { + if (fb_alloc_cmap(&info->cmap, 256, 0)) { printk(KERN_ERR "tgafb: Could not allocate color map\n"); ret = -ENOMEM; goto err1; } - tgafb_set_par(&all->info); - tgafb_init_fix(&all->info); + tgafb_set_par(info); + tgafb_init_fix(info); - all->info.device = &pdev->dev; - if (register_framebuffer(&all->info) < 0) { + if (register_framebuffer(info) < 0) { printk(KERN_ERR "tgafb: Could not register framebuffer\n"); ret = -EINVAL; goto err1; } printk(KERN_INFO "tgafb: DC21030 [TGA] detected, rev=0x%02x\n", - all->par.tga_chip_rev); + par->tga_chip_rev); printk(KERN_INFO "tgafb: at PCI bus %d, device %d, function %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); printk(KERN_INFO "fb%d: %s frame buffer device at 0x%lx\n", - all->info.node, all->info.fix.id, bar0_start); + info->node, info->fix.id, bar0_start); return 0; @@ -1443,11 +1454,11 @@ tgafb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent) iounmap(mem_base); release_mem_region(bar0_start, bar0_len); err0: - kfree(all); + framebuffer_release(info); return ret; } -static void __exit +static void __devexit tgafb_pci_unregister(struct pci_dev *pdev) { struct fb_info *info = pci_get_drvdata(pdev); @@ -1456,22 +1467,21 @@ tgafb_pci_unregister(struct pci_dev *pdev) if (!info) return; unregister_framebuffer(info); + fb_dealloc_cmap(&info->cmap); iounmap(par->tga_mem_base); release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); - kfree(info); + framebuffer_release(info); } -#ifdef MODULE -static void __exit +static void __devexit tgafb_exit(void) { pci_unregister_driver(&tgafb_driver); } -#endif /* MODULE */ #ifndef MODULE -int __init +static int __devinit tgafb_setup(char *arg) { char *this_opt; @@ -1493,7 +1503,7 @@ tgafb_setup(char *arg) } #endif /* !MODULE */ -int __init +static int __devinit tgafb_init(void) { #ifndef MODULE @@ -1511,10 +1521,7 @@ tgafb_init(void) */ module_init(tgafb_init); - -#ifdef MODULE module_exit(tgafb_exit); -#endif MODULE_DESCRIPTION("framebuffer driver for TGA chipset"); MODULE_LICENSE("GPL"); diff --git a/drivers/video/vga16fb.c b/drivers/video/vga16fb.c index 6aff63d5b29..ec4c7dc54a6 100644 --- a/drivers/video/vga16fb.c +++ b/drivers/video/vga16fb.c @@ -70,7 +70,8 @@ struct vga16fb_par { unsigned char ClockingMode; /* Seq-Controller:01h */ } vga_state; struct vgastate state; - atomic_t ref_count; + struct mutex open_lock; + unsigned int ref_count; int palette_blanked, vesa_blanked, mode, isVGA; u8 misc, pel_msk, vss, clkdiv; u8 crtc[VGA_CRT_C]; @@ -300,28 +301,33 @@ static void vga16fb_clock_chip(struct vga16fb_par *par, static int vga16fb_open(struct fb_info *info, int user) { struct vga16fb_par *par = info->par; - int cnt = atomic_read(&par->ref_count); - if (!cnt) { + mutex_lock(&par->open_lock); + if (!par->ref_count) { memset(&par->state, 0, sizeof(struct vgastate)); par->state.flags = VGA_SAVE_FONTS | VGA_SAVE_MODE | VGA_SAVE_CMAP; save_vga(&par->state); } - atomic_inc(&par->ref_count); + par->ref_count++; + mutex_unlock(&par->open_lock); + return 0; } static int vga16fb_release(struct fb_info *info, int user) { struct vga16fb_par *par = info->par; - int cnt = atomic_read(&par->ref_count); - if (!cnt) + mutex_lock(&par->open_lock); + if (!par->ref_count) { + mutex_unlock(&par->open_lock); return -EINVAL; - if (cnt == 1) + } + if (par->ref_count == 1) restore_vga(&par->state); - atomic_dec(&par->ref_count); + par->ref_count--; + mutex_unlock(&par->open_lock); return 0; } @@ -1357,6 +1363,7 @@ static int __init vga16fb_probe(struct platform_device *dev) printk(KERN_INFO "vga16fb: mapped to 0x%p\n", info->screen_base); par = info->par; + mutex_init(&par->open_lock); par->isVGA = ORIG_VIDEO_ISVGA; par->palette_blanked = 0; par->vesa_blanked = 0; diff --git a/drivers/video/virgefb.c b/drivers/video/virgefb.c deleted file mode 100644 index b9fb6fb3600..00000000000 --- a/drivers/video/virgefb.c +++ /dev/null @@ -1,2526 +0,0 @@ -/* - * linux/drivers/video/virgefb.c -- CyberVision64/3D frame buffer device - * - * Copyright (C) 1997 André Heynatz - * - * - * This file is based on the CyberVision frame buffer device (cyberfb.c): - * - * Copyright (C) 1996 Martin Apel - * Geert Uytterhoeven - * - * Zorro II additions : - * - * Copyright (C) 1998-2000 Christian T. Steigies - * - * Initialization additions : - * - * Copyright (C) 1998-2000 Ken Tyler - * - * Parts of the Initialization code are based on Cyberfb.c by Allan Bair, - * and on the NetBSD CyberVision64 frame buffer driver by Michael Teske who gave - * permission for its use. - * - * Many thanks to Frank Mariak for his assistance with ZORRO 2 access and other - * mysteries. - * - * - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive - * for more details. - */ - -#undef VIRGEFBDEBUG -#undef VIRGEFBDUMP - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/string.h> -#include <linux/mm.h> -#include <linux/slab.h> -#include <linux/delay.h> -#include <linux/zorro.h> -#include <linux/fb.h> -#include <linux/init.h> -#include <asm/uaccess.h> -#include <asm/system.h> -#include <asm/amigahw.h> -#include <asm/io.h> -#include <asm/irq.h> -#include <video/fbcon.h> -#include <video/fbcon-cfb8.h> -#include <video/fbcon-cfb16.h> -#include <video/fbcon-cfb32.h> - -#include "virgefb.h" - -#ifdef VIRGEFBDEBUG -#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args) -#else -#define DPRINTK(fmt, args...) -#endif - -#ifdef VIRGEFBDUMP -static void cv64_dump(void); -#define DUMP cv64_dump() -#else -#define DUMP -#endif - -/* - * Macros for register access and zorro control - */ - -static inline void mb_inline(void) { mb(); } /* for use in comma expressions */ - -/* Set zorro 2 map */ - -#define SelectIO \ - mb(); \ - if (on_zorro2) { \ - (*(volatile u16 *)((u8 *)(vcode_switch_base + 0x04)) = 0x01); \ - mb(); \ - } - -#define SelectMMIO \ - mb(); \ - if (on_zorro2) { \ - (*(volatile u16 *)((u8 *)(vcode_switch_base + 0x04)) = 0x02); \ - mb(); \ - } - -#define SelectCFG \ - mb(); \ - if (on_zorro2) { \ - (*(volatile u16 *)((u8 *)(vcode_switch_base + 0x04)) = 0x03); \ - mb(); \ - } - -/* Set pass through, 0 = amiga, !=0 = cv64/3d */ - -#define SetVSwitch(x) \ - mb(); \ - (*(volatile u16 *)((u8 *)(vcode_switch_base)) = \ - (u16)(x ? 0 : 1)); \ - mb(); - -/* Zorro2 endian 'aperture' */ - -#define ENDIAN_BYTE 2 -#define ENDIAN_WORD 1 -#define ENDIAN_LONG 0 - -#define Select_Zorro2_FrameBuffer(x) \ - do { \ - if (on_zorro2) { \ - mb(); \ - (*(volatile u16 *)((u8 *)(vcode_switch_base + 0x08)) = \ - (x * 0x40)); \ - mb(); \ - } \ - } while (0) - -/* SetPortVal - only used for interrupt enable (not yet implemented) */ - -#if 0 -#define SetPortVal(x) \ - mb(); \ - (*(volatile u16 *)((u8 *)(vcode_switch_base + 0x0c)) = \ - (u16)x); \ - mb(); -#endif - -/* IO access */ - -#define byte_access_io(x) (((x) & 0x3ffc) | (((x) & 3)^3) | (((x) & 3) <<14)) -#define byte_access_mmio(x) (((x) & 0xfffc) | (((x) & 3)^3)) - -/* Write 8 bit VGA register - used once for chip wakeup */ - -#define wb_vgaio(reg, dat) \ - SelectIO; \ - (*(volatile u8 *)(vgaio_regs + ((u32)byte_access_io(reg) & 0xffff)) = \ - (dat & 0xff)); \ - SelectMMIO; - -/* Read 8 bit VGA register - only used in dump (SelectIO not needed on read ?) */ - -#ifdef VIRGEFBDUMP -#define rb_vgaio(reg) \ - ({ \ - u8 __zzyzx; \ - SelectIO; \ - __zzyzx = (*(volatile u8 *)((vgaio_regs)+(u32)byte_access_io(reg))); \ - SelectMMIO; \ - __zzyzx; \ - }) -#endif - -/* MMIO access */ - -/* Read 8 bit MMIO register */ - -#define rb_mmio(reg) \ - (mb_inline(), \ - (*(volatile u8 *)(mmio_regs + 0x8000 + (u32)byte_access_mmio(reg)))) - -/* Write 8 bit MMIO register */ - -#define wb_mmio(reg,dat) \ - mb(); \ - (*(volatile u8 *)(mmio_regs + 0x8000 + (byte_access_mmio((reg) & 0xffff))) = \ - (dat & 0xff)); \ - mb(); - -/* Read 32 bit MMIO register */ - -#define rl_mmio(reg) \ - (mb_inline(), \ - (*((volatile u32 *)((u8 *)((mmio_regs + (on_zorro2 ? 0x20000 : 0)) + (reg)))))) - -/* Write 32 bit MMIO register */ - -#define wl_mmio(reg,dat) \ - mb(); \ - ((*(volatile u32 *)((u8 *)((mmio_regs + (on_zorro2 ? 0x20000 : 0)) + (reg)))) = \ - (u32)(dat)); \ - mb(); - -/* Write to virge graphics register */ - -#define wgfx(reg, dat) do { wb_mmio(GCT_ADDRESS, (reg)); wb_mmio(GCT_ADDRESS_W, (dat)); } while (0) - -/* Write to virge sequencer register */ - -#define wseq(reg, dat) do { wb_mmio(SEQ_ADDRESS, (reg)); wb_mmio(SEQ_ADDRESS_W, (dat)); } while (0) - -/* Write to virge CRT controller register */ - -#define wcrt(reg, dat) do { wb_mmio(CRT_ADDRESS, (reg)); wb_mmio(CRT_ADDRESS_W, (dat)); } while (0) - -/* Write to virge attribute register */ - -#define watr(reg, dat) \ - do { \ - volatile unsigned char watr_tmp; \ - watr_tmp = rb_mmio(ACT_ADDRESS_RESET); \ - wb_mmio(ACT_ADDRESS_W, (reg)); \ - wb_mmio(ACT_ADDRESS_W, (dat)); \ - udelay(10); \ - } while (0) - -/* end of macros */ - -struct virgefb_par { - struct fb_var_screeninfo var; - __u32 type; - __u32 type_aux; - __u32 visual; - __u32 line_length; -}; - -static struct virgefb_par current_par; - -static int current_par_valid = 0; - -static struct display disp; -static struct fb_info fb_info; - -static union { -#ifdef FBCON_HAS_CFB16 - u16 cfb16[16]; -#endif -#ifdef FBCON_HAS_CFB32 - u32 cfb32[16]; -#endif -} fbcon_cmap; - -/* - * Switch for Chipset Independency - */ - -static struct fb_hwswitch { - - /* Initialisation */ - - int (*init)(void); - - /* Display Control */ - - int (*encode_fix)(struct fb_fix_screeninfo *fix, struct virgefb_par *par); - int (*decode_var)(struct fb_var_screeninfo *var, struct virgefb_par *par); - int (*encode_var)(struct fb_var_screeninfo *var, struct virgefb_par *par); - int (*getcolreg)(u_int regno, u_int *red, u_int *green, u_int *blue, - u_int *transp, struct fb_info *info); - void (*blank)(int blank); -} *fbhw; - -static unsigned char blit_maybe_busy = 0; - -/* - * Frame Buffer Name - */ - -static char virgefb_name[16] = "CyberVision/3D"; - -/* - * CyberVision64/3d Graphics Board - */ - -static unsigned char virgefb_colour_table [256][3]; -static unsigned long v_ram; -static unsigned long v_ram_size; -static volatile unsigned char *mmio_regs; -static volatile unsigned char *vgaio_regs; - -static unsigned long v_ram_phys; -static unsigned long mmio_regs_phys; -static unsigned long vcode_switch_base; -static unsigned char on_zorro2; - -/* - * Offsets from start of video ram to appropriate ZIII aperture - */ - -#ifdef FBCON_HAS_CFB8 -#define CYBMEM_OFFSET_8 0x800000 /* BGRX */ -#endif -#ifdef FBCON_HAS_CFB16 -#define CYBMEM_OFFSET_16 0x400000 /* GBXR */ -#endif -#ifdef FBCON_HAS_CFB32 -#define CYBMEM_OFFSET_32 0x000000 /* XRGB */ -#endif - -/* - * MEMCLOCK was 32MHz, 64MHz works, 72MHz doesn't (on my board) - */ - -#define MEMCLOCK 50000000 - -/* - * Predefined Video Modes - */ - -static struct { - const char *name; - struct fb_var_screeninfo var; -} virgefb_predefined[] __initdata = { -#ifdef FBCON_HAS_CFB8 - { - "640x480-8", { /* Cybervision 8 bpp */ - 640, 480, 640, 480, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 31250, 160, 136, 82, 61, 88, 2, - 0, FB_VMODE_NONINTERLACED - } - }, { - "768x576-8", { /* Cybervision 8 bpp */ - 768, 576, 768, 576, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 29411, 144, 112, 32, 15, 64, 2, - 0, FB_VMODE_NONINTERLACED - } - }, { - "800x600-8", { /* Cybervision 8 bpp */ - 800, 600, 800, 600, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 28571, 168, 104, 22, 1, 48, 2, - 0, FB_VMODE_NONINTERLACED - } - }, { - #if 0 - "1024x768-8", { /* Cybervision 8 bpp */ - 1024, 768, 1024, 768, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 20833, 272, 168, 39, 2, 72, 1, - 0, FB_VMODE_NONINTERLACED - } - #else - "1024x768-8", { - 1024, 768, 1024, 768, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - #if 0 - 0, 0, -1, -1, FB_ACCELF_TEXT, 12500, 184, 40, 40, 2, 96, 1, - FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - } - #else - 0, 0, -1, -1, FB_ACCELF_TEXT, 12699, 176, 16, 28, 1, 96, 3, - FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - } - #endif - #endif - }, { - "1152x886-8", { /* Cybervision 8 bpp */ - 1152, 886, 1152, 886, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 19230, 280, 168, 45, 1, 64, 10, - 0, FB_VMODE_NONINTERLACED - } - }, { - "1280x1024-8", { /* Cybervision 8 bpp */ - 1280, 1024, 1280, 1024, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - #if 0 - 0, 0, -1, -1, FB_ACCELF_TEXT, 17857, 232, 232, 71, 15, 176, 12, - } - #else - 0, 0, -1, -1, FB_ACCELF_TEXT, 7414, 232, 64, 38, 1, 112, 3, - FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - } - #endif - }, { - "1600x1200-8", { /* Cybervision 8 bpp */ - 1600, 1200, 1600, 1200, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - #if 0 - 0, 0, -1, -1, FB_ACCELF_TEXT, 13698, 336, 224, 77, 15, 176, 12, - 0, FB_VMODE_NONINTERLACED - } - #else - 0, 0, -1, -1, FB_ACCELF_TEXT, 6411, 256, 32, 52, 10, 160, 8, - FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - } - #endif - }, -#endif - -#ifdef FBCON_HAS_CFB16 - { - "640x480-16", { /* Cybervision 16 bpp */ - 640, 480, 640, 480, 0, 0, 16, 0, - {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 31250, 152, 144, 82, 61, 88, 2, - 0, FB_VMODE_NONINTERLACED - } - }, { - "768x576-16", { /* Cybervision 16 bpp */ - 768, 576, 768, 576, 0, 0, 16, 0, - {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 29411, 144, 112, 32, 15, 64, 2, - 0, FB_VMODE_NONINTERLACED - } - }, { - "800x600-16", { /* Cybervision 16 bpp */ - 800, 600, 800, 600, 0, 0, 16, 0, - {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 28571, 168, 104, 22, 1, 48, 2, - 0, FB_VMODE_NONINTERLACED - } - }, { -#if 0 - "1024x768-16", { /* Cybervision 16 bpp */ - 1024, 768, 1024, 768, 0, 0, 16, 0, - {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 20833, 272, 168, 39, 2, 72, 1, - 0, FB_VMODE_NONINTERLACED - } -#else - "1024x768-16", { - 1024, 768, 1024, 768, 0, 0, 16, 0, - {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 12500, 184, 40, 40, 2, 96, 1, - FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - } -#endif - }, { - "1152x886-16", { /* Cybervision 16 bpp */ - 1152, 886, 1152, 886, 0, 0, 16, 0, - {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 19230, 280, 168, 45, 1, 64, 10, - 0, FB_VMODE_NONINTERLACED - } - }, { - "1280x1024-16", { /* Cybervision 16 bpp */ - 1280, 1024, 1280, 1024, 0, 0, 16, 0, - {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 17857, 232, 232, 71, 15, 176, 12, - 0, FB_VMODE_NONINTERLACED - } - }, { - "1600x1200-16", { /* Cybervision 16 bpp */ - 1600, 1200, 1600, 1200, 0, 0, 16, 0, - {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 13698, 336, 224, 77, 15, 176, 12, - 0, FB_VMODE_NONINTERLACED - } - }, -#endif - -#ifdef FBCON_HAS_CFB32 - { - "640x480-32", { /* Cybervision 32 bpp */ - 640, 480, 640, 480, 0, 0, 32, 0, - {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {24, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 31250, 160, 136, 82, 61, 88, 2, - 0, FB_VMODE_NONINTERLACED - } - }, { - "768x576-32", { /* Cybervision 32 bpp */ - 768, 576, 768, 576, 0, 0, 32, 0, - {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {24, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 29411, 144, 112, 32, 15, 64, 2, - 0, FB_VMODE_NONINTERLACED - } - }, { - "800x600-32", { /* Cybervision 32 bpp */ - 800, 600, 800, 600, 0, 0, 32, 0, - {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {24, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 28571, 168, 104, 22, 1, 48, 2, - 0, FB_VMODE_NONINTERLACED - } - }, { - "1024x768-32", { /* Cybervision 32 bpp */ - 1024, 768, 1024, 768, 0, 0, 32, 0, - {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {24, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 20833, 272, 168, 39, 2, 72, 1, - 0, FB_VMODE_NONINTERLACED - } - }, { - "1152x886-32", { /* Cybervision 32 bpp */ - 1152, 886, 1152, 886, 0, 0, 32, 0, - {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {24, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 19230, 280, 168, 45, 1, 64, 10, - 0, FB_VMODE_NONINTERLACED - } - }, { - "1280x1024-32", { /* Cybervision 32 bpp */ - 1280, 1024, 1280, 1024, 0, 0, 32, 0, - {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {24, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 17857, 232, 232, 71, 15, 176, 12, - 0, FB_VMODE_NONINTERLACED - } - }, { - "1600x1200-32", { /* Cybervision 32 bpp */ - 1600, 1200, 1600, 1200, 0, 0, 32, 0, - {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {24, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 13698, 336, 224, 77, 15, 176, 12, - 0, FB_VMODE_NONINTERLACED - } - }, -#endif - -/* interlaced modes */ - -#ifdef FBCON_HAS_CFB8 - { - "1024x768-8i", { /* Cybervision 8 bpp */ - 1024, 768, 1024, 768, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 20833, 272, 168, 39, 2, 72, 1, - 0, FB_VMODE_INTERLACED - } - }, { - "1280x1024-8i", { /* Cybervision 8 bpp */ - 1280, 1024, 1280, 1024, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 17857, 232, 232, 71, 15, 176, 12, - 0, FB_VMODE_INTERLACED - } - }, { - "1600x1200-8i", { /* Cybervision 8 bpp */ - 1600, 1200, 1600, 1200, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 13698, 336, 224, 77, 15, 176, 12, - 0, FB_VMODE_INTERLACED - } - }, -#endif - -#ifdef FBCON_HAS_CFB16 - { - "1024x768-16i", { /* Cybervision 16 bpp */ - 1024, 768, 1024, 768, 0, 0, 16, 0, - {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 20833, 272, 168, 39, 2, 72, 1, - 0, FB_VMODE_INTERLACED - } - }, { - "1280x1024-16i", { /* Cybervision 16 bpp */ - 1280, 1024, 1280, 1024, 0, 0, 16, 0, - {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 17857, 232, 232, 71, 15, 176, 12, - 0, FB_VMODE_INTERLACED - } - }, { - "1600x1200-16i", { /* Cybervision 16 bpp */ - 1600, 1200, 1600, 1200, 0, 0, 16, 0, - {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 13698, 336, 224, 77, 15, 176, 12, - 0, FB_VMODE_INTERLACED - } - }, -#endif - -#ifdef FBCON_HAS_CFB32 - { - "1024x768-32i", { /* Cybervision 32 bpp */ - 1024, 768, 1024, 768, 0, 0, 32, 0, - {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {24, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 22222, 216, 144, 39, 2, 72, 1, - 0, FB_VMODE_INTERLACED - } - }, { - "1280x1024-32i", { /* Cybervision 32 bpp */ - 1280, 1024, 1280, 1024, 0, 0, 32, 0, - {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {23, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 17857, 232, 232, 71, 15, 176, 12, - 0, FB_VMODE_INTERLACED - } - }, { - "1600x1200-32i", { /* Cybervision 32 bpp */ - 1600, 1200, 1600, 1200, 0, 0, 32, 0, - {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {24, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 13698, 336, 224, 77, 15, 176, 12, - 0, FB_VMODE_INTERLACED - } - }, -#endif - -/* doublescan modes */ - -#ifdef FBCON_HAS_CFB8 - { - "320x240-8d", { /* Cybervision 8 bpp */ - 320, 240, 320, 240, 0, 0, 8, 0, - {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 59259, 80, 80, 45, 26, 32, 1, - 0, FB_VMODE_DOUBLE - } - }, -#endif - -#ifdef FBCON_HAS_CFB16 - { - "320x240-16d", { /* Cybervision 16 bpp */ - 320, 240, 320, 240, 0, 0, 16, 0, - {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 59259, 80, 80, 45, 26, 32, 1, - 0, FB_VMODE_DOUBLE - } - }, -#endif - -#ifdef FBCON_HAS_CFB32 - { - "320x240-32d", { /* Cybervision 32 bpp */ - 320, 240, 320, 240, 0, 0, 32, 0, - {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {24, 0, 0}, - 0, 0, -1, -1, FB_ACCELF_TEXT, 59259, 80, 80, 45, 26, 32, 1, - 0, FB_VMODE_DOUBLE - } - }, -#endif -}; - -#define NUM_TOTAL_MODES ARRAY_SIZE(virgefb_predefined) - -/* - * Default to 800x600 for video=virge8:, virge16: or virge32: - */ - -#ifdef FBCON_HAS_CFB8 -#define VIRGE8_DEFMODE (2) -#endif - -#ifdef FBCON_HAS_CFB16 -#define VIRGE16_DEFMODE (9) -#endif - -#ifdef FBCON_HAS_CFB32 -#define VIRGE32_DEFMODE (16) -#endif - -static struct fb_var_screeninfo virgefb_default; -static int virgefb_inverse = 0; - -/* - * Interface used by the world - */ - -int virgefb_setup(char*); -static int virgefb_get_fix(struct fb_fix_screeninfo *fix, int con, - struct fb_info *info); -static int virgefb_get_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info); -static int virgefb_set_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info); -static int virgefb_get_cmap(struct fb_cmap *cmap, int kspc, int con, - struct fb_info *info); -static int virgefb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, - u_int transp, struct fb_info *info); -static int virgefb_blank(int blank, struct fb_info *info); - -/* - * Interface to the low level console driver - */ - -int virgefb_init(void); -static int virgefb_switch(int con, struct fb_info *info); -static int virgefb_updatevar(int con, struct fb_info *info); - -/* - * Text console acceleration - */ - -#ifdef FBCON_HAS_CFB8 -static struct display_switch fbcon_virge8; -#endif - -#ifdef FBCON_HAS_CFB16 -static struct display_switch fbcon_virge16; -#endif - -#ifdef FBCON_HAS_CFB32 -static struct display_switch fbcon_virge32; -#endif - -/* - * Hardware Specific Routines - */ - -static int virge_init(void); -static int virgefb_encode_fix(struct fb_fix_screeninfo *fix, - struct virgefb_par *par); -static int virgefb_decode_var(struct fb_var_screeninfo *var, - struct virgefb_par *par); -static int virgefb_encode_var(struct fb_var_screeninfo *var, - struct virgefb_par *par); -static int virgefb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue, - u_int *transp, struct fb_info *info); -static void virgefb_gfx_on_off(int blank); -static inline void virgefb_wait_for_idle(void); -static void virgefb_BitBLT(u_short curx, u_short cury, u_short destx, u_short desty, - u_short width, u_short height, u_short stride, u_short depth); -static void virgefb_RectFill(u_short x, u_short y, u_short width, u_short height, - u_short color, u_short stride, u_short depth); - -/* - * Internal routines - */ - -static void virgefb_get_par(struct virgefb_par *par); -static void virgefb_set_par(struct virgefb_par *par); -static int virgefb_do_fb_set_var(struct fb_var_screeninfo *var, int isactive); -static void virgefb_set_disp(int con, struct fb_info *info); -static int virgefb_get_video_mode(const char *name); -static void virgefb_set_video(struct fb_var_screeninfo *var); - -/* - * Additions for Initialization - */ - -static void virgefb_load_video_mode(struct fb_var_screeninfo *video_mode); -static int cv3d_has_4mb(void); -static unsigned short virgefb_compute_clock(unsigned long freq); -static inline unsigned char rattr(short); -static inline unsigned char rseq(short); -static inline unsigned char rcrt(short); -static inline unsigned char rgfx(short); -static inline void gfx_on_off(int toggle); -static void virgefb_pci_init(void); - -/* -------------------- Hardware specific routines ------------------------- */ - -/* - * Functions for register access - */ - -/* Read attribute controller register */ - -static inline unsigned char rattr(short idx) -{ - volatile unsigned char rattr_tmp; - - rattr_tmp = rb_mmio(ACT_ADDRESS_RESET); - wb_mmio(ACT_ADDRESS_W, idx); - return (rb_mmio(ACT_ADDRESS_R)); -} - -/* Read sequencer register */ - -static inline unsigned char rseq(short idx) -{ - wb_mmio(SEQ_ADDRESS, idx); - return (rb_mmio(SEQ_ADDRESS_R)); -} - -/* Read CRT controller register */ - -static inline unsigned char rcrt(short idx) -{ - wb_mmio(CRT_ADDRESS, idx); - return (rb_mmio(CRT_ADDRESS_R)); -} - -/* Read graphics controller register */ - -static inline unsigned char rgfx(short idx) -{ - wb_mmio(GCT_ADDRESS, idx); - return (rb_mmio(GCT_ADDRESS_R)); -} - - -/* - * Initialization - */ - -/* PCI init */ - -void virgefb_pci_init(void) { - - DPRINTK("ENTER\n"); - - SelectCFG; - - if (on_zorro2) { - *((short *)(vgaio_regs + 0x00000010)) = 0; - *((long *)(vgaio_regs + 0x00000004)) = 0x02000003; - } else { - *((short *)(vgaio_regs + 0x000e0010)) = 0; - *((long *)(vgaio_regs + 0x000e0004)) = 0x02000003; - } - - /* SelectIO is in wb_vgaio macro */ - wb_vgaio(SREG_VIDEO_SUBS_ENABLE, 0x01); - /* SelectMMIO is in wb_vgaio macro */ - - DPRINTK("EXIT\n"); - - return; -} - -/* - * Initalize all mode independent regs, find mem size and clear mem -*/ - -static int virge_init(void) -{ - int i; - unsigned char tmp; - - DPRINTK("ENTER\n"); - - virgefb_pci_init(); - - wb_mmio(GREG_MISC_OUTPUT_W, 0x07); /* colour, ram enable, clk sel */ - - wseq(SEQ_ID_UNLOCK_EXT, 0x06); /* unlock extensions */ - tmp = rb_mmio(GREG_MISC_OUTPUT_R); - wcrt(CRT_ID_REGISTER_LOCK_1, 0x48); /* unlock CR2D to CR3F */ - - wcrt(CRT_ID_BACKWAD_COMP_1, 0x00); /* irq disable */ - - wcrt(CRT_ID_REGISTER_LOCK_2, 0xa5); /* unlock CR40 to CRFF and more */ - wcrt(CRT_ID_REGISTER_LOCK,0x00); /* unlock h and v timing */ - wcrt(CRT_ID_SYSTEM_CONFIG, 0x01); /* unlock enhanced programming registers */ - - wb_mmio(GREG_FEATURE_CONTROL_W, 0x00); - - wcrt(CRT_ID_EXT_MISC_CNTL, 0x00); /* b2 = 0 to allow VDAC mmio access */ -#if 0 - /* write strap options ... ? */ - wcrt(CRT_ID_CONFIG_1, 0x08); - wcrt(CRT_ID_CONFIG_2, 0xff); /* 0x0x2 bit needs to be set ?? */ - wcrt(CRT_ID_CONFIG_3, 0x0f); - wcrt(CRT_ID_CONFIG_4, 0x1a); -#endif - wcrt(CRT_ID_EXT_MISC_CNTL_1, 0x82); /* PCI DE and software reset S3D engine */ - /* EXT_MISC_CNTL_1, CR66 bit 0 should be the same as bit 0 MR_ADVANCED_FUNCTION_CONTROL - check */ - wl_mmio(MR_ADVANCED_FUNCTION_CONTROL, 0x00000011); /* enhanced mode, linear addressing */ - -/* crtc registers */ - - wcrt(CRT_ID_PRESET_ROW_SCAN, 0x00); - - /* Disable h/w cursor */ - - wcrt(CRT_ID_CURSOR_START, 0x00); - wcrt(CRT_ID_CURSOR_END, 0x00); - wcrt(CRT_ID_START_ADDR_HIGH, 0x00); - wcrt(CRT_ID_START_ADDR_LOW, 0x00); - wcrt(CRT_ID_CURSOR_LOC_HIGH, 0x00); - wcrt(CRT_ID_CURSOR_LOC_LOW, 0x00); - wcrt(CRT_ID_EXT_MODE, 0x00); - wcrt(CRT_ID_HWGC_MODE, 0x00); - wcrt(CRT_ID_HWGC_ORIGIN_X_HI, 0x00); - wcrt(CRT_ID_HWGC_ORIGIN_X_LO, 0x00); - wcrt(CRT_ID_HWGC_ORIGIN_Y_HI, 0x00); - wcrt(CRT_ID_HWGC_ORIGIN_Y_LO, 0x00); - i = rcrt(CRT_ID_HWGC_MODE); - wcrt(CRT_ID_HWGC_FG_STACK, 0x00); - wcrt(CRT_ID_HWGC_FG_STACK, 0x00); - wcrt(CRT_ID_HWGC_FG_STACK, 0x00); - wcrt(CRT_ID_HWGC_BG_STACK, 0x00); - wcrt(CRT_ID_HWGC_BG_STACK, 0x00); - wcrt(CRT_ID_HWGC_BG_STACK, 0x00); - wcrt(CRT_ID_HWGC_START_AD_HI, 0x00); - wcrt(CRT_ID_HWGC_START_AD_LO, 0x00); - wcrt(CRT_ID_HWGC_DSTART_X, 0x00); - wcrt(CRT_ID_HWGC_DSTART_Y, 0x00); - - wcrt(CRT_ID_UNDERLINE_LOC, 0x00); - - wcrt(CRT_ID_MODE_CONTROL, 0xe3); - wcrt(CRT_ID_BACKWAD_COMP_2, 0x22); /* blank bdr bit 5 blanking only on 8 bit */ - - wcrt(CRT_ID_EX_SYNC_1, 0x00); - - /* memory */ - - wcrt(CRT_ID_EXT_SYS_CNTL_3, 0x00); - wcrt(CRT_ID_MEMORY_CONF, 0x08); /* config enhanced map */ - wcrt(CRT_ID_EXT_MEM_CNTL_1, 0x08); /* MMIO Select (0x0c works as well)*/ - wcrt(CRT_ID_EXT_MEM_CNTL_2, 0x02); /* why 02 big endian 00 works ? */ - wcrt(CRT_ID_EXT_MEM_CNTL_4, 0x9f); /* config big endian - 0x00 ? */ - wcrt(CRT_ID_LAW_POS_HI, 0x00); - wcrt(CRT_ID_LAW_POS_LO, 0x00); - wcrt(CRT_ID_EXT_MISC_CNTL_1, 0x81); - wcrt(CRT_ID_MISC_1, 0x90); /* must follow CRT_ID_EXT_MISC_CNTL_1 */ - wcrt(CRT_ID_LAW_CNTL, 0x13); /* force 4 Meg for test */ - if (cv3d_has_4mb()) { - v_ram_size = 0x00400000; - wcrt(CRT_ID_LAW_CNTL, 0x13); /* 4 MB */ - } else { - v_ram_size = 0x00200000; - wcrt(CRT_ID_LAW_CNTL, 0x12); /* 2 MB */ - } - - if (on_zorro2) - v_ram_size -= 0x60000; /* we need some space for the registers */ - - wcrt(CRT_ID_EXT_SYS_CNTL_4, 0x00); - wcrt(CRT_ID_EXT_DAC_CNTL, 0x00); /* 0x10 for X11 cursor mode */ - -/* sequencer registers */ - - wseq(SEQ_ID_CLOCKING_MODE, 0x01); /* 8 dot clock */ - wseq(SEQ_ID_MAP_MASK, 0xff); - wseq(SEQ_ID_CHAR_MAP_SELECT, 0x00); - wseq(SEQ_ID_MEMORY_MODE, 0x02); - wseq(SEQ_ID_RAMDAC_CNTL, 0x00); - wseq(SEQ_ID_SIGNAL_SELECT, 0x00); - wseq(SEQ_ID_EXT_SEQ_REG9, 0x00); /* MMIO and PIO reg access enabled */ - wseq(SEQ_ID_EXT_MISC_SEQ, 0x00); - wseq(SEQ_ID_CLKSYN_CNTL_1, 0x00); - wseq(SEQ_ID_EXT_SEQ, 0x00); - -/* graphic registers */ - - wgfx(GCT_ID_SET_RESET, 0x00); - wgfx(GCT_ID_ENABLE_SET_RESET, 0x00); - wgfx(GCT_ID_COLOR_COMPARE, 0x00); - wgfx(GCT_ID_DATA_ROTATE, 0x00); - wgfx(GCT_ID_READ_MAP_SELECT, 0x00); - wgfx(GCT_ID_GRAPHICS_MODE, 0x40); - wgfx(GCT_ID_MISC, 0x01); - wgfx(GCT_ID_COLOR_XCARE, 0x0f); - wgfx(GCT_ID_BITMASK, 0xff); - -/* attribute registers */ - - for(i = 0; i <= 15; i++) - watr(ACT_ID_PALETTE0 + i, i); - watr(ACT_ID_ATTR_MODE_CNTL, 0x41); - watr(ACT_ID_OVERSCAN_COLOR, 0xff); - watr(ACT_ID_COLOR_PLANE_ENA, 0x0f); - watr(ACT_ID_HOR_PEL_PANNING, 0x00); - watr(ACT_ID_COLOR_SELECT, 0x00); - - wb_mmio(VDAC_MASK, 0xff); - -/* init local cmap as greyscale levels */ - - for (i = 0; i < 256; i++) { - virgefb_colour_table [i][0] = i; - virgefb_colour_table [i][1] = i; - virgefb_colour_table [i][2] = i; - } - -/* clear framebuffer memory */ - - memset((char*)v_ram, 0x00, v_ram_size); - - DPRINTK("EXIT\n"); - return 0; -} - - -/* - * This function should fill in the `fix' structure based on the - * values in the `par' structure. - */ - -static int virgefb_encode_fix(struct fb_fix_screeninfo *fix, - struct virgefb_par *par) -{ - DPRINTK("ENTER set video phys addr\n"); - - memset(fix, 0, sizeof(struct fb_fix_screeninfo)); - strcpy(fix->id, virgefb_name); - if (on_zorro2) - fix->smem_start = v_ram_phys; - switch (par->var.bits_per_pixel) { -#ifdef FBCON_HAS_CFB8 - case 8: - if (on_zorro2) - Select_Zorro2_FrameBuffer(ENDIAN_BYTE); - else - fix->smem_start = (v_ram_phys + CYBMEM_OFFSET_8); - break; -#endif -#ifdef FBCON_HAS_CFB16 - case 16: - if (on_zorro2) - Select_Zorro2_FrameBuffer(ENDIAN_WORD); - else - fix->smem_start = (v_ram_phys + CYBMEM_OFFSET_16); - break; -#endif -#ifdef FBCON_HAS_CFB32 - case 32: - if (on_zorro2) - Select_Zorro2_FrameBuffer(ENDIAN_LONG); - else - fix->smem_start = (v_ram_phys + CYBMEM_OFFSET_32); - break; -#endif - } - - fix->smem_len = v_ram_size; - fix->mmio_start = mmio_regs_phys; - fix->mmio_len = 0x10000; /* TODO: verify this for the CV64/3D */ - - fix->type = FB_TYPE_PACKED_PIXELS; - fix->type_aux = 0; - if (par->var.bits_per_pixel == 8) - fix->visual = FB_VISUAL_PSEUDOCOLOR; - else - fix->visual = FB_VISUAL_TRUECOLOR; - - fix->xpanstep = 0; - fix->ypanstep = 0; - fix->ywrapstep = 0; - fix->line_length = par->var.xres_virtual*par->var.bits_per_pixel/8; - fix->accel = FB_ACCEL_S3_VIRGE; - DPRINTK("EXIT v_ram_phys = 0x%8.8lx\n", (unsigned long)fix->smem_start); - return 0; -} - - -/* - * Fill the `par' structure based on the values in `var'. - * TODO: Verify and adjust values, return -EINVAL if bad. - */ - -static int virgefb_decode_var(struct fb_var_screeninfo *var, - struct virgefb_par *par) -{ - DPRINTK("ENTER\n"); - par->var.xres = var->xres; - par->var.yres = var->yres; - par->var.xres_virtual = var->xres_virtual; - par->var.yres_virtual = var->yres_virtual; - /* roundup and validate */ - par->var.xres = (par->var.xres+7) & ~7; - par->var.xres_virtual = (par->var.xres_virtual+7) & ~7; - if (par->var.xres_virtual < par->var.xres) - par->var.xres_virtual = par->var.xres; - if (par->var.yres_virtual < par->var.yres) - par->var.yres_virtual = par->var.yres; - par->var.xoffset = var->xoffset; - par->var.yoffset = var->yoffset; - par->var.bits_per_pixel = var->bits_per_pixel; - if (par->var.bits_per_pixel <= 8) - par->var.bits_per_pixel = 8; - else if (par->var.bits_per_pixel <= 16) - par->var.bits_per_pixel = 16; - else - par->var.bits_per_pixel = 32; -#ifndef FBCON_HAS_CFB32 - if (par->var.bits_per_pixel == 32) - par->var.bits_per_pixel = 16; -#endif -#ifndef FBCON_HAS_CFB16 - if (par->var.bits_per_pixel == 16) - par->var.bits_per_pixel = 8; -#endif - par->var.grayscale = var->grayscale; - par->var.red = var->red; - par->var.green = var->green; - par->var.blue = var->blue; - par->var.transp = var->transp; - par->var.nonstd = var->nonstd; - par->var.activate = var->activate; - par->var.height = var->height; - par->var.width = var->width; - if (var->accel_flags & FB_ACCELF_TEXT) { - par->var.accel_flags = FB_ACCELF_TEXT; - } else { - par->var.accel_flags = 0; - } - par->var.pixclock = var->pixclock; - par->var.left_margin = var->left_margin; - par->var.right_margin = var->right_margin; - par->var.upper_margin = var->upper_margin; - par->var.lower_margin = var->lower_margin; - par->var.hsync_len = var->hsync_len; - par->var.vsync_len = var->vsync_len; - par->var.sync = var->sync; - par->var.vmode = var->vmode; - DPRINTK("EXIT\n"); - return 0; -} - -/* - * Fill the `var' structure based on the values in `par' and maybe - * other values read out of the hardware. - */ - -static int virgefb_encode_var(struct fb_var_screeninfo *var, - struct virgefb_par *par) -{ - DPRINTK("ENTER\n"); - memset(var, 0, sizeof(struct fb_var_screeninfo)); /* need this ? */ - var->xres = par->var.xres; - var->yres = par->var.yres; - var->xres_virtual = par->var.xres_virtual; - var->yres_virtual = par->var.yres_virtual; - var->xoffset = par->var.xoffset; - var->yoffset = par->var.yoffset; - var->bits_per_pixel = par->var.bits_per_pixel; - var->grayscale = par->var.grayscale; - var->red = par->var.red; - var->green = par->var.green; - var->blue = par->var.blue; - var->transp = par->var.transp; - var->nonstd = par->var.nonstd; - var->activate = par->var.activate; - var->height = par->var.height; - var->width = par->var.width; - var->accel_flags = par->var.accel_flags; - var->pixclock = par->var.pixclock; - var->left_margin = par->var.left_margin; - var->right_margin = par->var.right_margin; - var->upper_margin = par->var.upper_margin; - var->lower_margin = par->var.lower_margin; - var->hsync_len = par->var.hsync_len; - var->vsync_len = par->var.vsync_len; - var->sync = par->var.sync; - var->vmode = par->var.vmode; - DPRINTK("EXIT\n"); - return 0; -} - -/* - * Set a single color register. The values supplied are already - * rounded down to the hardware's capabilities (according to the - * entries in the var structure). Return != 0 for invalid regno. - */ - -static int virgefb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, - u_int transp, struct fb_info *info) -{ - DPRINTK("ENTER\n"); - if (((current_par.var.bits_per_pixel==8) && (regno>255)) || - ((current_par.var.bits_per_pixel!=8) && (regno>15))) { - DPRINTK("EXIT\n"); - return 1; - } - if (((current_par.var.bits_per_pixel==8) && (regno<256)) || - ((current_par.var.bits_per_pixel!=8) && (regno<16))) { - virgefb_colour_table [regno][0] = red >> 10; - virgefb_colour_table [regno][1] = green >> 10; - virgefb_colour_table [regno][2] = blue >> 10; - } - - switch (current_par.var.bits_per_pixel) { -#ifdef FBCON_HAS_CFB8 - case 8: - wb_mmio(VDAC_ADDRESS_W, (unsigned char)regno); - wb_mmio(VDAC_DATA, ((unsigned char)(red >> 10))); - wb_mmio(VDAC_DATA, ((unsigned char)(green >> 10))); - wb_mmio(VDAC_DATA, ((unsigned char)(blue >> 10))); - break; -#endif -#ifdef FBCON_HAS_CFB16 - case 16: - fbcon_cmap.cfb16[regno] = - ((red & 0xf800) | - ((green & 0xfc00) >> 5) | - ((blue & 0xf800) >> 11)); - break; -#endif -#ifdef FBCON_HAS_CFB32 - case 32: - fbcon_cmap.cfb32[regno] = - /* transp = 0's or 1's ? */ - (((red & 0xff00) << 8) | - ((green & 0xff00) >> 0) | - ((blue & 0xff00) >> 8)); - break; -#endif - } - DPRINTK("EXIT\n"); - return 0; -} - - -/* - * Read a single color register and split it into - * colors/transparent. Return != 0 for invalid regno. - */ - -static int virgefb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue, - u_int *transp, struct fb_info *info) -{ - int t; - - DPRINTK("ENTER\n"); - if (regno > 255) { - DPRINTK("EXIT\n"); - return 1; - } - if (((current_par.var.bits_per_pixel==8) && (regno<256)) || - ((current_par.var.bits_per_pixel!=8) && (regno<16))) { - - t = virgefb_colour_table [regno][0]; - *red = (t<<10) | (t<<4) | (t>>2); - t = virgefb_colour_table [regno][1]; - *green = (t<<10) | (t<<4) | (t>>2); - t = virgefb_colour_table [regno][2]; - *blue = (t<<10) | (t<<4) | (t>>2); - } - *transp = 0; - DPRINTK("EXIT\n"); - return 0; -} - - -/* - * (Un)Blank the screen - */ - -static void virgefb_gfx_on_off(int blank) -{ - DPRINTK("ENTER\n"); - gfx_on_off(blank); - DPRINTK("EXIT\n"); -} - -/* - * CV3D low-level support - */ - - -static inline void wait_3d_fifo_slots(int n) /* WaitQueue */ -{ - do { - mb(); - } while (((rl_mmio(MR_SUBSYSTEM_STATUS_R) >> 8) & 0x1f) < (n + 2)); -} - -static inline void virgefb_wait_for_idle(void) /* WaitIdle */ -{ - while(!(rl_mmio(MR_SUBSYSTEM_STATUS_R) & 0x2000)) ; - blit_maybe_busy = 0; -} - - /* - * BitBLT - Through the Plane - */ - -static void virgefb_BitBLT(u_short curx, u_short cury, u_short destx, u_short desty, - u_short width, u_short height, u_short stride, u_short depth) -{ - unsigned int blitcmd = S3V_BITBLT | S3V_DRAW | S3V_BLT_COPY; - - switch (depth) { -#ifdef FBCON_HAS_CFB8 - case 8 : - blitcmd |= S3V_DST_8BPP; - break; -#endif -#ifdef FBCON_HAS_CFB16 - case 16 : - blitcmd |= S3V_DST_16BPP; - break; -#endif -#ifdef FBCON_HAS_CFB32 - case 32 : - /* 32 bit uses 2 by 16 bit values, see fbcon_virge32_bmove */ - blitcmd |= S3V_DST_16BPP; - break; -#endif - } - - /* Set drawing direction */ - /* -Y, X maj, -X (default) */ - if (curx > destx) { - blitcmd |= (1 << 25); /* Drawing direction +X */ - } else { - curx += (width - 1); - destx += (width - 1); - } - - if (cury > desty) { - blitcmd |= (1 << 26); /* Drawing direction +Y */ - } else { - cury += (height - 1); - desty += (height - 1); - } - - wait_3d_fifo_slots(8); /* wait on fifo slots for 8 writes */ - - if (blit_maybe_busy) - virgefb_wait_for_idle(); - blit_maybe_busy = 1; - - wl_mmio(BLT_PATTERN_COLOR, 1); /* pattern fb color */ - wl_mmio(BLT_MONO_PATTERN_0, ~0); - wl_mmio(BLT_MONO_PATTERN_1, ~0); - wl_mmio(BLT_SIZE_X_Y, ((width << 16) | height)); - wl_mmio(BLT_SRC_X_Y, ((curx << 16) | cury)); - wl_mmio(BLT_DEST_X_Y, ((destx << 16) | desty)); - wl_mmio(BLT_SRC_DEST_STRIDE, (((stride << 16) | stride) /* & 0x0ff80ff8 */)); /* why is this needed now ? */ - wl_mmio(BLT_COMMAND_SET, blitcmd); -} - -/* - * Rectangle Fill Solid - */ - -static void virgefb_RectFill(u_short x, u_short y, u_short width, u_short height, - u_short color, u_short stride, u_short depth) -{ - unsigned int blitcmd = S3V_RECTFILL | S3V_DRAW | - S3V_BLT_CLEAR | S3V_MONO_PAT | (1 << 26) | (1 << 25); - - switch (depth) { -#ifdef FBCON_HAS_CFB8 - case 8 : - blitcmd |= S3V_DST_8BPP; - break; -#endif -#ifdef FBCON_HAS_CFB16 - case 16 : - blitcmd |= S3V_DST_16BPP; - break; -#endif -#ifdef FBCON_HAS_CFB32 - case 32 : - /* 32 bit uses 2 times 16 bit values, see fbcon_virge32_clear */ - blitcmd |= S3V_DST_16BPP; - break; -#endif - } - - wait_3d_fifo_slots(5); /* wait on fifo slots for 5 writes */ - - if (blit_maybe_busy) - virgefb_wait_for_idle(); - blit_maybe_busy = 1; - - wl_mmio(BLT_PATTERN_COLOR, (color & 0xff)); - wl_mmio(BLT_SIZE_X_Y, ((width << 16) | height)); - wl_mmio(BLT_DEST_X_Y, ((x << 16) | y)); - wl_mmio(BLT_SRC_DEST_STRIDE, (((stride << 16) | stride) /* & 0x0ff80ff8 */)); - wl_mmio(BLT_COMMAND_SET, blitcmd); -} - -/* - * Move cursor to x, y - */ - -#if 0 -static void virgefb_move_cursor(u_short x, u_short y) -{ - DPRINTK("Yuck .... MoveCursor on a 3D\n"); - return 0; -} -#endif - -/* -------------------- Interfaces to hardware functions -------------------- */ - -static struct fb_hwswitch virgefb_hw_switch = { - .init = virge_init, - .encode_fix = virgefb_encode_fix, - .decode_var = virgefb_decode_var, - .encode_var = virgefb_encode_var, - .getcolreg = virgefb_getcolreg, - .blank = virgefb_gfx_on_off -}; - - -/* -------------------- Generic routines ------------------------------------ */ - - -/* - * Fill the hardware's `par' structure. - */ - -static void virgefb_get_par(struct virgefb_par *par) -{ - DPRINTK("ENTER\n"); - if (current_par_valid) { - *par = current_par; - } else { - fbhw->decode_var(&virgefb_default, par); - } - DPRINTK("EXIT\n"); -} - - -static void virgefb_set_par(struct virgefb_par *par) -{ - DPRINTK("ENTER\n"); - current_par = *par; - current_par_valid = 1; - DPRINTK("EXIT\n"); -} - - -static void virgefb_set_video(struct fb_var_screeninfo *var) -{ -/* Set clipping rectangle to current screen size */ - - unsigned int clip; - - DPRINTK("ENTER\n"); - wait_3d_fifo_slots(4); - clip = ((0 << 16) | (var->xres - 1)); - wl_mmio(BLT_CLIP_LEFT_RIGHT, clip); - clip = ((0 << 16) | (var->yres - 1)); - wl_mmio(BLT_CLIP_TOP_BOTTOM, clip); - wl_mmio(BLT_SRC_BASE, 0); /* seems we need to clear these two */ - wl_mmio(BLT_DEST_BASE, 0); - -/* Load the video mode defined by the 'var' data */ - - virgefb_load_video_mode(var); - DPRINTK("EXIT\n"); -} - -/* -Merge these two functions, Geert's suggestion. -static int virgefb_set_var(struct fb_var_screeninfo *var, int con, struct fb_info *info); -static int virgefb_do_fb_set_var(struct fb_var_screeninfo *var, int isactive); -*/ - -static int virgefb_do_fb_set_var(struct fb_var_screeninfo *var, int isactive) -{ - int err, activate; - struct virgefb_par par; - - DPRINTK("ENTER\n"); - if ((err = fbhw->decode_var(var, &par))) { - DPRINTK("EXIT\n"); - return (err); - } - - activate = var->activate; - if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW && isactive) - virgefb_set_par(&par); - fbhw->encode_var(var, &par); - var->activate = activate; - if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW && isactive) - virgefb_set_video(var); - DPRINTK("EXIT\n"); - return 0; -} - - -/* - * Get the Fixed Part of the Display - */ - -static int virgefb_get_fix(struct fb_fix_screeninfo *fix, int con, - struct fb_info *info) -{ - struct virgefb_par par; - int error = 0; - - DPRINTK("ENTER\n"); - if (con == -1) - virgefb_get_par(&par); - else - error = fbhw->decode_var(&fb_display[con].var, &par); - - if (!error) - error = fbhw->encode_fix(fix, &par); - DPRINTK("EXIT\n"); - return(error); -} - - -/* - * Get the User Defined Part of the Display - */ - -static int virgefb_get_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info) -{ - struct virgefb_par par; - int error = 0; - - DPRINTK("ENTER\n"); - if (con == -1) { - virgefb_get_par(&par); - error = fbhw->encode_var(var, &par); - disp.var = *var; /* ++Andre: don't know if this is the right place */ - } else { - *var = fb_display[con].var; - } - DPRINTK("EXIT\n"); - return(error); -} - -static void virgefb_set_disp(int con, struct fb_info *info) -{ - struct fb_fix_screeninfo fix; - struct display *display; - - DPRINTK("ENTER\n"); - if (con >= 0) - display = &fb_display[con]; - else - display = &disp; /* used during initialization */ - - virgefb_get_fix(&fix, con, info); - if (con == -1) - con = 0; - if(on_zorro2) { - info->screen_base = (char*)v_ram; - } else { - switch (display->var.bits_per_pixel) { -#ifdef FBCON_HAS_CFB8 - case 8: - info->screen_base = (char*)(v_ram + CYBMEM_OFFSET_8); - break; -#endif -#ifdef FBCON_HAS_CFB16 - case 16: - info->screen_base = (char*)(v_ram + CYBMEM_OFFSET_16); - break; -#endif -#ifdef FBCON_HAS_CFB32 - case 32: - info->screen_base = (char*)(v_ram + CYBMEM_OFFSET_32); - break; -#endif - } - } - display->visual = fix.visual; - display->type = fix.type; - display->type_aux = fix.type_aux; - display->ypanstep = fix.ypanstep; - display->ywrapstep = fix.ywrapstep; - display->can_soft_blank = 1; - display->inverse = virgefb_inverse; - display->line_length = display->var.xres_virtual* - display->var.bits_per_pixel/8; - - switch (display->var.bits_per_pixel) { -#ifdef FBCON_HAS_CFB8 - case 8: - if (display->var.accel_flags & FB_ACCELF_TEXT) { - display->dispsw = &fbcon_virge8; -#warning FIXME: We should reinit the graphics engine here - } else - display->dispsw = &fbcon_cfb8; - break; -#endif -#ifdef FBCON_HAS_CFB16 - case 16: - if (display->var.accel_flags & FB_ACCELF_TEXT) { - display->dispsw = &fbcon_virge16; - } else - display->dispsw = &fbcon_cfb16; - display->dispsw_data = &fbcon_cmap.cfb16; - break; -#endif -#ifdef FBCON_HAS_CFB32 - case 32: - if (display->var.accel_flags & FB_ACCELF_TEXT) { - display->dispsw = &fbcon_virge32; - } else - display->dispsw = &fbcon_cfb32; - display->dispsw_data = &fbcon_cmap.cfb32; - break; -#endif - default: - display->dispsw = &fbcon_dummy; - break; - } - DPRINTK("EXIT v_ram virt = 0x%8.8lx\n",(unsigned long)display->screen_base); -} - - -/* - * Set the User Defined Part of the Display - */ - -static int virgefb_set_var(struct fb_var_screeninfo *var, int con, - struct fb_info *info) -{ - int err, oldxres, oldyres, oldvxres, oldvyres, oldbpp, oldaccel; - - DPRINTK("ENTER\n"); - - if ((err = virgefb_do_fb_set_var(var, con == info->currcon))) { - DPRINTK("EXIT\n"); - return(err); - } - if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) { - oldxres = fb_display[con].var.xres; - oldyres = fb_display[con].var.yres; - oldvxres = fb_display[con].var.xres_virtual; - oldvyres = fb_display[con].var.yres_virtual; - oldbpp = fb_display[con].var.bits_per_pixel; - oldaccel = fb_display[con].var.accel_flags; - fb_display[con].var = *var; - if (oldxres != var->xres || oldyres != var->yres || - oldvxres != var->xres_virtual || - oldvyres != var->yres_virtual || - oldbpp != var->bits_per_pixel || - oldaccel != var->accel_flags) { - virgefb_set_disp(con, info); - if (fb_info.changevar) - (*fb_info.changevar)(con); - fb_alloc_cmap(&fb_display[con].cmap, 0, 0); - do_install_cmap(con, info); - } - } - var->activate = 0; - DPRINTK("EXIT\n"); - return 0; -} - - -/* - * Get the Colormap - */ - -static int virgefb_get_cmap(struct fb_cmap *cmap, int kspc, int con, - struct fb_info *info) -{ - DPRINTK("ENTER\n"); - if (con == info->currcon) { /* current console? */ - DPRINTK("EXIT - console is current console, fb_get_cmap\n"); - return(fb_get_cmap(cmap, kspc, fbhw->getcolreg, info)); - } else if (fb_display[con].cmap.len) { /* non default colormap? */ - DPRINTK("Use console cmap\n"); - fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2); - } else { - DPRINTK("Use default cmap\n"); - fb_copy_cmap(fb_default_cmap(fb_display[con].var.bits_per_pixel==8 ? 256 : 16), - cmap, kspc ? 0 : 2); - } - DPRINTK("EXIT\n"); - return 0; -} - -static struct fb_ops virgefb_ops = { - .owner = THIS_MODULE, - .fb_get_fix = virgefb_get_fix, - .fb_get_var = virgefb_get_var, - .fb_set_var = virgefb_set_var, - .fb_get_cmap = virgefb_get_cmap, - .fb_set_cmap = gen_set_cmap, - .fb_setcolreg = virgefb_setcolreg, - .fb_blank = virgefb_blank, -}; - -int __init virgefb_setup(char *options) -{ - char *this_opt; - fb_info.fontname[0] = '\0'; - - DPRINTK("ENTER\n"); - if (!options || !*options) { - DPRINTK("EXIT\n"); - return 0; - } - - while ((this_opt = strsep(&options, ",")) != NULL) { - if (!*this_opt) - continue; - if (!strcmp(this_opt, "inverse")) { - virgefb_inverse = 1; - fb_invert_cmaps(); - } else if (!strncmp(this_opt, "font:", 5)) - strcpy(fb_info.fontname, this_opt+5); -#ifdef FBCON_HAS_CFB8 - else if (!strcmp (this_opt, "virge8")){ - virgefb_default = virgefb_predefined[VIRGE8_DEFMODE].var; - } -#endif -#ifdef FBCON_HAS_CFB16 - else if (!strcmp (this_opt, "virge16")){ - virgefb_default = virgefb_predefined[VIRGE16_DEFMODE].var; - } -#endif -#ifdef FBCON_HAS_CFB32 - else if (!strcmp (this_opt, "virge32")){ - virgefb_default = virgefb_predefined[VIRGE32_DEFMODE].var; - } -#endif - else - virgefb_get_video_mode(this_opt); - } - - printk(KERN_INFO "mode : xres=%d, yres=%d, bpp=%d\n", virgefb_default.xres, - virgefb_default.yres, virgefb_default.bits_per_pixel); - DPRINTK("EXIT\n"); - return 0; -} - - -/* - * Get a Video Mode - */ - -static int __init virgefb_get_video_mode(const char *name) -{ - int i; - - DPRINTK("ENTER\n"); - for (i = 0; i < NUM_TOTAL_MODES; i++) { - if (!strcmp(name, virgefb_predefined[i].name)) { - virgefb_default = virgefb_predefined[i].var; - DPRINTK("EXIT\n"); - return(i); - } - } - /* ++Andre: set virgefb default mode */ - -/* prefer 16 bit depth, 8 if no 16, if no 8 or 16 use 32 */ - -#ifdef FBCON_HAS_CFB32 - virgefb_default = virgefb_predefined[VIRGE32_DEFMODE].var; -#endif -#ifdef FBCON_HAS_CFB8 - virgefb_default = virgefb_predefined[VIRGE8_DEFMODE].var; -#endif -#ifdef FBCON_HAS_CFB16 - virgefb_default = virgefb_predefined[VIRGE16_DEFMODE].var; -#endif - DPRINTK("EXIT\n"); - return 0; -} - -/* - * Initialization - */ - -int __init virgefb_init(void) -{ - struct virgefb_par par; - unsigned long board_addr, board_size; - struct zorro_dev *z = NULL; - - DPRINTK("ENTER\n"); - - z = zorro_find_device(ZORRO_PROD_PHASE5_CYBERVISION64_3D, NULL); - if (!z) - return -ENODEV; - - board_addr = z->resource.start; - if (board_addr < 0x01000000) { - - /* board running in Z2 space. This includes the video memory - as well as the S3 register set */ - - on_zorro2 = 1; - board_size = 0x00400000; - - if (!request_mem_region(board_addr, board_size, "S3 ViRGE")) - return -ENOMEM; - - v_ram_phys = board_addr; - v_ram = ZTWO_VADDR(v_ram_phys); - mmio_regs_phys = (unsigned long)(board_addr + 0x003c0000); - vgaio_regs = (unsigned char *) ZTWO_VADDR(board_addr + 0x003c0000); - mmio_regs = (unsigned char *)ZTWO_VADDR(mmio_regs_phys); - vcode_switch_base = (unsigned long) ZTWO_VADDR(board_addr + 0x003a0000); - printk(KERN_INFO "CV3D detected running in Z2 mode.\n"); - - } else { - - /* board running in Z3 space. Separate video memory (3 apertures) - and S3 register set */ - - on_zorro2 = 0; - board_size = 0x01000000; - - if (!request_mem_region(board_addr, board_size, "S3 ViRGE")) - return -ENOMEM; - - v_ram_phys = board_addr + 0x04000000; - v_ram = (unsigned long)ioremap(v_ram_phys, 0x01000000); - mmio_regs_phys = board_addr + 0x05000000; - vgaio_regs = (unsigned char *)ioremap(board_addr +0x0c000000, 0x00100000); /* includes PCI regs */ - mmio_regs = ioremap(mmio_regs_phys, 0x00010000); - vcode_switch_base = (unsigned long)ioremap(board_addr + 0x08000000, 0x1000); - printk(KERN_INFO "CV3D detected running in Z3 mode\n"); - } - -#if defined (VIRGEFBDEBUG) - DPRINTK("board_addr : 0x%8.8lx\n",board_addr); - DPRINTK("board_size : 0x%8.8lx\n",board_size); - DPRINTK("mmio_regs_phy : 0x%8.8lx\n",mmio_regs_phys); - DPRINTK("v_ram_phys : 0x%8.8lx\n",v_ram_phys); - DPRINTK("vgaio_regs : 0x%8.8lx\n",(unsigned long)vgaio_regs); - DPRINTK("mmio_regs : 0x%8.8lx\n",(unsigned long)mmio_regs); - DPRINTK("v_ram : 0x%8.8lx\n",v_ram); - DPRINTK("vcode sw base : 0x%8.8lx\n",vcode_switch_base); -#endif - fbhw = &virgefb_hw_switch; - strcpy(fb_info.modename, virgefb_name); - fb_info.changevar = NULL; - fb_info.fbops = &virgefb_ops; - fb_info.disp = &disp; - fb_info.currcon = -1; - fb_info.switch_con = &virgefb_switch; - fb_info.updatevar = &virgefb_updatevar; - fb_info.flags = FBINFO_FLAG_DEFAULT; - fbhw->init(); - fbhw->decode_var(&virgefb_default, &par); - fbhw->encode_var(&virgefb_default, &par); - virgefb_do_fb_set_var(&virgefb_default, 1); - virgefb_get_var(&fb_display[0].var, -1, &fb_info); - virgefb_set_disp(-1, &fb_info); - do_install_cmap(0, &fb_info); - - if (register_framebuffer(&fb_info) < 0) { - #warning release resources - printk(KERN_ERR "virgefb.c: register_framebuffer failed\n"); - DPRINTK("EXIT\n"); - goto out_unmap; - } - - printk(KERN_INFO "fb%d: %s frame buffer device, using %ldK of video memory\n", - fb_info.node, fb_info.modename, v_ram_size>>10); - - /* TODO: This driver cannot be unloaded yet */ - - DPRINTK("EXIT\n"); - return 0; - -out_unmap: - if (board_addr >= 0x01000000) { - if (v_ram) - iounmap((void*)v_ram); - if (vgaio_regs) - iounmap(vgaio_regs); - if (mmio_regs) - iounmap(mmio_regs); - if (vcode_switch_base) - iounmap((void*)vcode_switch_base); - v_ram = vcode_switch_base = 0; - vgaio_regs = mmio_regs = NULL; - } - return -EINVAL; -} - - -static int virgefb_switch(int con, struct fb_info *info) -{ - DPRINTK("ENTER\n"); - /* Do we have to save the colormap? */ - if (fb_display[info->currcon].cmap.len) - fb_get_cmap(&fb_display[info->currcon].cmap, 1, - fbhw->getcolreg, info); - virgefb_do_fb_set_var(&fb_display[con].var, 1); - info->currcon = con; - /* Install new colormap */ - do_install_cmap(con, info); - DPRINTK("EXIT\n"); - return 0; -} - - -/* - * Update the `var' structure (called by fbcon.c) - * - * This call looks only at yoffset and the FB_VMODE_YWRAP flag in `var'. - * Since it's called by a kernel driver, no range checking is done. - */ - -static int virgefb_updatevar(int con, struct fb_info *info) -{ - DPRINTK("ENTER\n"); - return 0; - DPRINTK("EXIT\n"); -} - -/* - * Blank the display. - */ - -static int virgefb_blank(int blank, struct fb_info *info) -{ - DPRINTK("ENTER\n"); - fbhw->blank(blank); - DPRINTK("EXIT\n"); - return 0; -} - - -/* - * Text console acceleration - */ - -#ifdef FBCON_HAS_CFB8 -static void fbcon_virge8_bmove(struct display *p, int sy, int sx, int dy, - int dx, int height, int width) -{ - sx *= 8; dx *= 8; width *= 8; - virgefb_BitBLT((u_short)sx, (u_short)(sy*fontheight(p)), (u_short)dx, - (u_short)(dy*fontheight(p)), (u_short)width, - (u_short)(height*fontheight(p)), (u_short)p->next_line, 8); -} - -static void fbcon_virge8_clear(struct vc_data *conp, struct display *p, int sy, - int sx, int height, int width) -{ - unsigned char bg; - - sx *= 8; width *= 8; - bg = attr_bgcol_ec(p,conp); - virgefb_RectFill((u_short)sx, (u_short)(sy*fontheight(p)), - (u_short)width, (u_short)(height*fontheight(p)), - (u_short)bg, (u_short)p->next_line, 8); -} - -static void fbcon_virge8_putc(struct vc_data *conp, struct display *p, int c, int yy, - int xx) -{ - if (blit_maybe_busy) - virgefb_wait_for_idle(); - fbcon_cfb8_putc(conp, p, c, yy, xx); -} - -static void fbcon_virge8_putcs(struct vc_data *conp, struct display *p, - const unsigned short *s, int count, int yy, int xx) -{ - if (blit_maybe_busy) - virgefb_wait_for_idle(); - fbcon_cfb8_putcs(conp, p, s, count, yy, xx); -} - -static void fbcon_virge8_revc(struct display *p, int xx, int yy) -{ - if (blit_maybe_busy) - virgefb_wait_for_idle(); - fbcon_cfb8_revc(p, xx, yy); -} - -static void fbcon_virge8_clear_margins(struct vc_data *conp, struct display *p, - int bottom_only) -{ - if (blit_maybe_busy) - virgefb_wait_for_idle(); - fbcon_cfb8_clear_margins(conp, p, bottom_only); -} - -static struct display_switch fbcon_virge8 = { - .setup = fbcon_cfb8_setup, - .bmove = fbcon_virge8_bmove, - .clear = fbcon_virge8_clear, - .putc = fbcon_virge8_putc, - .putcs = fbcon_virge8_putcs, - .revc = fbcon_virge8_revc, - .clear_margins = fbcon_virge8_clear_margins, - .fontwidthmask = FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16) -}; -#endif - -#ifdef FBCON_HAS_CFB16 -static void fbcon_virge16_bmove(struct display *p, int sy, int sx, int dy, - int dx, int height, int width) -{ - sx *= 8; dx *= 8; width *= 8; - virgefb_BitBLT((u_short)sx, (u_short)(sy*fontheight(p)), (u_short)dx, - (u_short)(dy*fontheight(p)), (u_short)width, - (u_short)(height*fontheight(p)), (u_short)p->next_line, 16); -} - -static void fbcon_virge16_clear(struct vc_data *conp, struct display *p, int sy, - int sx, int height, int width) -{ - unsigned char bg; - - sx *= 8; width *= 8; - bg = attr_bgcol_ec(p,conp); - virgefb_RectFill((u_short)sx, (u_short)(sy*fontheight(p)), - (u_short)width, (u_short)(height*fontheight(p)), - (u_short)bg, (u_short)p->next_line, 16); -} - -static void fbcon_virge16_putc(struct vc_data *conp, struct display *p, int c, int yy, - int xx) -{ - if (blit_maybe_busy) - virgefb_wait_for_idle(); - fbcon_cfb16_putc(conp, p, c, yy, xx); -} - -static void fbcon_virge16_putcs(struct vc_data *conp, struct display *p, - const unsigned short *s, int count, int yy, int xx) -{ - if (blit_maybe_busy) - virgefb_wait_for_idle(); - fbcon_cfb16_putcs(conp, p, s, count, yy, xx); -} - -static void fbcon_virge16_revc(struct display *p, int xx, int yy) -{ - if (blit_maybe_busy) - virgefb_wait_for_idle(); - fbcon_cfb16_revc(p, xx, yy); -} - -static void fbcon_virge16_clear_margins(struct vc_data *conp, struct display *p, - int bottom_only) -{ - if (blit_maybe_busy) - virgefb_wait_for_idle(); - fbcon_cfb16_clear_margins(conp, p, bottom_only); -} - -static struct display_switch fbcon_virge16 = { - .setup = fbcon_cfb16_setup, - .bmove = fbcon_virge16_bmove, - .clear = fbcon_virge16_clear, - .putc = fbcon_virge16_putc, - .putcs = fbcon_virge16_putcs, - .revc = fbcon_virge16_revc, - .clear_margins = fbcon_virge16_clear_margins, - .fontwidthmask = FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16) -}; -#endif - -#ifdef FBCON_HAS_CFB32 -static void fbcon_virge32_bmove(struct display *p, int sy, int sx, int dy, - int dx, int height, int width) -{ - sx *= 16; dx *= 16; width *= 16; /* doubled these values to do 32 bit blit */ - virgefb_BitBLT((u_short)sx, (u_short)(sy*fontheight(p)), (u_short)dx, - (u_short)(dy*fontheight(p)), (u_short)width, - (u_short)(height*fontheight(p)), (u_short)p->next_line, 16); -} - -static void fbcon_virge32_clear(struct vc_data *conp, struct display *p, int sy, - int sx, int height, int width) -{ - unsigned char bg; - - sx *= 16; width *= 16; /* doubled these values to do 32 bit blit */ - bg = attr_bgcol_ec(p,conp); - virgefb_RectFill((u_short)sx, (u_short)(sy*fontheight(p)), - (u_short)width, (u_short)(height*fontheight(p)), - (u_short)bg, (u_short)p->next_line, 16); -} - -static void fbcon_virge32_putc(struct vc_data *conp, struct display *p, int c, int yy, - int xx) -{ - if (blit_maybe_busy) - virgefb_wait_for_idle(); - fbcon_cfb32_putc(conp, p, c, yy, xx); -} - -static void fbcon_virge32_putcs(struct vc_data *conp, struct display *p, - const unsigned short *s, int count, int yy, int xx) -{ - if (blit_maybe_busy) - virgefb_wait_for_idle(); - fbcon_cfb32_putcs(conp, p, s, count, yy, xx); -} - -static void fbcon_virge32_revc(struct display *p, int xx, int yy) -{ - if (blit_maybe_busy) - virgefb_wait_for_idle(); - fbcon_cfb32_revc(p, xx, yy); -} - -static void fbcon_virge32_clear_margins(struct vc_data *conp, struct display *p, - int bottom_only) -{ - if (blit_maybe_busy) - virgefb_wait_for_idle(); - fbcon_cfb32_clear_margins(conp, p, bottom_only); -} - -static struct display_switch fbcon_virge32 = { - .setup = fbcon_cfb32_setup, - .bmove = fbcon_virge32_bmove, - .clear = fbcon_virge32_clear, - .putc = fbcon_virge32_putc, - .putcs = fbcon_virge32_putcs, - .revc = fbcon_virge32_revc, - .clear_margins = fbcon_virge32_clear_margins, - .fontwidthmask = FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16) -}; -#endif - -#ifdef MODULE -MODULE_LICENSE("GPL"); - -int init_module(void) -{ - return virgefb_init(); -} -#endif /* MODULE */ - -static int cv3d_has_4mb(void) -{ - /* cyberfb version didn't work, neither does this (not reliably) - forced to return 4MB */ -#if 0 - volatile unsigned long *t0, *t2; -#endif - DPRINTK("ENTER\n"); -#if 0 - /* write patterns in memory and test if they can be read */ - t0 = (volatile unsigned long *)v_ram; - t2 = (volatile unsigned long *)(v_ram + 0x00200000); - *t0 = 0x87654321; - *t2 = 0x12345678; - - if (*t0 != 0x87654321) { - /* read of first location failed */ - DPRINTK("EXIT - 0MB !\n"); - return 0; - } - - if (*t2 == 0x87654321) { - /* should read 0x12345678 if 4MB */ - DPRINTK("EXIT - 2MB(a) \n"); - return 0; - } - - if (*t2 != 0x12345678) { - /* upper 2MB read back match failed */ - DPRINTK("EXIT - 2MB(b)\n"); - return 0; - } - - /* may have 4MB */ - - *t2 = 0xAAAAAAAA; - - if(*t2 != 0xAAAAAAAA) { - /* upper 2MB read back match failed */ - DPRINTK("EXIT - 2MB(c)\n"); - return 0; - } - - *t2 = 0x55555555; - - if(*t2 != 0x55555555) { - /* upper 2MB read back match failed */ - DPRINTK("EXIT - 2MB(d)\n"); - return 0; - } - -#endif - DPRINTK("EXIT - 4MB\n"); - return 1; -} - - -/* - * Computes M, N, and R pll params for freq arg. - * Returns 16 bits - hi 0MMMMMM lo 0RRNNNNN - */ - -#define REFCLOCK 14318000 - -static unsigned short virgefb_compute_clock(unsigned long freq) -{ - - unsigned char m, n, r, rpwr; - unsigned long diff, ftry, save = ~0UL; - unsigned short mnr; - - DPRINTK("ENTER\n"); - - for (r = 0, rpwr = 1 ; r < 4 ; r++, rpwr *= 2) { - if ((135000000 <= (rpwr * freq)) && ((rpwr * freq) <= 270000000)) { - for (n = 1 ; n < 32 ; n++) { - m = ((freq * (n + 2) * rpwr)/REFCLOCK) - 2; - if (m == 0 || m >127) - break; - ftry = ((REFCLOCK / (n + 2)) * (m + 2)) / rpwr; - if (ftry > freq) - diff = ftry - freq; - else - diff = freq - ftry; - if (diff < save) { - save = diff; - mnr = (m << 8) | (r<<5) | (n & 0x7f); - } - } - } - } - if (save == ~0UL) - printk("Can't compute clock PLL values for %ld Hz clock\n", freq); - DPRINTK("EXIT\n"); - return(mnr); -} - -static void virgefb_load_video_mode(struct fb_var_screeninfo *video_mode) -{ - unsigned char lace, dblscan, tmp; - unsigned short mnr; - unsigned short HT, HDE, HBS, HBW, HSS, HSW; - unsigned short VT, VDE, VBS, VBW, VSS, VSW; - unsigned short SCO; - int cr11; - int cr67; - int hmul; - int xres, xres_virtual, hfront, hsync, hback; - int yres, vfront, vsync, vback; - int bpp; - int i; - long freq; - - DPRINTK("ENTER : %dx%d-%d\n",video_mode->xres, video_mode->yres, - video_mode->bits_per_pixel); - - bpp = video_mode->bits_per_pixel; - xres = video_mode->xres; - xres_virtual = video_mode->xres_virtual; - hfront = video_mode->right_margin; - hsync = video_mode->hsync_len; - hback = video_mode->left_margin; - - lace = 0; - dblscan = 0; - - if (video_mode->vmode & FB_VMODE_DOUBLE) { - yres = video_mode->yres * 2; - vfront = video_mode->lower_margin * 2; - vsync = video_mode->vsync_len * 2; - vback = video_mode->upper_margin * 2; - dblscan = 1; - } else if (video_mode->vmode & FB_VMODE_INTERLACED) { - yres = (video_mode->yres + 1) / 2; - vfront = (video_mode->lower_margin + 1) / 2; - vsync = (video_mode->vsync_len + 1) / 2; - vback = (video_mode->upper_margin + 1) / 2; - lace = 1; - } else { - yres = video_mode->yres; - vfront = video_mode->lower_margin; - vsync = video_mode->vsync_len; - vback = video_mode->upper_margin; - } - - switch (bpp) { - case 8: - video_mode->red.offset = 0; - video_mode->green.offset = 0; - video_mode->blue.offset = 0; - video_mode->transp.offset = 0; - video_mode->red.length = 8; - video_mode->green.length = 8; - video_mode->blue.length = 8; - video_mode->transp.length = 0; - hmul = 1; - cr67 = 0x00; - SCO = xres_virtual / 8; - break; - case 16: - video_mode->red.offset = 11; - video_mode->green.offset = 5; - video_mode->blue.offset = 0; - video_mode->transp.offset = 0; - video_mode->red.length = 5; - video_mode->green.length = 6; - video_mode->blue.length = 5; - video_mode->transp.length = 0; - hmul = 2; - cr67 = 0x50; - SCO = xres_virtual / 4; - break; - case 32: - video_mode->red.offset = 16; - video_mode->green.offset = 8; - video_mode->blue.offset = 0; - video_mode->transp.offset = 24; - video_mode->red.length = 8; - video_mode->green.length = 8; - video_mode->blue.length = 8; - video_mode->transp.length = 8; - hmul = 1; - cr67 = 0xd0; - SCO = xres_virtual / 2; - break; - } - - HT = (((xres + hfront + hsync + hback) / 8) * hmul) - 5; - HDE = ((xres / 8) * hmul) - 1; - HBS = (xres / 8) * hmul; - HSS = ((xres + hfront) / 8) * hmul; - HSW = (hsync / 8) * hmul; - HBW = (((hfront + hsync + hback) / 8) * hmul) - 2; - - VT = yres + vfront + vsync + vback - 2; - VDE = yres - 1; - VBS = yres - 1; - VSS = yres + vfront; - VSW = vsync; - VBW = vfront + vsync + vback - 2; - -#ifdef VIRGEFBDEBUG - DPRINTK("HDE : 0x%4.4x, %4.4d\n", HDE, HDE); - DPRINTK("HBS : 0x%4.4x, %4.4d\n", HBS, HBS); - DPRINTK("HSS : 0x%4.4x, %4.4d\n", HSS, HSS); - DPRINTK("HSW : 0x%4.4x, %4.4d\n", HSW, HSW); - DPRINTK("HBW : 0x%4.4x, %4.4d\n", HBW, HBW); - DPRINTK("HSS + HSW : 0x%4.4x, %4.4d\n", HSS+HSW, HSS+HSW); - DPRINTK("HBS + HBW : 0x%4.4x, %4.4d\n", HBS+HBW, HBS+HBW); - DPRINTK("HT : 0x%4.4x, %4.4d\n", HT, HT); - DPRINTK("VDE : 0x%4.4x, %4.4d\n", VDE, VDE); - DPRINTK("VBS : 0x%4.4x, %4.4d\n", VBS, VBS); - DPRINTK("VSS : 0x%4.4x, %4.4d\n", VSS, VSS); - DPRINTK("VSW : 0x%4.4x, %4.4d\n", VSW, VSW); - DPRINTK("VBW : 0x%4.4x, %4.4d\n", VBW, VBW); - DPRINTK("VT : 0x%4.4x, %4.4d\n", VT, VT); -#endif - -/* turn gfx off, don't mess up the display */ - - gfx_on_off(1); - -/* H and V sync polarity */ - - tmp = rb_mmio(GREG_MISC_OUTPUT_R) & 0x2f; /* colour, ram enable, clk sr12/s13 sel */ - if (!(video_mode->sync & FB_SYNC_HOR_HIGH_ACT)) - tmp |= 0x40; /* neg H sync polarity */ - if (!(video_mode->sync & FB_SYNC_VERT_HIGH_ACT)) - tmp |= 0x80; /* neg V sync polarity */ - tmp |= 0x0c; /* clk from sr12/sr13 */ - wb_mmio(GREG_MISC_OUTPUT_W, tmp); - -/* clocks */ - - wseq(SEQ_ID_BUS_REQ_CNTL, 0xc0); /* 2 clk mem wr and /RAS1 */ - wseq(SEQ_ID_CLKSYN_CNTL_2, 0x80); /* b7 is 2 mem clk wr */ - mnr = virgefb_compute_clock(MEMCLOCK); - DPRINTK("mem clock %d, m %d, n %d, r %d.\n", MEMCLOCK, ((mnr>>8)&0x7f), (mnr&0x1f), ((mnr >> 5)&0x03)); - wseq(SEQ_ID_MCLK_LO, (mnr & 0x7f)); - wseq(SEQ_ID_MCLK_HI, ((mnr & 0x7f00) >> 8)); - freq = (1000000000 / video_mode->pixclock) * 1000; /* pixclock is in ps ... convert to Hz */ - mnr = virgefb_compute_clock(freq); - DPRINTK("dot clock %ld, m %d, n %d, r %d.\n", freq, ((mnr>>8)&0x7f), (mnr&0x1f), ((mnr>>5)&0x03)); - wseq(SEQ_ID_DCLK_LO, (mnr & 0x7f)); - wseq(SEQ_ID_DCLK_HI, ((mnr & 0x7f00) >> 8)); - wseq(SEQ_ID_CLKSYN_CNTL_2, 0xa0); - wseq(SEQ_ID_CLKSYN_CNTL_2, 0x80); - udelay(100); - -/* load display parameters into board */ - - /* not sure about sync and blanking extensions bits in cr5d and cr5 */ - - wcrt(CRT_ID_EXT_HOR_OVF, /* 0x5d */ - ((HT & 0x100) ? 0x01 : 0x00) | - ((HDE & 0x100) ? 0x02 : 0x00) | - ((HBS & 0x100) ? 0x04 : 0x00) | - /* (((HBS + HBW) & 0x40) ? 0x08 : 0x00) | */ - ((HSS & 0x100) ? 0x10 : 0x00) | - /* (((HSS + HSW) & 0x20) ? 0x20 : 0x00) | */ - ((HSW >= 0x20) ? 0x20 : 0x00) | - (((HT-5) & 0x100) ? 0x40 : 0x00)); - - wcrt(CRT_ID_EXT_VER_OVF, /* 0x5e */ - ((VT & 0x400) ? 0x01 : 0x00) | - ((VDE & 0x400) ? 0x02 : 0x00) | - ((VBS & 0x400) ? 0x04 : 0x00) | - ((VSS & 0x400) ? 0x10 : 0x00) | - 0x40); /* line compare */ - - wcrt(CRT_ID_START_VER_RETR, VSS); - cr11 = rcrt(CRT_ID_END_VER_RETR) | 0x20; /* vert interrupt flag */ - wcrt(CRT_ID_END_VER_RETR, ((cr11 & 0x20) | ((VSS + VSW) & 0x0f))); /* keeps vert irq enable state, also has unlock bit cr0 to 7 */ - wcrt(CRT_ID_VER_DISP_ENA_END, VDE); - wcrt(CRT_ID_START_VER_BLANK, VBS); - wcrt(CRT_ID_END_VER_BLANK, VBS + VBW); /* might be +/- 1 out */ - wcrt(CRT_ID_HOR_TOTAL, HT); - wcrt(CRT_ID_DISPLAY_FIFO, HT - 5); - wcrt(CRT_ID_BACKWAD_COMP_3, 0x10); /* enable display fifo */ - wcrt(CRT_ID_HOR_DISP_ENA_END, HDE); - wcrt(CRT_ID_START_HOR_BLANK , HBS); - wcrt(CRT_ID_END_HOR_BLANK, (HBS + HBW) & 0x1f); - wcrt(CRT_ID_START_HOR_RETR, HSS); - wcrt(CRT_ID_END_HOR_RETR, /* cr5 */ - ((HSS + HSW) & 0x1f) | - (((HBS + HBW) & 0x20) ? 0x80 : 0x00)); - wcrt(CRT_ID_VER_TOTAL, VT); - wcrt(CRT_ID_OVERFLOW, - ((VT & 0x100) ? 0x01 : 0x00) | - ((VDE & 0x100) ? 0x02 : 0x00) | - ((VSS & 0x100) ? 0x04 : 0x00) | - ((VBS & 0x100) ? 0x08 : 0x00) | - 0x10 | - ((VT & 0x200) ? 0x20 : 0x00) | - ((VDE & 0x200) ? 0x40 : 0x00) | - ((VSS & 0x200) ? 0x80 : 0x00)); - wcrt(CRT_ID_MAX_SCAN_LINE, - (dblscan ? 0x80 : 0x00) | - 0x40 | - ((VBS & 0x200) ? 0x20 : 0x00)); - wcrt(CRT_ID_LINE_COMPARE, 0xff); - wcrt(CRT_ID_LACE_RETR_START, HT / 2); /* (HT-5)/2 ? */ - wcrt(CRT_ID_LACE_CONTROL, (lace ? 0x20 : 0x00)); - - wcrt(CRT_ID_SCREEN_OFFSET, SCO); - wcrt(CRT_ID_EXT_SYS_CNTL_2, (SCO >> 4) & 0x30 ); - - /* wait for vert sync before cr67 update */ - - for (i=0; i < 10000; i++) { - udelay(10); - mb(); - if (rb_mmio(GREG_INPUT_STATUS1_R) & 0x08) - break; - } - - wl_mmio(0x8200, 0x0000c000); /* fifo control (0x00110400 ?) */ - wcrt(CRT_ID_EXT_MISC_CNTL_2, cr67); - -/* enable video */ - - tmp = rb_mmio(ACT_ADDRESS_RESET); - wb_mmio(ACT_ADDRESS_W, ((bpp == 8) ? 0x20 : 0x00)); /* set b5, ENB PLT in attr idx reg) */ - tmp = rb_mmio(ACT_ADDRESS_RESET); - -/* turn gfx on again */ - - gfx_on_off(0); - -/* pass-through */ - - SetVSwitch(1); /* cv3d */ - - DUMP; - DPRINTK("EXIT\n"); -} - -static inline void gfx_on_off(int toggle) -{ - unsigned char tmp; - - DPRINTK("ENTER gfx %s\n", (toggle ? "off" : "on")); - - toggle = (toggle & 0x01) << 5; - tmp = rseq(SEQ_ID_CLOCKING_MODE) & (~(0x01 << 5)); - wseq(SEQ_ID_CLOCKING_MODE, tmp | toggle); - - DPRINTK("EXIT\n"); -} - -#if defined (VIRGEFBDUMP) - -/* - * Dump board registers - */ - -static void cv64_dump(void) -{ - int i; - u8 c, b; - u16 w; - u32 l; - - /* crt, seq, gfx and atr regs */ - - SelectMMIO; - - printk("\n"); - for (i = 0; i <= 0x6f; i++) { - wb_mmio(CRT_ADDRESS, i); - printk("crt idx : 0x%2.2x : 0x%2.2x\n", i, rb_mmio(CRT_ADDRESS_R)); - } - for (i = 0; i <= 0x1c; i++) { - wb_mmio(SEQ_ADDRESS, i); - printk("seq idx : 0x%2.2x : 0x%2.2x\n", i, rb_mmio(SEQ_ADDRESS_R)); - } - for (i = 0; i <= 8; i++) { - wb_mmio(GCT_ADDRESS, i); - printk("gfx idx : 0x%2.2x : 0x%2.2x\n", i, rb_mmio(GCT_ADDRESS_R)); - } - for (i = 0; i <= 0x14; i++) { - c = rb_mmio(ACT_ADDRESS_RESET); - wb_mmio(ACT_ADDRESS_W, i); - printk("atr idx : 0x%2.2x : 0x%2.2x\n", i, rb_mmio(ACT_ADDRESS_R)); - } - - /* re-enable video access to palette */ - - c = rb_mmio(ACT_ADDRESS_RESET); - udelay(10); - wb_mmio(ACT_ADDRESS_W, 0x20); - c = rb_mmio(ACT_ADDRESS_RESET); - udelay(10); - - /* general regs */ - - printk("0x3cc(w 0x3c2) : 0x%2.2x\n", rb_mmio(0x3cc)); /* GREG_MISC_OUTPUT READ */ - printk("0x3c2(-------) : 0x%2.2x\n", rb_mmio(0x3c2)); /* GREG_INPUT_STATUS 0 READ */ - printk("0x3c3(w 0x3c3) : 0x%2.2x\n", rb_vgaio(0x3c3)); /* GREG_VIDEO_SUBS_ENABLE */ - printk("0x3ca(w 0x3da) : 0x%2.2x\n", rb_vgaio(0x3ca)); /* GREG_FEATURE_CONTROL read */ - printk("0x3da(-------) : 0x%2.2x\n", rb_mmio(0x3da)); /* GREG_INPUT_STATUS 1 READ */ - - /* engine regs */ - - for (i = 0x8180; i <= 0x8200; i = i + 4) - printk("0x%8.8x : 0x%8.8x\n", i, rl_mmio(i)); - - i = 0x8504; - printk("0x%8.8x : 0x%8.8x\n", i, rl_mmio(i)); - i = 0x850c; - printk("0x%8.8x : 0x%8.8x\n", i, rl_mmio(i)); - for (i = 0xa4d4; i <= 0xa50c; i = i + 4) - printk("0x%8.8x : 0x%8.8x\n", i, rl_mmio(i)); - - /* PCI regs */ - - SelectCFG; - - for (c = 0; c < 0x08; c = c + 2) { - w = (*((u16 *)((u32)(vgaio_regs + c + (on_zorro2 ? 0 : 0x000e0000)) ^ 2))); - printk("pci 0x%2.2x : 0x%4.4x\n", c, w); - } - c = 8; - l = (*((u32 *)((u32)(vgaio_regs + c + (on_zorro2 ? 0 : 0x000e0000))))); - printk("pci 0x%2.2x : 0x%8.8x\n", c, l); - c = 0x0d; - b = (*((u8 *)((u32)(vgaio_regs + c + (on_zorro2 ? 0 : 0x000e0000)) ^ 3))); - printk("pci 0x%2.2x : 0x%2.2x\n", c, b); - c = 0x10; - l = (*((u32 *)((u32)(vgaio_regs + c + (on_zorro2 ? 0 : 0x000e0000))))); - printk("pci 0x%2.2x : 0x%8.8x\n", c, l); - c = 0x30; - l = (*((u32 *)((u32)(vgaio_regs + c + (on_zorro2 ? 0 : 0x000e0000))))); - printk("pci 0x%2.2x : 0x%8.8x\n", c, l); - c = 0x3c; - b = (*((u8 *)((u32)(vgaio_regs + c + (on_zorro2 ? 0 : 0x000e0000)) ^ 3))); - printk("pci 0x%2.2x : 0x%2.2x\n", c, b); - c = 0x3d; - b = (*((u8 *)((u32)(vgaio_regs + c + (on_zorro2 ? 0 : 0x000e0000)) ^ 3))); - printk("pci 0x%2.2x : 0x%2.2x\n", c, b); - c = 0x3e; - w = (*((u16 *)((u32)(vgaio_regs + c + (on_zorro2 ? 0 : 0x000e0000)) ^ 2))); - printk("pci 0x%2.2x : 0x%4.4x\n", c, w); - SelectMMIO; -} -#endif diff --git a/drivers/video/virgefb.h b/drivers/video/virgefb.h deleted file mode 100644 index 157d66deb24..00000000000 --- a/drivers/video/virgefb.h +++ /dev/null @@ -1,288 +0,0 @@ -/* - * linux/drivers/video/virgefb.h -- CyberVision64 definitions for the - * text console driver. - * - * Copyright (c) 1998 Alan Bair - * - * This file is based on the initial port to Linux of grf_cvreg.h: - * - * Copyright (c) 1997 Antonio Santos - * - * The original work is from the NetBSD CyberVision 64 framebuffer driver - * and support files (grf_cv.c, grf_cvreg.h, ite_cv.c): - * Permission to use the source of this driver was obtained from the - * author Michael Teske by Alan Bair. - * - * Copyright (c) 1995 Michael Teske - * - * History: - * - * - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive - * for more details. - */ - -/* Enhanced register mapping (MMIO mode) */ - -#define S3_CRTC_ADR 0x03d4 -#define S3_CRTC_DATA 0x03d5 - -#define S3_REG_LOCK2 0x39 -#define S3_HGC_MODE 0x45 - -#define S3_HWGC_ORGX_H 0x46 -#define S3_HWGC_ORGX_L 0x47 -#define S3_HWGC_ORGY_H 0x48 -#define S3_HWGC_ORGY_L 0x49 -#define S3_HWGC_DX 0x4e -#define S3_HWGC_DY 0x4f - -#define S3_LAW_CTL 0x58 - -/**************************************************/ - -/* - * Defines for the used register addresses (mw) - * - * NOTE: There are some registers that have different addresses when - * in mono or color mode. We only support color mode, and thus - * some addresses won't work in mono-mode! - * - * General and VGA-registers taken from retina driver. Fixed a few - * bugs in it. (SR and GR read address is Port + 1, NOT Port) - * - */ - -/* General Registers: */ -#define GREG_MISC_OUTPUT_R 0x03CC -#define GREG_MISC_OUTPUT_W 0x03C2 -#define GREG_FEATURE_CONTROL_R 0x03CA -#define GREG_FEATURE_CONTROL_W 0x03DA -#define GREG_INPUT_STATUS0_R 0x03C2 -#define GREG_INPUT_STATUS1_R 0x03DA - -/* Setup Registers: */ -#define SREG_VIDEO_SUBS_ENABLE 0x03C3 /* virge */ - -/* Attribute Controller: */ -#define ACT_ADDRESS 0x03C0 -#define ACT_ADDRESS_R 0x03C1 -#define ACT_ADDRESS_W 0x03C0 -#define ACT_ADDRESS_RESET 0x03DA -#define ACT_ID_PALETTE0 0x00 -#define ACT_ID_PALETTE1 0x01 -#define ACT_ID_PALETTE2 0x02 -#define ACT_ID_PALETTE3 0x03 -#define ACT_ID_PALETTE4 0x04 -#define ACT_ID_PALETTE5 0x05 -#define ACT_ID_PALETTE6 0x06 -#define ACT_ID_PALETTE7 0x07 -#define ACT_ID_PALETTE8 0x08 -#define ACT_ID_PALETTE9 0x09 -#define ACT_ID_PALETTE10 0x0A -#define ACT_ID_PALETTE11 0x0B -#define ACT_ID_PALETTE12 0x0C -#define ACT_ID_PALETTE13 0x0D -#define ACT_ID_PALETTE14 0x0E -#define ACT_ID_PALETTE15 0x0F -#define ACT_ID_ATTR_MODE_CNTL 0x10 -#define ACT_ID_OVERSCAN_COLOR 0x11 -#define ACT_ID_COLOR_PLANE_ENA 0x12 -#define ACT_ID_HOR_PEL_PANNING 0x13 -#define ACT_ID_COLOR_SELECT 0x14 /* virge PX_PADD pixel padding register */ - -/* Graphics Controller: */ -#define GCT_ADDRESS 0x03CE -#define GCT_ADDRESS_R 0x03CF -#define GCT_ADDRESS_W 0x03CF -#define GCT_ID_SET_RESET 0x00 -#define GCT_ID_ENABLE_SET_RESET 0x01 -#define GCT_ID_COLOR_COMPARE 0x02 -#define GCT_ID_DATA_ROTATE 0x03 -#define GCT_ID_READ_MAP_SELECT 0x04 -#define GCT_ID_GRAPHICS_MODE 0x05 -#define GCT_ID_MISC 0x06 -#define GCT_ID_COLOR_XCARE 0x07 -#define GCT_ID_BITMASK 0x08 - -/* Sequencer: */ -#define SEQ_ADDRESS 0x03C4 -#define SEQ_ADDRESS_R 0x03C5 -#define SEQ_ADDRESS_W 0x03C5 -#define SEQ_ID_RESET 0x00 -#define SEQ_ID_CLOCKING_MODE 0x01 -#define SEQ_ID_MAP_MASK 0x02 -#define SEQ_ID_CHAR_MAP_SELECT 0x03 -#define SEQ_ID_MEMORY_MODE 0x04 -#define SEQ_ID_UNKNOWN1 0x05 -#define SEQ_ID_UNKNOWN2 0x06 -#define SEQ_ID_UNKNOWN3 0x07 -/* S3 extensions */ -#define SEQ_ID_UNLOCK_EXT 0x08 -#define SEQ_ID_EXT_SEQ_REG9 0x09 /* b7 = 1 extended reg access by MMIO only */ -#define SEQ_ID_BUS_REQ_CNTL 0x0A -#define SEQ_ID_EXT_MISC_SEQ 0x0B -#define SEQ_ID_UNKNOWN4 0x0C -#define SEQ_ID_EXT_SEQ 0x0D -#define SEQ_ID_UNKNOWN5 0x0E -#define SEQ_ID_UNKNOWN6 0x0F -#define SEQ_ID_MCLK_LO 0x10 -#define SEQ_ID_MCLK_HI 0x11 -#define SEQ_ID_DCLK_LO 0x12 -#define SEQ_ID_DCLK_HI 0x13 -#define SEQ_ID_CLKSYN_CNTL_1 0x14 -#define SEQ_ID_CLKSYN_CNTL_2 0x15 -#define SEQ_ID_CLKSYN_TEST_HI 0x16 /* reserved for S3 testing of the */ -#define SEQ_ID_CLKSYN_TEST_LO 0x17 /* internal clock synthesizer */ -#define SEQ_ID_RAMDAC_CNTL 0x18 -#define SEQ_ID_MORE_MAGIC 0x1A -#define SEQ_ID_SIGNAL_SELECT 0x1C /* new for virge */ - -/* CRT Controller: */ -#define CRT_ADDRESS 0x03D4 -#define CRT_ADDRESS_R 0x03D5 -#define CRT_ADDRESS_W 0x03D5 -#define CRT_ID_HOR_TOTAL 0x00 -#define CRT_ID_HOR_DISP_ENA_END 0x01 -#define CRT_ID_START_HOR_BLANK 0x02 -#define CRT_ID_END_HOR_BLANK 0x03 -#define CRT_ID_START_HOR_RETR 0x04 -#define CRT_ID_END_HOR_RETR 0x05 -#define CRT_ID_VER_TOTAL 0x06 -#define CRT_ID_OVERFLOW 0x07 -#define CRT_ID_PRESET_ROW_SCAN 0x08 -#define CRT_ID_MAX_SCAN_LINE 0x09 -#define CRT_ID_CURSOR_START 0x0A -#define CRT_ID_CURSOR_END 0x0B -#define CRT_ID_START_ADDR_HIGH 0x0C -#define CRT_ID_START_ADDR_LOW 0x0D -#define CRT_ID_CURSOR_LOC_HIGH 0x0E -#define CRT_ID_CURSOR_LOC_LOW 0x0F -#define CRT_ID_START_VER_RETR 0x10 -#define CRT_ID_END_VER_RETR 0x11 -#define CRT_ID_VER_DISP_ENA_END 0x12 -#define CRT_ID_SCREEN_OFFSET 0x13 -#define CRT_ID_UNDERLINE_LOC 0x14 -#define CRT_ID_START_VER_BLANK 0x15 -#define CRT_ID_END_VER_BLANK 0x16 -#define CRT_ID_MODE_CONTROL 0x17 -#define CRT_ID_LINE_COMPARE 0x18 -#define CRT_ID_GD_LATCH_RBACK 0x22 -#define CRT_ID_ACT_TOGGLE_RBACK 0x24 -#define CRT_ID_ACT_INDEX_RBACK 0x26 -/* S3 extensions: S3 VGA Registers */ -#define CRT_ID_DEVICE_HIGH 0x2D -#define CRT_ID_DEVICE_LOW 0x2E -#define CRT_ID_REVISION 0x2F -#define CRT_ID_CHIP_ID_REV 0x30 -#define CRT_ID_MEMORY_CONF 0x31 -#define CRT_ID_BACKWAD_COMP_1 0x32 -#define CRT_ID_BACKWAD_COMP_2 0x33 -#define CRT_ID_BACKWAD_COMP_3 0x34 -#define CRT_ID_REGISTER_LOCK 0x35 -#define CRT_ID_CONFIG_1 0x36 -#define CRT_ID_CONFIG_2 0x37 -#define CRT_ID_REGISTER_LOCK_1 0x38 -#define CRT_ID_REGISTER_LOCK_2 0x39 -#define CRT_ID_MISC_1 0x3A -#define CRT_ID_DISPLAY_FIFO 0x3B -#define CRT_ID_LACE_RETR_START 0x3C -/* S3 extensions: System Control Registers */ -#define CRT_ID_SYSTEM_CONFIG 0x40 -#define CRT_ID_BIOS_FLAG 0x41 -#define CRT_ID_LACE_CONTROL 0x42 -#define CRT_ID_EXT_MODE 0x43 -#define CRT_ID_HWGC_MODE 0x45 /* HWGC = Hardware Graphics Cursor */ -#define CRT_ID_HWGC_ORIGIN_X_HI 0x46 -#define CRT_ID_HWGC_ORIGIN_X_LO 0x47 -#define CRT_ID_HWGC_ORIGIN_Y_HI 0x48 -#define CRT_ID_HWGC_ORIGIN_Y_LO 0x49 -#define CRT_ID_HWGC_FG_STACK 0x4A -#define CRT_ID_HWGC_BG_STACK 0x4B -#define CRT_ID_HWGC_START_AD_HI 0x4C -#define CRT_ID_HWGC_START_AD_LO 0x4D -#define CRT_ID_HWGC_DSTART_X 0x4E -#define CRT_ID_HWGC_DSTART_Y 0x4F -/* S3 extensions: System Extension Registers */ -#define CRT_ID_EXT_SYS_CNTL_1 0x50 /* NOT a virge register */ -#define CRT_ID_EXT_SYS_CNTL_2 0x51 -#define CRT_ID_EXT_BIOS_FLAG_1 0x52 -#define CRT_ID_EXT_MEM_CNTL_1 0x53 -#define CRT_ID_EXT_MEM_CNTL_2 0x54 -#define CRT_ID_EXT_DAC_CNTL 0x55 -#define CRT_ID_EX_SYNC_1 0x56 -#define CRT_ID_EX_SYNC_2 0x57 -#define CRT_ID_LAW_CNTL 0x58 /* LAW = Linear Address Window */ -#define CRT_ID_LAW_POS_HI 0x59 -#define CRT_ID_LAW_POS_LO 0x5A -#define CRT_ID_GOUT_PORT 0x5C -#define CRT_ID_EXT_HOR_OVF 0x5D -#define CRT_ID_EXT_VER_OVF 0x5E -#define CRT_ID_EXT_MEM_CNTL_3 0x60 /* NOT a virge register */ -#define CRT_ID_EXT_MEM_CNTL_4 0x61 -#define CRT_ID_EX_SYNC_3 0x63 /* NOT a virge register */ -#define CRT_ID_EXT_MISC_CNTL 0x65 -#define CRT_ID_EXT_MISC_CNTL_1 0x66 -#define CRT_ID_EXT_MISC_CNTL_2 0x67 -#define CRT_ID_CONFIG_3 0x68 -#define CRT_ID_EXT_SYS_CNTL_3 0x69 -#define CRT_ID_EXT_SYS_CNTL_4 0x6A -#define CRT_ID_EXT_BIOS_FLAG_3 0x6B -#define CRT_ID_EXT_BIOS_FLAG_4 0x6C -/* S3 virge extensions: more System Extension Registers */ -#define CRT_ID_EXT_BIOS_FLAG_5 0x6D -#define CRT_ID_EXT_DAC_TEST 0x6E -#define CRT_ID_CONFIG_4 0x6F - -/* Video DAC */ -#define VDAC_ADDRESS 0x03c8 -#define VDAC_ADDRESS_W 0x03c8 -#define VDAC_ADDRESS_R 0x03c7 -#define VDAC_STATE 0x03c7 -#define VDAC_DATA 0x03c9 -#define VDAC_MASK 0x03c6 - -/* Miscellaneous Registers */ -#define MR_SUBSYSTEM_STATUS_R 0x8504 /* new for virge */ -#define MR_SUBSYSTEM_CNTL_W 0x8504 /* new for virge */ -#define MR_ADVANCED_FUNCTION_CONTROL 0x850C /* new for virge */ - -/* Blitter */ -#define BLT_COMMAND_SET 0xA500 -#define BLT_SIZE_X_Y 0xA504 -#define BLT_SRC_X_Y 0xA508 -#define BLT_DEST_X_Y 0xA50C - -#define BLT_SRC_BASE 0xa4d4 -#define BLT_DEST_BASE 0xa4d8 -#define BLT_CLIP_LEFT_RIGHT 0xa4dc -#define BLT_CLIP_TOP_BOTTOM 0xa4e0 -#define BLT_SRC_DEST_STRIDE 0xa4e4 -#define BLT_MONO_PATTERN_0 0xa4e8 -#define BLT_MONO_PATTERN_1 0xa4ec -#define BLT_PATTERN_COLOR 0xa4f4 - -#define L2D_COMMAND_SET 0xA900 -#define L2D_CLIP_LEFT_RIGHT 0xA8DC -#define L2D_CLIP_TOP_BOTTOM 0xA8E0 - -#define P2D_COMMAND_SET 0xAD00 -#define P2D_CLIP_LEFT_RIGHT 0xACDC -#define P2D_CLIP_TOP_BOTTOM 0xACE0 - -#define CMD_NOP (0xf << 27) /* %1111 << 27, was 0x07 */ -#define S3V_BITBLT (0x0 << 27) -#define S3V_RECTFILL (0x2 << 27) -#define S3V_AUTOEXE 0x01 -#define S3V_HWCLIP 0x02 -#define S3V_DRAW 0x20 -#define S3V_DST_8BPP 0x00 -#define S3V_DST_16BPP 0x04 -#define S3V_DST_24BPP 0x08 -#define S3V_MONO_PAT 0x100 - -#define S3V_BLT_COPY (0xcc<<17) -#define S3V_BLT_CLEAR (0x00<<17) -#define S3V_BLT_SET (0xff<<17) |