diff options
Diffstat (limited to 'include/asm-arm')
-rw-r--r-- | include/asm-arm/arch-omap/clock.h | 5 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/entry-macro.S | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/io.h | 70 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/omap24xx.h | 96 |
4 files changed, 152 insertions, 21 deletions
diff --git a/include/asm-arm/arch-omap/clock.h b/include/asm-arm/arch-omap/clock.h index fa688104990..fc7b8064385 100644 --- a/include/asm-arm/arch-omap/clock.h +++ b/include/asm-arm/arch-omap/clock.h @@ -88,4 +88,9 @@ extern int clk_get_usecount(struct clk *clk); #define CLOCK_IN_OMAP242X (1 << 25) #define CLOCK_IN_OMAP243X (1 << 26) +/* CM_CLKSEL2_PLL.CORE_CLK_SRC options (24XX) */ +#define CORE_CLK_SRC_32K 0 +#define CORE_CLK_SRC_DPLL 1 +#define CORE_CLK_SRC_DPLL_X2 2 + #endif diff --git a/include/asm-arm/arch-omap/entry-macro.S b/include/asm-arm/arch-omap/entry-macro.S index f6967c8df32..74cd57221c8 100644 --- a/include/asm-arm/arch-omap/entry-macro.S +++ b/include/asm-arm/arch-omap/entry-macro.S @@ -68,7 +68,7 @@ .endm .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, =VA_IC_BASE + ldr \base, =OMAP2_VA_IC_BASE ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */ cmp \irqnr, #0x0 bne 2222f diff --git a/include/asm-arm/arch-omap/io.h b/include/asm-arm/arch-omap/io.h index 289082d07f1..160578e1f55 100644 --- a/include/asm-arm/arch-omap/io.h +++ b/include/asm-arm/arch-omap/io.h @@ -80,6 +80,13 @@ #define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE /* 0x49000000 */ #define OMAP243X_GPMC_VIRT 0xFE000000 #define OMAP243X_GPMC_SIZE SZ_1M +#define OMAP243X_SDRC_PHYS OMAP243X_SDRC_BASE +#define OMAP243X_SDRC_VIRT 0xFD000000 +#define OMAP243X_SDRC_SIZE SZ_1M +#define OMAP243X_SMS_PHYS OMAP243X_SMS_BASE +#define OMAP243X_SMS_VIRT 0xFC000000 +#define OMAP243X_SMS_SIZE SZ_1M + #endif #define IO_OFFSET 0x90000000 @@ -88,16 +95,73 @@ #define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */ /* DSP */ -#define DSP_MEM_24XX_PHYS OMAP24XX_DSP_MEM_BASE /* 0x58000000 */ +#define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ #define DSP_MEM_24XX_VIRT 0xe0000000 #define DSP_MEM_24XX_SIZE 0x28000 -#define DSP_IPI_24XX_PHYS OMAP24XX_DSP_IPI_BASE /* 0x59000000 */ +#define DSP_IPI_24XX_PHYS OMAP2420_DSP_IPI_BASE /* 0x59000000 */ #define DSP_IPI_24XX_VIRT 0xe1000000 #define DSP_IPI_24XX_SIZE SZ_4K -#define DSP_MMU_24XX_PHYS OMAP24XX_DSP_MMU_BASE /* 0x5a000000 */ +#define DSP_MMU_24XX_PHYS OMAP2420_DSP_MMU_BASE /* 0x5a000000 */ #define DSP_MMU_24XX_VIRT 0xe2000000 #define DSP_MMU_24XX_SIZE SZ_4K +#elif defined(CONFIG_ARCH_OMAP3) + +/* We map both L3 and L4 on OMAP3 */ +#define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 */ +#define L3_34XX_VIRT 0xf8000000 +#define L3_34XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */ + +#define L4_34XX_PHYS L4_34XX_BASE /* 0x48000000 */ +#define L4_34XX_VIRT 0xd8000000 +#define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */ + +/* + * Need to look at the Size 4M for L4. + * VPOM3430 was not working for Int controller + */ + +#define L4_WK_34XX_PHYS L4_WK_34XX_BASE /* 0x48300000 */ +#define L4_WK_34XX_VIRT 0xd8300000 +#define L4_WK_34XX_SIZE SZ_1M + +#define L4_PER_34XX_PHYS L4_PER_34XX_BASE /* 0x49000000 */ +#define L4_PER_34XX_VIRT 0xd9000000 +#define L4_PER_34XX_SIZE SZ_1M + +#define L4_EMU_34XX_PHYS L4_EMU_34XX_BASE /* 0x54000000 */ +#define L4_EMU_34XX_VIRT 0xe4000000 +#define L4_EMU_34XX_SIZE SZ_64M + +#define OMAP34XX_GPMC_PHYS OMAP34XX_GPMC_BASE /* 0x6E000000 */ +#define OMAP34XX_GPMC_VIRT 0xFE000000 +#define OMAP34XX_GPMC_SIZE SZ_1M + +#define OMAP343X_SMS_PHYS OMAP343X_SMS_BASE /* 0x6C000000 */ +#define OMAP343X_SMS_VIRT 0xFC000000 +#define OMAP343X_SMS_SIZE SZ_1M + +#define OMAP343X_SDRC_PHYS OMAP343X_SDRC_BASE /* 0x6D000000 */ +#define OMAP343X_SDRC_VIRT 0xFD000000 +#define OMAP343X_SDRC_SIZE SZ_1M + + +#define IO_OFFSET 0x90000000 +#define IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ +#define io_p2v(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ +#define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */ + +/* DSP */ +#define DSP_MEM_34XX_PHYS OMAP34XX_DSP_MEM_BASE /* 0x58000000 */ +#define DSP_MEM_34XX_VIRT 0xe0000000 +#define DSP_MEM_34XX_SIZE 0x28000 +#define DSP_IPI_34XX_PHYS OMAP34XX_DSP_IPI_BASE /* 0x59000000 */ +#define DSP_IPI_34XX_VIRT 0xe1000000 +#define DSP_IPI_34XX_SIZE SZ_4K +#define DSP_MMU_34XX_PHYS OMAP34XX_DSP_MMU_BASE /* 0x5a000000 */ +#define DSP_MMU_34XX_VIRT 0xe2000000 +#define DSP_MMU_34XX_SIZE SZ_4K + #endif #ifndef __ASSEMBLER__ diff --git a/include/asm-arm/arch-omap/omap24xx.h b/include/asm-arm/arch-omap/omap24xx.h index 14c0f949657..b9fcaae287c 100644 --- a/include/asm-arm/arch-omap/omap24xx.h +++ b/include/asm-arm/arch-omap/omap24xx.h @@ -1,3 +1,28 @@ +/* + * include/asm-arm/arch-omap/omap24xx.h + * + * This file contains the processor specific definitions + * of the TI OMAP24XX. + * + * Copyright (C) 2007 Texas Instruments. + * Copyright (C) 2007 Nokia Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + #ifndef __ASM_ARCH_OMAP24XX_H #define __ASM_ARCH_OMAP24XX_H @@ -13,33 +38,70 @@ /* interrupt controller */ #define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000) -#define VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE) #define OMAP24XX_IVA_INTC_BASE 0x40000000 #define IRQ_SIR_IRQ 0x0040 -#ifdef CONFIG_ARCH_OMAP2420 -#define OMAP24XX_32KSYNCT_BASE (L4_24XX_BASE + 0x4000) -#define OMAP24XX_PRCM_BASE (L4_24XX_BASE + 0x8000) -#define OMAP24XX_SDRC_BASE (L3_24XX_BASE + 0x9000) -#define OMAP242X_CONTROL_STATUS (L4_24XX_BASE + 0x2f8) -#endif +#define OMAP2420_CTRL_BASE L4_24XX_BASE +#define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000) +#define OMAP2420_PRCM_BASE (L4_24XX_BASE + 0x8000) +#define OMAP2420_CM_BASE (L4_24XX_BASE + 0x8000) +#define OMAP2420_PRM_BASE OMAP2420_CM_BASE +#define OMAP2420_SDRC_BASE (L3_24XX_BASE + 0x9000) +#define OMAP2420_SMS_BASE 0x68008000 -#ifdef CONFIG_ARCH_OMAP2430 -#define OMAP24XX_32KSYNCT_BASE (L4_WK_243X_BASE + 0x20000) -#define OMAP24XX_PRCM_BASE (L4_WK_243X_BASE + 0x6000) -#define OMAP24XX_SDRC_BASE (0x6D000000) -#define OMAP242X_CONTROL_STATUS (L4_24XX_BASE + 0x2f8) +#define OMAP2430_32KSYNCT_BASE (L4_WK_243X_BASE + 0x20000) +#define OMAP2430_PRCM_BASE (L4_WK_243X_BASE + 0x6000) +#define OMAP2430_CM_BASE (L4_WK_243X_BASE + 0x6000) +#define OMAP2430_PRM_BASE OMAP2430_CM_BASE + +#define OMAP243X_SMS_BASE 0x6C000000 +#define OMAP243X_SDRC_BASE 0x6D000000 #define OMAP243X_GPMC_BASE 0x6E000000 -#endif +#define OMAP243X_SCM_BASE (L4_WK_243X_BASE + 0x2000) +#define OMAP243X_CTRL_BASE OMAP243X_SCM_BASE +#define OMAP243X_HS_BASE (L4_24XX_BASE + 0x000ac000) /* DSP SS */ -#define OMAP24XX_DSP_BASE 0x58000000 -#define OMAP24XX_DSP_MEM_BASE (OMAP24XX_DSP_BASE + 0x0) -#define OMAP24XX_DSP_IPI_BASE (OMAP24XX_DSP_BASE + 0x1000000) -#define OMAP24XX_DSP_MMU_BASE (OMAP24XX_DSP_BASE + 0x2000000) +#define OMAP2420_DSP_BASE 0x58000000 +#define OMAP2420_DSP_MEM_BASE (OMAP2420_DSP_BASE + 0x0) +#define OMAP2420_DSP_IPI_BASE (OMAP2420_DSP_BASE + 0x1000000) +#define OMAP2420_DSP_MMU_BASE (OMAP2420_DSP_BASE + 0x2000000) + +#define OMAP243X_DSP_BASE 0x5C000000 +#define OMAP243X_DSP_MEM_BASE (OMAP243X_DSP_BASE + 0x0) +#define OMAP243X_DSP_MMU_BASE (OMAP243X_DSP_BASE + 0x1000000) /* Mailbox */ #define OMAP24XX_MAILBOX_BASE (L4_24XX_BASE + 0x94000) +/* Camera */ +#define OMAP24XX_CAMERA_BASE (L4_24XX_BASE + 0x52000) + +/* Security */ +#define OMAP24XX_SEC_BASE (L4_24XX_BASE + 0xA0000) +#define OMAP24XX_SEC_RNG_BASE (OMAP24XX_SEC_BASE + 0x0000) +#define OMAP24XX_SEC_DES_BASE (OMAP24XX_SEC_BASE + 0x2000) +#define OMAP24XX_SEC_SHA1MD5_BASE (OMAP24XX_SEC_BASE + 0x4000) +#define OMAP24XX_SEC_AES_BASE (OMAP24XX_SEC_BASE + 0x6000) +#define OMAP24XX_SEC_PKA_BASE (OMAP24XX_SEC_BASE + 0x8000) + +#if defined(CONFIG_ARCH_OMAP2420) + +#define OMAP2_32KSYNCT_BASE OMAP2420_32KSYNCT_BASE +#define OMAP2_PRCM_BASE OMAP2420_PRCM_BASE +#define OMAP2_CM_BASE OMAP2420_CM_BASE +#define OMAP2_PRM_BASE OMAP2420_PRM_BASE +#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE) + +#elif defined(CONFIG_ARCH_OMAP2430) + +#define OMAP2_32KSYNCT_BASE OMAP2430_32KSYNCT_BASE +#define OMAP2_PRCM_BASE OMAP2430_PRCM_BASE +#define OMAP2_CM_BASE OMAP2430_CM_BASE +#define OMAP2_PRM_BASE OMAP2430_PRM_BASE +#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE) + +#endif + #endif /* __ASM_ARCH_OMAP24XX_H */ |