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-rw-r--r--include/asm-ppc64/cputable.h3
-rw-r--r--include/asm-ppc64/hvconsole.h17
-rw-r--r--include/asm-ppc64/iSeries/ItLpQueue.h15
-rw-r--r--include/asm-ppc64/machdep.h5
-rw-r--r--include/asm-ppc64/paca.h3
-rw-r--r--include/asm-ppc64/pci.h2
-rw-r--r--include/asm-ppc64/processor.h26
-rw-r--r--include/asm-ppc64/unistd.h6
8 files changed, 51 insertions, 26 deletions
diff --git a/include/asm-ppc64/cputable.h b/include/asm-ppc64/cputable.h
index cbbfbec78b6..d67fa9e2607 100644
--- a/include/asm-ppc64/cputable.h
+++ b/include/asm-ppc64/cputable.h
@@ -138,6 +138,7 @@ extern firmware_feature_t firmware_features_table[];
#define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x0000020000000000)
#define CPU_FTR_LOCKLESS_TLBIE ASM_CONST(0x0000040000000000)
#define CPU_FTR_MMCRA_SIHV ASM_CONST(0x0000080000000000)
+#define CPU_FTR_CTRL ASM_CONST(0x0000100000000000)
/* Platform firmware features */
#define FW_FTR_ ASM_CONST(0x0000000000000001)
@@ -148,7 +149,7 @@ extern firmware_feature_t firmware_features_table[];
#define CPU_FTR_PPCAS_ARCH_V2_BASE (CPU_FTR_SLB | \
CPU_FTR_TLBIEL | CPU_FTR_NOEXECUTE | \
- CPU_FTR_NODSISRALIGN)
+ CPU_FTR_NODSISRALIGN | CPU_FTR_CTRL)
/* iSeries doesn't support large pages */
#ifdef CONFIG_PPC_ISERIES
diff --git a/include/asm-ppc64/hvconsole.h b/include/asm-ppc64/hvconsole.h
index d89d94c9181..6da93ce74dc 100644
--- a/include/asm-ppc64/hvconsole.h
+++ b/include/asm-ppc64/hvconsole.h
@@ -29,12 +29,21 @@
*/
#define MAX_NR_HVC_CONSOLES 16
+/* implemented by a low level driver */
+struct hv_ops {
+ int (*get_chars)(uint32_t vtermno, char *buf, int count);
+ int (*put_chars)(uint32_t vtermno, const char *buf, int count);
+};
extern int hvc_get_chars(uint32_t vtermno, char *buf, int count);
extern int hvc_put_chars(uint32_t vtermno, const char *buf, int count);
-/* Early discovery of console adapters. */
-extern int hvc_find_vtys(void);
+struct hvc_struct;
-/* Implemented by a console driver */
-extern int hvc_instantiate(uint32_t vtermno, int index);
+/* Register a vterm and a slot index for use as a console (console_init) */
+extern int hvc_instantiate(uint32_t vtermno, int index, struct hv_ops *ops);
+/* register a vterm for hvc tty operation (module_init or hotplug add) */
+extern struct hvc_struct * __devinit hvc_alloc(uint32_t vtermno, int irq,
+ struct hv_ops *ops);
+/* remove a vterm from hvc tty operation (modele_exit or hotplug remove) */
+extern int __devexit hvc_remove(struct hvc_struct *hp);
#endif /* _PPC64_HVCONSOLE_H */
diff --git a/include/asm-ppc64/iSeries/ItLpQueue.h b/include/asm-ppc64/iSeries/ItLpQueue.h
index 393299e04d7..69b26ad7413 100644
--- a/include/asm-ppc64/iSeries/ItLpQueue.h
+++ b/include/asm-ppc64/iSeries/ItLpQueue.h
@@ -41,7 +41,7 @@ struct HvLpEvent;
#define LpEventMaxSize 256
#define LpEventAlign 64
-struct ItLpQueue {
+struct hvlpevent_queue {
/*
* The xSlicCurEventPtr is the pointer to the next event stack entry
* that will become valid. The OS must peek at this entry to determine
@@ -69,16 +69,13 @@ struct ItLpQueue {
char *xSlicEventStackPtr; // 0x20
u8 xIndex; // 0x28 unique sequential index.
u8 xSlicRsvd[3]; // 0x29-2b
- u32 xInUseWord; // 0x2C
- u64 xLpIntCount; // 0x30 Total Lp Int msgs processed
- u64 xLpIntCountByType[9]; // 0x38-0x7F Event counts by type
+ spinlock_t lock;
};
-extern struct ItLpQueue xItLpQueue;
+extern struct hvlpevent_queue hvlpevent_queue;
-extern struct HvLpEvent *ItLpQueue_getNextLpEvent(struct ItLpQueue *);
-extern int ItLpQueue_isLpIntPending(struct ItLpQueue *);
-extern unsigned ItLpQueue_process(struct ItLpQueue *, struct pt_regs *);
-extern void ItLpQueue_clearValid(struct HvLpEvent *);
+extern int hvlpevent_is_pending(void);
+extern void process_hvlpevents(struct pt_regs *);
+extern void setup_hvlpevent_queue(void);
#endif /* _ITLPQUEUE_H */
diff --git a/include/asm-ppc64/machdep.h b/include/asm-ppc64/machdep.h
index 9cdad3ed152..1e6ad482413 100644
--- a/include/asm-ppc64/machdep.h
+++ b/include/asm-ppc64/machdep.h
@@ -140,8 +140,13 @@ struct machdep_calls {
unsigned long size,
pgprot_t vma_prot);
+ /* Idle loop for this platform, leave empty for default idle loop */
+ int (*idle_loop)(void);
};
+extern int default_idle(void);
+extern int native_idle(void);
+
extern struct machdep_calls ppc_md;
extern char cmd_line[COMMAND_LINE_SIZE];
diff --git a/include/asm-ppc64/paca.h b/include/asm-ppc64/paca.h
index ae76cae1483..2f0f36f73d3 100644
--- a/include/asm-ppc64/paca.h
+++ b/include/asm-ppc64/paca.h
@@ -20,7 +20,6 @@
#include <asm/types.h>
#include <asm/lppaca.h>
#include <asm/iSeries/ItLpRegSave.h>
-#include <asm/iSeries/ItLpQueue.h>
#include <asm/mmu.h>
register struct paca_struct *local_paca asm("r13");
@@ -62,7 +61,6 @@ struct paca_struct {
u16 paca_index; /* Logical processor number */
u32 default_decr; /* Default decrementer value */
- struct ItLpQueue *lpqueue_ptr; /* LpQueue handled by this CPU */
u64 kernel_toc; /* Kernel TOC address */
u64 stab_real; /* Absolute address of segment table */
u64 stab_addr; /* Virtual address of segment table */
@@ -91,7 +89,6 @@ struct paca_struct {
u64 next_jiffy_update_tb; /* TB value for next jiffy update */
u64 saved_r1; /* r1 save for RTAS calls */
u64 saved_msr; /* MSR saved here by enter_rtas */
- u32 lpevent_count; /* lpevents processed */
u8 proc_enabled; /* irq soft-enable flag */
/* not yet used */
diff --git a/include/asm-ppc64/pci.h b/include/asm-ppc64/pci.h
index d12dfce21e2..faa77222307 100644
--- a/include/asm-ppc64/pci.h
+++ b/include/asm-ppc64/pci.h
@@ -37,7 +37,7 @@ static inline void pcibios_set_master(struct pci_dev *dev)
/* No special bus mastering setup handling */
}
-static inline void pcibios_penalize_isa_irq(int irq)
+static inline void pcibios_penalize_isa_irq(int irq, int active)
{
/* We don't do dynamic PCI IRQ allocation */
}
diff --git a/include/asm-ppc64/processor.h b/include/asm-ppc64/processor.h
index af28aa55d8c..352306cfb57 100644
--- a/include/asm-ppc64/processor.h
+++ b/include/asm-ppc64/processor.h
@@ -20,6 +20,7 @@
#include <asm/ptrace.h>
#include <asm/types.h>
#include <asm/systemcfg.h>
+#include <asm/cputable.h>
/* Machine State Register (MSR) Fields */
#define MSR_SF_LG 63 /* Enable 64 bit mode */
@@ -501,24 +502,37 @@ static inline void ppc64_runlatch_on(void)
{
unsigned long ctrl;
- ctrl = mfspr(SPRN_CTRLF);
- ctrl |= CTRL_RUNLATCH;
- mtspr(SPRN_CTRLT, ctrl);
+ if (cpu_has_feature(CPU_FTR_CTRL)) {
+ ctrl = mfspr(SPRN_CTRLF);
+ ctrl |= CTRL_RUNLATCH;
+ mtspr(SPRN_CTRLT, ctrl);
+ }
}
static inline void ppc64_runlatch_off(void)
{
unsigned long ctrl;
- ctrl = mfspr(SPRN_CTRLF);
- ctrl &= ~CTRL_RUNLATCH;
- mtspr(SPRN_CTRLT, ctrl);
+ if (cpu_has_feature(CPU_FTR_CTRL)) {
+ ctrl = mfspr(SPRN_CTRLF);
+ ctrl &= ~CTRL_RUNLATCH;
+ mtspr(SPRN_CTRLT, ctrl);
+ }
}
#endif /* __KERNEL__ */
#endif /* __ASSEMBLY__ */
+#ifdef __KERNEL__
+#define RUNLATCH_ON(REG) \
+BEGIN_FTR_SECTION \
+ mfspr (REG),SPRN_CTRLF; \
+ ori (REG),(REG),CTRL_RUNLATCH; \
+ mtspr SPRN_CTRLT,(REG); \
+END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
+#endif
+
/*
* Number of entries in the SLB. If this ever changes we should handle
* it with a use a cpu feature fixup.
diff --git a/include/asm-ppc64/unistd.h b/include/asm-ppc64/unistd.h
index 605d91e011e..4a94acf6bfe 100644
--- a/include/asm-ppc64/unistd.h
+++ b/include/asm-ppc64/unistd.h
@@ -268,7 +268,7 @@
#define __NR_rtas 255
/* Number 256 is reserved for sys_debug_setcontext */
/* Number 257 is reserved for vserver */
-/* Number 258 is reserved for new sys_remap_file_pages */
+/* 258 currently unused */
#define __NR_mbind 259
#define __NR_get_mempolicy 260
#define __NR_set_mempolicy 261
@@ -283,8 +283,10 @@
#define __NR_request_key 270
#define __NR_keyctl 271
#define __NR_waitid 272
+#define __NR_ioprio_set 273
+#define __NR_ioprio_get 274
-#define __NR_syscalls 273
+#define __NR_syscalls 275
#ifdef __KERNEL__
#define NR_syscalls __NR_syscalls
#endif
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-16 02:37:21 +0000