aboutsummaryrefslogtreecommitdiff
path: root/include/linux/ssb/ssb_regs.h
diff options
context:
space:
mode:
Diffstat (limited to 'include/linux/ssb/ssb_regs.h')
-rw-r--r--include/linux/ssb/ssb_regs.h32
1 files changed, 32 insertions, 0 deletions
diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h
index 47c7c71a5ac..bcebcffd448 100644
--- a/include/linux/ssb/ssb_regs.h
+++ b/include/linux/ssb/ssb_regs.h
@@ -250,6 +250,38 @@
#define SSB_SPROM3_CCKPO_11M 0xF000 /* 11M Rate PO */
#define SSB_SPROM3_CCKPO_11M_SHIFT 12
#define SSB_SPROM3_OFDMGPO 0x107A /* G-PHY OFDM Power Offset (4 bytes, BigEndian) */
+/* SPROM Revision 4 */
+#define SSB_SPROM4_IL0MAC 0x104C /* 6 byte MAC address for b/g */
+#define SSB_SPROM4_ETHPHY 0x105A /* Ethernet PHY settings */
+#define SSB_SPROM4_ETHPHY_ET0A 0x001F /* MII Address for enet0 */
+#define SSB_SPROM4_ETHPHY_ET1A 0x03E0 /* MII Address for enet1 */
+#define SSB_SPROM4_ETHPHY_ET1A_SHIFT 5
+#define SSB_SPROM4_ETHPHY_ET0M (1<<14) /* MDIO for enet0 */
+#define SSB_SPROM4_ETHPHY_ET1M (1<<15) /* MDIO for enet1 */
+#define SSB_SPROM4_CCODE 0x1052 /* Country Code (2 bytes) */
+#define SSB_SPROM4_ANT_A 0x105D /* A Antennas */
+#define SSB_SPROM4_ANT_BG 0x105C /* B/G Antennas */
+#define SSB_SPROM4_BFLLO 0x1044 /* Boardflags (low 16 bits) */
+#define SSB_SPROM4_AGAIN 0x105E /* Antenna Gain (in dBm Q5.2) */
+#define SSB_SPROM4_BFLHI 0x1046 /* Board Flags Hi */
+#define SSB_SPROM4_MAXP_A 0x1000 /* Max Power A */
+#define SSB_SPROM4_MAXP_A_HI 0x00FF /* Mask for Hi */
+#define SSB_SPROM4_MAXP_A_LO 0xFF00 /* Mask for Lo */
+#define SSB_SPROM4_MAXP_A_LO_SHIFT 16 /* Shift for Lo */
+#define SSB_SPROM4_PA1LOB0 0x1000
+#define SSB_SPROM4_PA1LOB1 0x1000
+#define SSB_SPROM4_PA1LOB2 0x1000
+#define SSB_SPROM4_PA1HIB0 0x1000
+#define SSB_SPROM4_PA1HIB1 0x1000
+#define SSB_SPROM4_PA1HIB2 0x1000
+#define SSB_SPROM4_OPO 0x1000
+#define SSB_SPROM4_OPO_VALUE 0x0000
+#define SSB_SPROM4_GPIOLDC 0x105A /* LED Powersave Duty Cycle */
+#define SSB_SPROM4_GPIOLDC_OFF 0x0000FF00 /* Off Count */
+#define SSB_SPROM4_GPIOLDC_OFF_SHIFT 8
+#define SSB_SPROM4_GPIOLDC_ON 0x00FF0000 /* On Count */
+#define SSB_SPROM4_GPIOLDC_ON_SHIFT 16
+
/* Values for SSB_SPROM1_BINF_CCODE */
enum {