aboutsummaryrefslogtreecommitdiff
path: root/include
diff options
context:
space:
mode:
Diffstat (limited to 'include')
-rw-r--r--include/asm-blackfin/mach-bf533/cdefBF532.h6
-rw-r--r--include/asm-blackfin/mach-bf537/cdefBF534.h6
-rw-r--r--include/asm-blackfin/mach-bf561/cdefBF561.h6
3 files changed, 12 insertions, 6 deletions
diff --git a/include/asm-blackfin/mach-bf533/cdefBF532.h b/include/asm-blackfin/mach-bf533/cdefBF532.h
index 1d7c494ceb6..521bdb4d297 100644
--- a/include/asm-blackfin/mach-bf533/cdefBF532.h
+++ b/include/asm-blackfin/mach-bf533/cdefBF532.h
@@ -63,12 +63,14 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
{
unsigned long flags, iwr;
- bfin_write16(VR_CTL, val);
- __builtin_bfin_ssync();
/* Enable the PLL Wakeup bit in SIC IWR */
iwr = bfin_read32(SIC_IWR);
/* Only allow PPL Wakeup) */
bfin_write32(SIC_IWR, IWR_ENABLE(0));
+
+ bfin_write16(VR_CTL, val);
+ __builtin_bfin_ssync();
+
local_irq_save(flags);
asm("IDLE;");
local_irq_restore(flags);
diff --git a/include/asm-blackfin/mach-bf537/cdefBF534.h b/include/asm-blackfin/mach-bf537/cdefBF534.h
index 7b658c175f8..9a167f3b224 100644
--- a/include/asm-blackfin/mach-bf537/cdefBF534.h
+++ b/include/asm-blackfin/mach-bf537/cdefBF534.h
@@ -51,12 +51,14 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
{
unsigned long flags, iwr;
- bfin_write16(VR_CTL, val);
- __builtin_bfin_ssync();
/* Enable the PLL Wakeup bit in SIC IWR */
iwr = bfin_read32(SIC_IWR);
/* Only allow PPL Wakeup) */
bfin_write32(SIC_IWR, IWR_ENABLE(0));
+
+ bfin_write16(VR_CTL, val);
+ __builtin_bfin_ssync();
+
local_irq_save(flags);
asm("IDLE;");
local_irq_restore(flags);
diff --git a/include/asm-blackfin/mach-bf561/cdefBF561.h b/include/asm-blackfin/mach-bf561/cdefBF561.h
index 5dc0ed83544..b14f872e570 100644
--- a/include/asm-blackfin/mach-bf561/cdefBF561.h
+++ b/include/asm-blackfin/mach-bf561/cdefBF561.h
@@ -59,12 +59,14 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
{
unsigned long flags, iwr;
- bfin_write16(VR_CTL, val);
- __builtin_bfin_ssync();
/* Enable the PLL Wakeup bit in SIC IWR */
iwr = bfin_read32(SICA_IWR0);
/* Only allow PPL Wakeup) */
bfin_write32(SICA_IWR0, IWR_ENABLE(0));
+
+ bfin_write16(VR_CTL, val);
+ __builtin_bfin_ssync();
+
local_irq_save(flags);
asm("IDLE;");
local_irq_restore(flags);