| Age | Commit message (Collapse) | Author |
|---|
|
|
|
om-gta02-2.6.31
|
|
|
|
|
|
Signed-off-by: Nelson Castillo <arhuaco@freaks-unidos.net>
|
|
|
|
On Sat, Oct 24, 2009 at 3:04 AM, Nelson Castillo
<arhuaco@freaks-unidos.net> wrote:
> Hi there. I finally made this work. I tested with: cat /dev/input/touchscreen0 | hexdump
>
> I wonder why it didn't work with X... This rootfs works with other drivers I've tested (even with the upstream kernel).
Problem found.
Patch attached.
From: Nelson Castillo <arhuaco@freaks-unidos.net>
Date: Sat, 24 Oct 2009 14:12:58 -0500
Subject: [PATCH] Add auto-pst
Without these lines the TS doesn't work.
I didn't check who the author of the lines is.
Signed-off-by: Nelson Castillo <arhuaco@freaks-unidos.net>
|
|
This patch fixes a bug where the TS might stop working after suspend/resume.
This patch is under upstream review and it seems it will change a lot.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Nelson Castillo <arhuaco@freaks-unidos.net>
|
|
Add the ts and the relevant files.
Signed-off-by: Nelson Castillo <arhuaco@freaks-unidos.net>
|
|
Without this patch we cannot make the s3c2410/s3c2440 touchscreen
driver work. This will be done in a different way in upstream kernel.
We specify the delay value (S3C2410_ADCDLY).
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Nelson Castillo <arhuaco@freaks-unidos.net>
|
|
|
|
|
|
This patch adds a flag to the s3c2410_nand platform data, which configures
whether hardware ecc is used for that chip.
Currently hardware ecc is used if it was compiled into the kernel. But if you
want to build a kernel which runs on multiple devices you might have a
configuration where you have devices which require hw ecc as well as devices
which want software ecc.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
|
|
Early verions off uboot used for the gta02 flashed the nand with ecc information
incompatible to s3c2442 hardware ecc. Disable hardware error correction by
default, unless the bootloader explicitly enables it.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
|
|
|
|
|
|
... and remove unused reset pin resource.
|
|
The gta02 uses the glamo mfd driver which requires 9 board irqs.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
|
|
Some boards have a need for a set of extra IRQ numbers, for example some
multifunction devices which do irq demultiplexing require them.
This patch adds S3C2410_BOARD_NR_IRQS which specifies the number of extra board
IRQs. Board specific code would use S3C2410_BOARD_IRQ_START to get the number of
it's first irq.
Since it is possible to support a multiple boards with a single kernel and
there is no easy way to set a CONFIG option to multiple values and only use the
maximum each board which needs board IRQs has do be explicitly added to irqs.h
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
|
|
|
|
|
|
'glamo-2.6.31', 'jbt6k74-2.6.31', 'gta02-vibrator-2.6.31', 'bq27000-2.6.31', 'wm8753-2.6.31' and 'pcf50633-2.6.31' into om-gta02-2.6.31
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Add the S3C2442B CPU ID to aid support the Openmoko GTA02 / Freerunner.
Signed-off-by: Harald Welte <laforge@gnumonks.org>
Signed-off-by: Andy Green <andy@warmcat.com>
Signed-off-by: Nelson Castillo <arhuaco@freaks-unidos.net>
[ben-linux@fluff.org: edit description for clarity and S3C2442B as uppercase]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
|
|
|
|
|
|
|
|
|
|
On hardware revision 5 and earlier the leds found on the gta02 are missing a
resistor and reading their gpio pin status will always return 0. So we have to
shadow the led states in software. This is done by "hijacking" the gpio accessor
functions for bank B.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
|
|
The gta02 has three leds which are connected though gpio pins and thus can get
supported by using the generic leds-gpio driver.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
|
|
The gta02 has two buttons which are connected to gpio pins and thus can get
supported by using the generic gpio-keys driver.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
|
|
|
|
This patch fixes a null pointer exception caused by removal of
'ack()' for level interrupts in the Xilinx interrupt driver. A recent
change to the xilinx interrupt controller removed the ack hook for
level irqs.
Signed-off-by: Roderick Colenbrander <thunderbird2k@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6:
[IA64] fix csum_ipv6_magic()
[IA64] Fix warning in dma-mapping.c
|
|
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6:
sparc64: Fix bootup with mcount in some configs.
sparc64: Kill spurious NMI watchdog triggers by increasing limit to 30 seconds.
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'perfcounters-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
perf_counter/powerpc: Fix cache event codes for POWER7
perf_counter: Fix /0 bug in swcounters
perf_counters: Increase paranoia level
|
|
Functions invoked early when booting up a cpu can't use
tracing because mcount requires a valid 'current_thread_info()'
and TLB mappings to be setup.
The code path of sun4v_register_mondo_queues --> register_one_mondo
is one such case. sun4v_register_mondo_queues already has the
necessary 'notrace' annotation, but register_one_mondo does not.
Normally register_one_mondo is inlined so the bug doesn't trigger,
but with some config/compiler combinations, it won't be so we
must properly mark it notrace.
While we're here, add 'notrace' annoations to prom_printf and
prom_halt so that early error handling won't have the same problem.
Reported-by: Alexander Beregalov <a.beregalov@gmail.com>
Reported-by: Leif Sawyer <lsawyer@gci.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
This is a compromise and a temporary workaround for bootup NMI
watchdog triggers some people see with qla2xxx devices present.
This happens when, for example:
CPU 0 is in the driver init and looping submitting mailbox commands to
load the firmware, then waiting for completion.
CPU 1 is receiving the device interrupts. CPU 1 is where the NMI
watchdog triggers.
CPU 0 is submitting mailbox commands fast enough that by the time CPU
1 returns from the device interrupt handler, a new one is pending.
This sequence runs for more than 5 seconds.
The problematic case is CPU 1's timer interrupt running when the
barrage of device interrupts begin. Then we have:
timer interrupt
return for softirq checking
pending, thus enable interrupts
qla2xxx interrupt
return
qla2xxx interrupt
return
... 5+ seconds pass
final qla2xxx interrupt for fw load
return
run timer softirq
return
At some point in the multi-second qla2xxx interrupt storm we trigger
the NMI watchdog on CPU 1 from the NMI interrupt handler.
The timer softirq, once we get back to running it, is smart enough to
run the timer work enough times to make up for the missed timer
interrupts.
However, the NMI watchdogs (both x86 and sparc) use the timer
interrupt count to notice the cpu is wedged. But in the above
scenerio we'll receive only one such timer interrupt even if we last
all the way back to running the timer softirq.
The default watchdog trigger point is only 5 seconds, which is pretty
low (the softwatchdog triggers at 60 seconds). So increase it to 30
seconds for now.
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
I had the codes for L1 D-cache load accesses and misses swapped
around, and the wrong codes for LL-cache accesses and misses.
This corrects them.
Reported-by: Corey Ashford <cjashfor@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: <stable@kernel.org>
LKML-Reference: <19103.8514.709300.585484@cargo.ozlabs.ibm.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
|
|
The 32-bit parameters (len and csum) of csum_ipv6_magic() are passed in 64-bit
registers in2 and in4. The high order 32 bits of the registers were never
cleared, and garbage was sometimes calculated into the checksum.
Fix this by clearing the high order 32 bits of these registers.
Signed-off-by: Jiri Bohac <jbohac@suse.cz>
Signed-off-by: Tony Luck <tony.luck@intel.com>
|
|
arch/ia64/kernel/dma-mapping.c:14: warning: control reaches end of non-void function
arch/ia64/kernel/dma-mapping.c:14: warning: no return statement in function returning non-void
This warning was introduced by commit: 390bd132b2831a2ad0268e84bffbfc0680debfe5
Add dma_debug_init() for ia64
Signed-off-by: Tony Luck <tony.luck@intel.com>
|
|
On Tue, Aug 18, 2009 at 01:45:17PM -0400, John David Anglin wrote:
> CC arch/parisc/kernel/traps.o
> arch/parisc/kernel/traps.c: In function 'handle_interruption':
> arch/parisc/kernel/traps.c:535:18: warning: operation on 'regs->iasq[0]'
> may be undefined
Yes - Line 535 should use both [0] and [1].
Reported-by: John David Anglin <dave@hiauly1.hia.nrc.ca>
Signed-off-by: Grant Grundler <grundler@parisc-linux.org>
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
