1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
|
/*
* Copyright (C) 2006-2007 PA Semi, Inc
*
* Author: Shashi Rao, PA Semi
*
* Maintained by: Olof Johansson <olof@lixom.net>
*
* Based on arch/powerpc/oprofile/op_model_power4.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/oprofile.h>
#include <linux/init.h>
#include <linux/smp.h>
#include <linux/percpu.h>
#include <asm/processor.h>
#include <asm/cputable.h>
#include <asm/oprofile_impl.h>
#include <asm/reg.h>
static unsigned char oprofile_running;
/* mmcr values are set in pa6t_reg_setup, used in pa6t_cpu_setup */
static u64 mmcr0_val;
static u64 mmcr1_val;
/* inited in pa6t_reg_setup */
static u64 reset_value[OP_MAX_COUNTER];
static inline u64 ctr_read(unsigned int i)
{
switch (i) {
case 0:
return mfspr(SPRN_PA6T_PMC0);
case 1:
return mfspr(SPRN_PA6T_PMC1);
case 2:
return mfspr(SPRN_PA6T_PMC2);
case 3:
return mfspr(SPRN_PA6T_PMC3);
case 4:
return mfspr(SPRN_PA6T_PMC4);
case 5:
return mfspr(SPRN_PA6T_PMC5);
default:
printk(KERN_ERR "ctr_read called with bad arg %u\n", i);
return 0;
}
}
static inline void ctr_write(unsigned int i, u64 val)
{
switch (i) {
case 0:
mtspr(SPRN_PA6T_PMC0, val);
break;
case 1:
mtspr(SPRN_PA6T_PMC1, val);
break;
case 2:
mtspr(SPRN_PA6T_PMC2, val);
break;
case 3:
mtspr(SPRN_PA6T_PMC3, val);
break;
case 4:
mtspr(SPRN_PA6T_PMC4, val);
break;
case 5:
mtspr(SPRN_PA6T_PMC5, val);
break;
default:
printk(KERN_ERR "ctr_write called with bad arg %u\n", i);
break;
}
}
/* precompute the values to stuff in the hardware registers */
static int pa6t_reg_setup(struct op_counter_config *ctr,
struct op_system_config *sys,
int num_ctrs)
{
int pmc;
/*
* adjust the mmcr0.en[0-5] and mmcr0.inten[0-5] values obtained from the
* event_mappings file by turning off the counters that the user doesn't
* care about
*
* setup user and kernel profiling
*/
for (pmc = 0; pmc < cur_cpu_spec->num_pmcs; pmc++)
if (!ctr[pmc].enabled) {
sys->mmcr0 &= ~(0x1UL << pmc);
sys->mmcr0 &= ~(0x1UL << (pmc+12));
pr_debug("turned off counter %u\n", pmc);
}
if (sys->enable_kernel)
sys->mmcr0 |= PA6T_MMCR0_SUPEN | PA6T_MMCR0_HYPEN;
else
sys->mmcr0 &= ~(PA6T_MMCR0_SUPEN | PA6T_MMCR0_HYPEN);
if (sys->enable_user)
sys->mmcr0 |= PA6T_MMCR0_PREN;
else
sys->mmcr0 &= ~PA6T_MMCR0_PREN;
/*
* The performance counter event settings are given in the mmcr0 and
* mmcr1 values passed from the user in the op_system_config
* structure (sys variable).
*/
mmcr0_val = sys->mmcr0;
mmcr1_val = sys->mmcr1;
pr_debug("mmcr0_val inited to %016lx\n", sys->mmcr0);
pr_debug("mmcr1_val inited to %016lx\n", sys->mmcr1);
for (pmc = 0; pmc < cur_cpu_spec->num_pmcs; pmc++) {
/* counters are 40 bit. Move to cputable at some point? */
reset_value[pmc] = (0x1UL << 39) - ctr[pmc].count;
pr_debug("reset_value for pmc%u inited to 0x%lx\n",
pmc, reset_value[pmc]);
}
return 0;
}
/* configure registers on this cpu */
static int pa6t_cpu_setup(struct op_counter_config *ctr)
{
u64 mmcr0 = mmcr0_val;
u64 mmcr1 = mmcr1_val;
/* Default is all PMCs off */
mmcr0 &= ~(0x3FUL);
mtspr(SPRN_PA6T_MMCR0, mmcr0);
/* program selected programmable events in */
mtspr(SPRN_PA6T_MMCR1, mmcr1);
pr_debug("setup on cpu %d, mmcr0 %016lx\n", smp_processor_id(),
mfspr(SPRN_PA6T_MMCR0));
pr_debug("setup on cpu %d, mmcr1 %016lx\n", smp_processor_id(),
mfspr(SPRN_PA6T_MMCR1));
return 0;
}
static int pa6t_start(struct op_counter_config *ctr)
{
int i;
/* Hold off event counting until rfid */
u64 mmcr0 = mmcr0_val | PA6T_MMCR0_HANDDIS;
for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
if (ctr[i].enabled)
ctr_write(i, reset_value[i]);
else
ctr_write(i, 0UL);
mtspr(SPRN_PA6T_MMCR0, mmcr0);
oprofile_running = 1;
pr_debug("start on cpu %d, mmcr0 %lx\n", smp_processor_id(), mmcr0);
return 0;
}
static void pa6t_stop(void)
{
u64 mmcr0;
/* freeze counters */
mmcr0 = mfspr(SPRN_PA6T_MMCR0);
mmcr0 |= PA6T_MMCR0_FCM0;
mtspr(SPRN_PA6T_MMCR0, mmcr0);
oprofile_running = 0;
pr_debug("stop on cpu %d, mmcr0 %lx\n", smp_processor_id(), mmcr0);
}
/* handle the perfmon overflow vector */
static void pa6t_handle_interrupt(struct pt_regs *regs,
struct op_counter_config *ctr)
{
unsigned long pc = mfspr(SPRN_PA6T_SIAR);
int is_kernel = is_kernel_addr(pc);
u64 val;
int i;
u64 mmcr0;
/* disable perfmon counting until rfid */
mmcr0 = mfspr(SPRN_PA6T_MMCR0);
mtspr(SPRN_PA6T_MMCR0, mmcr0 | PA6T_MMCR0_HANDDIS);
/* Record samples. We've got one global bit for whether a sample
* was taken, so add it for any counter that triggered overflow.
*/
for (i = 0; i < cur_cpu_spec->num_pmcs; i++) {
val = ctr_read(i);
if (val & (0x1UL << 39)) { /* Overflow bit set */
if (oprofile_running && ctr[i].enabled) {
if (mmcr0 & PA6T_MMCR0_SIARLOG)
oprofile_add_ext_sample(pc, regs, i, is_kernel);
ctr_write(i, reset_value[i]);
} else {
ctr_write(i, 0UL);
}
}
}
/* Restore mmcr0 to a good known value since the PMI changes it */
mmcr0 = mmcr0_val | PA6T_MMCR0_HANDDIS;
mtspr(SPRN_PA6T_MMCR0, mmcr0);
}
struct op_powerpc_model op_model_pa6t = {
.reg_setup = pa6t_reg_setup,
.cpu_setup = pa6t_cpu_setup,
.start = pa6t_start,
.stop = pa6t_stop,
.handle_interrupt = pa6t_handle_interrupt,
};
|
