1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
|
/*
* Brontes PCI frame grabber driver
*
* Copyright (C) 2008 3M Company
* Contact: Justin Bronder <jsbronder@brontes3d.com>
* Original Authors: Daniel Drake <ddrake@brontes3d.com>
* Duane Griffin <duaneg@dghda.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/device.h>
#include <linux/fs.h>
#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <linux/ioctl.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/types.h>
#include <linux/cdev.h>
#include <linux/list.h>
#include <linux/poll.h>
#include <linux/wait.h>
#include <linux/mm.h>
#include <linux/uaccess.h>
static unsigned int b3dfg_nbuf = 2;
module_param_named(buffer_count, b3dfg_nbuf, uint, 0444);
MODULE_PARM_DESC(buffer_count, "Number of buffers (min 2, default 2)");
MODULE_AUTHOR("Daniel Drake <ddrake@brontes3d.com>");
MODULE_DESCRIPTION("Brontes frame grabber driver");
MODULE_LICENSE("GPL");
#define DRIVER_NAME "b3dfg"
#define B3DFG_MAX_DEVS 4
#define B3DFG_FRAMES_PER_BUFFER 3
#define B3DFG_BAR_REGS 0
#define B3DFG_REGS_LENGTH 0x10000
#define B3DFG_IOC_MAGIC 0xb3 /* dfg :-) */
#define B3DFG_IOCGFRMSZ _IOR(B3DFG_IOC_MAGIC, 1, int)
#define B3DFG_IOCTNUMBUFS _IO(B3DFG_IOC_MAGIC, 2)
#define B3DFG_IOCTTRANS _IO(B3DFG_IOC_MAGIC, 3)
#define B3DFG_IOCTQUEUEBUF _IO(B3DFG_IOC_MAGIC, 4)
#define B3DFG_IOCTPOLLBUF _IOWR(B3DFG_IOC_MAGIC, 5, struct b3dfg_poll)
#define B3DFG_IOCTWAITBUF _IOWR(B3DFG_IOC_MAGIC, 6, struct b3dfg_wait)
#define B3DFG_IOCGWANDSTAT _IOR(B3DFG_IOC_MAGIC, 7, int)
enum {
/* number of 4kb pages per frame */
B3D_REG_FRM_SIZE = 0x0,
/* bit 0: set to enable interrupts
* bit 1: set to enable cable status change interrupts */
B3D_REG_HW_CTRL = 0x4,
/* bit 0-1 - 1-based ID of next pending frame transfer (0 = none)
* bit 2 indicates the previous DMA transfer has completed
* bit 3 indicates wand cable status change
* bit 8:15 - counter of number of discarded triplets */
B3D_REG_DMA_STS = 0x8,
/* bit 0: wand status (1 = present, 0 = disconnected) */
B3D_REG_WAND_STS = 0xc,
/* bus address for DMA transfers. lower 2 bits must be zero because DMA
* works with 32 bit word size. */
B3D_REG_EC220_DMA_ADDR = 0x8000,
/* bit 20:0 - number of 32 bit words to be transferred
* bit 21:31 - reserved */
B3D_REG_EC220_TRF_SIZE = 0x8004,
/* bit 0 - error bit
* bit 1 - interrupt bit (set to generate interrupt at end of transfer)
* bit 2 - start bit (set to start transfer)
* bit 3 - direction (0 = DMA_TO_DEVICE, 1 = DMA_FROM_DEVICE
* bit 4:31 - reserved */
B3D_REG_EC220_DMA_STS = 0x8008,
};
enum b3dfg_buffer_state {
B3DFG_BUFFER_POLLED = 0,
B3DFG_BUFFER_PENDING,
B3DFG_BUFFER_POPULATED,
};
struct b3dfg_buffer {
unsigned char *frame[B3DFG_FRAMES_PER_BUFFER];
struct list_head list;
u8 state;
};
struct b3dfg_dev {
/* no protection needed: all finalized at initialization time */
struct pci_dev *pdev;
struct cdev chardev;
struct device *dev;
void __iomem *regs;
unsigned int frame_size;
/*
* Protects buffer state, including buffer_queue, triplet_ready,
* cur_dma_frame_idx & cur_dma_frame_addr.
*/
spinlock_t buffer_lock;
struct b3dfg_buffer *buffers;
struct list_head buffer_queue;
/* Last frame in triplet transferred (-1 if none). */
int cur_dma_frame_idx;
/* Current frame's address for DMA. */
dma_addr_t cur_dma_frame_addr;
/*
* Protects cstate_tstamp.
* Nests inside buffer_lock.
*/
spinlock_t cstate_lock;
unsigned long cstate_tstamp;
/*
* Protects triplets_dropped.
* Nests inside buffers_lock.
*/
spinlock_t triplets_dropped_lock;
unsigned int triplets_dropped;
wait_queue_head_t buffer_waitqueue;
unsigned int transmission_enabled:1;
unsigned int triplet_ready:1;
};
static u8 b3dfg_devices[B3DFG_MAX_DEVS];
static struct class *b3dfg_class;
static dev_t b3dfg_devt;
static const struct pci_device_id b3dfg_ids[] __devinitdata = {
{ PCI_DEVICE(0x0b3d, 0x0001) },
{ },
};
MODULE_DEVICE_TABLE(pci, b3dfg_ids);
/***** user-visible types *****/
struct b3dfg_poll {
int buffer_idx;
unsigned int triplets_dropped;
};
struct b3dfg_wait {
int buffer_idx;
unsigned int timeout;
unsigned int triplets_dropped;
};
/**** register I/O ****/
static u32 b3dfg_read32(struct b3dfg_dev *fgdev, u16 reg)
{
return ioread32(fgdev->regs + reg);
}
static void b3dfg_write32(struct b3dfg_dev *fgdev, u16 reg, u32 value)
{
iowrite32(value, fgdev->regs + reg);
}
/**** buffer management ****/
/*
* Program EC220 for transfer of a specific frame.
* Called with buffer_lock held.
*/
static int setup_frame_transfer(struct b3dfg_dev *fgdev,
struct b3dfg_buffer *buf, int frame)
{
unsigned char *frm_addr;
dma_addr_t frm_addr_dma;
unsigned int frm_size = fgdev->frame_size;
frm_addr = buf->frame[frame];
frm_addr_dma = pci_map_single(fgdev->pdev, frm_addr,
frm_size, PCI_DMA_FROMDEVICE);
if (pci_dma_mapping_error(fgdev->pdev, frm_addr_dma))
return -ENOMEM;
fgdev->cur_dma_frame_addr = frm_addr_dma;
fgdev->cur_dma_frame_idx = frame;
b3dfg_write32(fgdev, B3D_REG_EC220_DMA_ADDR,
cpu_to_le32(frm_addr_dma));
b3dfg_write32(fgdev, B3D_REG_EC220_TRF_SIZE,
cpu_to_le32(frm_size >> 2));
b3dfg_write32(fgdev, B3D_REG_EC220_DMA_STS, 0xf);
return 0;
}
/* Caller should hold buffer lock */
static void dequeue_all_buffers(struct b3dfg_dev *fgdev)
{
int i;
for (i = 0; i < b3dfg_nbuf; i++) {
struct b3dfg_buffer *buf = &fgdev->buffers[i];
buf->state = B3DFG_BUFFER_POLLED;
list_del_init(&buf->list);
}
}
/* queue a buffer to receive data */
static int queue_buffer(struct b3dfg_dev *fgdev, int bufidx)
{
struct device *dev = &fgdev->pdev->dev;
struct b3dfg_buffer *buf;
unsigned long flags;
int r = 0;
spin_lock_irqsave(&fgdev->buffer_lock, flags);
if (bufidx < 0 || bufidx >= b3dfg_nbuf) {
dev_dbg(dev, "Invalid buffer index, %d\n", bufidx);
r = -ENOENT;
goto out;
}
buf = &fgdev->buffers[bufidx];
if (unlikely(buf->state == B3DFG_BUFFER_PENDING)) {
dev_dbg(dev, "buffer %d is already queued\n", bufidx);
r = -EINVAL;
goto out;
}
buf->state = B3DFG_BUFFER_PENDING;
list_add_tail(&buf->list, &fgdev->buffer_queue);
if (fgdev->transmission_enabled && fgdev->triplet_ready) {
dev_dbg(dev, "triplet is ready, pushing immediately\n");
fgdev->triplet_ready = 0;
r = setup_frame_transfer(fgdev, buf, 0);
if (r)
dev_err(dev, "unable to map DMA buffer\n");
}
out:
spin_unlock_irqrestore(&fgdev->buffer_lock, flags);
return r;
}
/* non-blocking buffer poll. returns 1 if data is present in the buffer,
* 0 otherwise */
static int poll_buffer(struct b3dfg_dev *fgdev, void __user *arg)
{
struct device *dev = &fgdev->pdev->dev;
struct b3dfg_poll p;
struct b3dfg_buffer *buf;
unsigned long flags;
int r = 1;
int arg_out = 0;
if (copy_from_user(&p, arg, sizeof(p)))
return -EFAULT;
if (unlikely(!fgdev->transmission_enabled)) {
dev_dbg(dev, "cannot poll, transmission disabled\n");
return -EINVAL;
}
if (p.buffer_idx < 0 || p.buffer_idx >= b3dfg_nbuf)
return -ENOENT;
buf = &fgdev->buffers[p.buffer_idx];
spin_lock_irqsave(&fgdev->buffer_lock, flags);
if (likely(buf->state == B3DFG_BUFFER_POPULATED)) {
arg_out = 1;
buf->state = B3DFG_BUFFER_POLLED;
/* IRQs already disabled by spin_lock_irqsave above. */
spin_lock(&fgdev->triplets_dropped_lock);
p.triplets_dropped = fgdev->triplets_dropped;
fgdev->triplets_dropped = 0;
spin_unlock(&fgdev->triplets_dropped_lock);
} else {
r = 0;
}
spin_unlock_irqrestore(&fgdev->buffer_lock, flags);
if (arg_out && copy_to_user(arg, &p, sizeof(p)))
r = -EFAULT;
return r;
}
static unsigned long get_cstate_change(struct b3dfg_dev *fgdev)
{
unsigned long flags, when;
spin_lock_irqsave(&fgdev->cstate_lock, flags);
when = fgdev->cstate_tstamp;
spin_unlock_irqrestore(&fgdev->cstate_lock, flags);
return when;
}
static int is_event_ready(struct b3dfg_dev *fgdev, struct b3dfg_buffer *buf,
unsigned long when)
{
int result;
unsigned long flags;
spin_lock_irqsave(&fgdev->buffer_lock, flags);
spin_lock(&fgdev->cstate_lock);
result = (!fgdev->transmission_enabled ||
buf->state == B3DFG_BUFFER_POPULATED ||
when != fgdev->cstate_tstamp);
spin_unlock(&fgdev->cstate_lock);
spin_unlock_irqrestore(&fgdev->buffer_lock, flags);
return result;
}
/* sleep until a specific buffer becomes populated */
static int wait_buffer(struct b3dfg_dev *fgdev, void __user *arg)
{
struct device *dev = &fgdev->pdev->dev;
struct b3dfg_wait w;
struct b3dfg_buffer *buf;
unsigned long flags, when;
int r;
if (copy_from_user(&w, arg, sizeof(w)))
return -EFAULT;
if (!fgdev->transmission_enabled) {
dev_dbg(dev, "cannot wait, transmission disabled\n");
return -EINVAL;
}
if (w.buffer_idx < 0 || w.buffer_idx >= b3dfg_nbuf)
return -ENOENT;
buf = &fgdev->buffers[w.buffer_idx];
spin_lock_irqsave(&fgdev->buffer_lock, flags);
if (buf->state == B3DFG_BUFFER_POPULATED) {
r = w.timeout;
goto out_triplets_dropped;
}
spin_unlock_irqrestore(&fgdev->buffer_lock, flags);
when = get_cstate_change(fgdev);
if (w.timeout > 0) {
r = wait_event_interruptible_timeout(fgdev->buffer_waitqueue,
is_event_ready(fgdev, buf, when),
(w.timeout * HZ) / 1000);
if (unlikely(r < 0))
goto out;
w.timeout = r * 1000 / HZ;
} else {
r = wait_event_interruptible(fgdev->buffer_waitqueue,
is_event_ready(fgdev, buf, when));
if (unlikely(r)) {
r = -ERESTARTSYS;
goto out;
}
}
/* TODO: Inform the user via field(s) in w? */
if (!fgdev->transmission_enabled || when != get_cstate_change(fgdev)) {
r = -EINVAL;
goto out;
}
spin_lock_irqsave(&fgdev->buffer_lock, flags);
if (buf->state != B3DFG_BUFFER_POPULATED) {
r = -ETIMEDOUT;
goto out_unlock;
}
buf->state = B3DFG_BUFFER_POLLED;
out_triplets_dropped:
/* IRQs already disabled by spin_lock_irqsave above. */
spin_lock(&fgdev->triplets_dropped_lock);
w.triplets_dropped = fgdev->triplets_dropped;
fgdev->triplets_dropped = 0;
spin_unlock(&fgdev->triplets_dropped_lock);
out_unlock:
spin_unlock_irqrestore(&fgdev->buffer_lock, flags);
if (copy_to_user(arg, &w, sizeof(w)))
r = -EFAULT;
out:
return r;
}
/* mmap page fault handler */
static int b3dfg_vma_fault(struct vm_area_struct *vma,
struct vm_fault *vmf)
{
struct b3dfg_dev *fgdev = vma->vm_file->private_data;
unsigned long off = vmf->pgoff << PAGE_SHIFT;
unsigned int frame_size = fgdev->frame_size;
unsigned int buf_size = frame_size * B3DFG_FRAMES_PER_BUFFER;
unsigned char *addr;
/* determine which buffer the offset lies within */
unsigned int buf_idx = off / buf_size;
/* and the offset into the buffer */
unsigned int buf_off = off % buf_size;
/* determine which frame inside the buffer the offset lies in */
unsigned int frm_idx = buf_off / frame_size;
/* and the offset into the frame */
unsigned int frm_off = buf_off % frame_size;
if (unlikely(buf_idx >= b3dfg_nbuf))
return VM_FAULT_SIGBUS;
addr = fgdev->buffers[buf_idx].frame[frm_idx] + frm_off;
vm_insert_pfn(vma, (unsigned long)vmf->virtual_address,
virt_to_phys(addr) >> PAGE_SHIFT);
return VM_FAULT_NOPAGE;
}
static struct vm_operations_struct b3dfg_vm_ops = {
.fault = b3dfg_vma_fault,
};
static int get_wand_status(struct b3dfg_dev *fgdev, int __user *arg)
{
u32 wndstat = b3dfg_read32(fgdev, B3D_REG_WAND_STS);
dev_dbg(&fgdev->pdev->dev, "wand status %x\n", wndstat);
return __put_user(wndstat & 0x1, arg);
}
static int enable_transmission(struct b3dfg_dev *fgdev)
{
u16 command;
unsigned long flags;
struct device *dev = &fgdev->pdev->dev;
dev_dbg(dev, "enable transmission\n");
/* check the cable is plugged in. */
if (!b3dfg_read32(fgdev, B3D_REG_WAND_STS)) {
dev_dbg(dev, "cannot start transmission without wand\n");
return -EINVAL;
}
/*
* Check we're a bus master.
* TODO: I think we can remove this having added the pci_set_master call
*/
pci_read_config_word(fgdev->pdev, PCI_COMMAND, &command);
if (!(command & PCI_COMMAND_MASTER)) {
dev_err(dev, "not a bus master, force-enabling\n");
pci_write_config_word(fgdev->pdev, PCI_COMMAND,
command | PCI_COMMAND_MASTER);
}
spin_lock_irqsave(&fgdev->buffer_lock, flags);
/* Handle racing enable_transmission calls. */
if (fgdev->transmission_enabled) {
spin_unlock_irqrestore(&fgdev->buffer_lock, flags);
goto out;
}
spin_lock(&fgdev->triplets_dropped_lock);
fgdev->triplets_dropped = 0;
spin_unlock(&fgdev->triplets_dropped_lock);
fgdev->triplet_ready = 0;
fgdev->cur_dma_frame_idx = -1;
fgdev->transmission_enabled = 1;
spin_unlock_irqrestore(&fgdev->buffer_lock, flags);
/* Enable DMA and cable status interrupts. */
b3dfg_write32(fgdev, B3D_REG_HW_CTRL, 0x03);
out:
return 0;
}
static void disable_transmission(struct b3dfg_dev *fgdev)
{
struct device *dev = &fgdev->pdev->dev;
unsigned long flags;
u32 tmp;
dev_dbg(dev, "disable transmission\n");
/* guarantee that no more interrupts will be serviced */
spin_lock_irqsave(&fgdev->buffer_lock, flags);
fgdev->transmission_enabled = 0;
b3dfg_write32(fgdev, B3D_REG_HW_CTRL, 0);
/* FIXME: temporary debugging only. if the board stops transmitting,
* hitting ctrl+c and seeing this message is useful for determining
* the state of the board. */
tmp = b3dfg_read32(fgdev, B3D_REG_DMA_STS);
dev_dbg(dev, "DMA_STS reads %x after TX stopped\n", tmp);
dequeue_all_buffers(fgdev);
spin_unlock_irqrestore(&fgdev->buffer_lock, flags);
wake_up_interruptible(&fgdev->buffer_waitqueue);
}
static int set_transmission(struct b3dfg_dev *fgdev, int enabled)
{
int res = 0;
if (enabled && !fgdev->transmission_enabled)
res = enable_transmission(fgdev);
else if (!enabled && fgdev->transmission_enabled)
disable_transmission(fgdev);
return res;
}
/* Called in interrupt context. */
static void handle_cstate_unplug(struct b3dfg_dev *fgdev)
{
/* Disable all interrupts. */
b3dfg_write32(fgdev, B3D_REG_HW_CTRL, 0);
/* Stop transmission. */
spin_lock(&fgdev->buffer_lock);
fgdev->transmission_enabled = 0;
fgdev->cur_dma_frame_idx = -1;
fgdev->triplet_ready = 0;
if (fgdev->cur_dma_frame_addr) {
pci_unmap_single(fgdev->pdev, fgdev->cur_dma_frame_addr,
fgdev->frame_size, PCI_DMA_FROMDEVICE);
fgdev->cur_dma_frame_addr = 0;
}
dequeue_all_buffers(fgdev);
spin_unlock(&fgdev->buffer_lock);
}
/* Called in interrupt context. */
static void handle_cstate_change(struct b3dfg_dev *fgdev)
{
u32 cstate = b3dfg_read32(fgdev, B3D_REG_WAND_STS);
unsigned long when;
struct device *dev = &fgdev->pdev->dev;
dev_dbg(dev, "cable state change: %u\n", cstate);
/*
* When the wand is unplugged we reset our state. The hardware will
* have done the same internally.
*
* Note we should never see a cable *plugged* event, as interrupts
* should only be enabled when transmitting, which requires the cable
* to be plugged. If we do see one it probably means the cable has been
* unplugged and re-plugged very rapidly. Possibly because it has a
* broken wire and is momentarily losing contact.
*
* TODO: At the moment if you plug in the cable then enable transmission
* the hardware will raise a couple of spurious interrupts, so
* just ignore them for now.
*
* Once the hardware is fixed we should complain and treat it as an
* unplug. Or at least track how frequently it is happening and do
* so if too many come in.
*/
if (cstate) {
dev_warn(dev, "ignoring unexpected plug event\n");
return;
}
handle_cstate_unplug(fgdev);
/*
* Record cable state change timestamp & wake anyone waiting
* on a cable state change. Be paranoid about ensuring events
* are not missed if we somehow get two interrupts in a jiffy.
*/
spin_lock(&fgdev->cstate_lock);
when = jiffies_64;
if (when <= fgdev->cstate_tstamp)
when = fgdev->cstate_tstamp + 1;
fgdev->cstate_tstamp = when;
wake_up_interruptible(&fgdev->buffer_waitqueue);
spin_unlock(&fgdev->cstate_lock);
}
/* Called with buffer_lock held. */
static void transfer_complete(struct b3dfg_dev *fgdev)
{
struct b3dfg_buffer *buf;
struct device *dev = &fgdev->pdev->dev;
pci_unmap_single(fgdev->pdev, fgdev->cur_dma_frame_addr,
fgdev->frame_size, PCI_DMA_FROMDEVICE);
fgdev->cur_dma_frame_addr = 0;
buf = list_entry(fgdev->buffer_queue.next, struct b3dfg_buffer, list);
if (buf) {
dev_dbg(dev, "handle frame completion\n");
if (fgdev->cur_dma_frame_idx == B3DFG_FRAMES_PER_BUFFER - 1) {
/* last frame of that triplet completed */
dev_dbg(dev, "triplet completed\n");
buf->state = B3DFG_BUFFER_POPULATED;
list_del_init(&buf->list);
wake_up_interruptible(&fgdev->buffer_waitqueue);
}
} else {
dev_err(dev, "got frame but no buffer!\n");
}
}
/*
* Called with buffer_lock held.
*
* Note that idx is the (1-based) *next* frame to be transferred, while
* cur_dma_frame_idx is the (0-based) *last* frame to have been transferred (or
* -1 if none). Thus there should be a difference of 2 between them.
*/
static bool setup_next_frame_transfer(struct b3dfg_dev *fgdev, int idx)
{
struct b3dfg_buffer *buf;
struct device *dev = &fgdev->pdev->dev;
bool need_ack = 1;
dev_dbg(dev, "program DMA transfer for next frame: %d\n", idx);
buf = list_entry(fgdev->buffer_queue.next, struct b3dfg_buffer, list);
if (buf) {
if (idx == fgdev->cur_dma_frame_idx + 2) {
if (setup_frame_transfer(fgdev, buf, idx - 1))
dev_err(dev, "unable to map DMA buffer\n");
need_ack = 0;
} else {
dev_err(dev, "frame mismatch, got %d, expected %d\n",
idx, fgdev->cur_dma_frame_idx + 2);
/* FIXME: handle dropped triplets here */
}
} else {
dev_err(dev, "cannot setup DMA, no buffer\n");
}
return need_ack;
}
static irqreturn_t b3dfg_intr(int irq, void *dev_id)
{
struct b3dfg_dev *fgdev = dev_id;
struct device *dev = &fgdev->pdev->dev;
u32 sts;
u8 dropped;
bool need_ack = 1;
irqreturn_t res = IRQ_HANDLED;
sts = b3dfg_read32(fgdev, B3D_REG_DMA_STS);
if (unlikely(sts == 0)) {
dev_warn(dev, "ignore interrupt, DMA status is 0\n");
res = IRQ_NONE;
goto out;
}
if (unlikely(!fgdev->transmission_enabled)) {
dev_warn(dev, "ignore interrupt, TX disabled\n");
res = IRQ_HANDLED;
goto out;
}
/* Handle dropped frames, as reported by the hardware. */
dropped = (sts >> 8) & 0xff;
dev_dbg(dev, "intr: DMA_STS=%08x (drop=%d comp=%d next=%d)\n",
sts, dropped, !!(sts & 0x4), sts & 0x3);
if (unlikely(dropped > 0)) {
spin_lock(&fgdev->triplets_dropped_lock);
fgdev->triplets_dropped += dropped;
spin_unlock(&fgdev->triplets_dropped_lock);
}
/* Handle a cable state change (i.e. the wand being unplugged). */
if (sts & 0x08) {
handle_cstate_change(fgdev);
goto out;
}
spin_lock(&fgdev->buffer_lock);
if (unlikely(list_empty(&fgdev->buffer_queue))) {
/* FIXME need more sanity checking here */
dev_info(dev, "buffer not ready for next transfer\n");
fgdev->triplet_ready = 1;
goto out_unlock;
}
/* Has a frame transfer been completed? */
if (sts & 0x4) {
u32 dma_status = b3dfg_read32(fgdev, B3D_REG_EC220_DMA_STS);
/* Check for DMA errors reported by the hardware. */
if (unlikely(dma_status & 0x1)) {
dev_err(dev, "EC220 error: %08x\n", dma_status);
/* FIXME flesh out error handling */
goto out_unlock;
}
/* Sanity check, we should have a frame index at this point. */
if (unlikely(fgdev->cur_dma_frame_idx == -1)) {
dev_err(dev, "completed but no last idx?\n");
/* FIXME flesh out error handling */
goto out_unlock;
}
transfer_complete(fgdev);
}
/* Is there another frame transfer pending? */
if (sts & 0x3)
need_ack = setup_next_frame_transfer(fgdev, sts & 0x3);
else
fgdev->cur_dma_frame_idx = -1;
out_unlock:
spin_unlock(&fgdev->buffer_lock);
out:
if (need_ack) {
dev_dbg(dev, "acknowledging interrupt\n");
b3dfg_write32(fgdev, B3D_REG_EC220_DMA_STS, 0x0b);
}
return res;
}
static int b3dfg_open(struct inode *inode, struct file *filp)
{
struct b3dfg_dev *fgdev =
container_of(inode->i_cdev, struct b3dfg_dev, chardev);
dev_dbg(&fgdev->pdev->dev, "open\n");
filp->private_data = fgdev;
return 0;
}
static int b3dfg_release(struct inode *inode, struct file *filp)
{
struct b3dfg_dev *fgdev = filp->private_data;
dev_dbg(&fgdev->pdev->dev, "release\n");
disable_transmission(fgdev);
return 0;
}
static long b3dfg_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
{
struct b3dfg_dev *fgdev = filp->private_data;
switch (cmd) {
case B3DFG_IOCGFRMSZ:
return __put_user(fgdev->frame_size, (int __user *) arg);
case B3DFG_IOCGWANDSTAT:
return get_wand_status(fgdev, (int __user *) arg);
case B3DFG_IOCTTRANS:
return set_transmission(fgdev, (int) arg);
case B3DFG_IOCTQUEUEBUF:
return queue_buffer(fgdev, (int) arg);
case B3DFG_IOCTPOLLBUF:
return poll_buffer(fgdev, (void __user *) arg);
case B3DFG_IOCTWAITBUF:
return wait_buffer(fgdev, (void __user *) arg);
default:
dev_dbg(&fgdev->pdev->dev, "unrecognised ioctl %x\n", cmd);
return -EINVAL;
}
}
static unsigned int b3dfg_poll(struct file *filp, poll_table *poll_table)
{
struct b3dfg_dev *fgdev = filp->private_data;
unsigned long flags, when;
int i;
int r = 0;
when = get_cstate_change(fgdev);
poll_wait(filp, &fgdev->buffer_waitqueue, poll_table);
spin_lock_irqsave(&fgdev->buffer_lock, flags);
for (i = 0; i < b3dfg_nbuf; i++) {
if (fgdev->buffers[i].state == B3DFG_BUFFER_POPULATED) {
r = POLLIN | POLLRDNORM;
break;
}
}
spin_unlock_irqrestore(&fgdev->buffer_lock, flags);
/* TODO: Confirm this is how we want to communicate the change. */
if (!fgdev->transmission_enabled || when != get_cstate_change(fgdev))
r = POLLERR;
return r;
}
static int b3dfg_mmap(struct file *filp, struct vm_area_struct *vma)
{
struct b3dfg_dev *fgdev = filp->private_data;
unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
unsigned long vsize = vma->vm_end - vma->vm_start;
unsigned long bufdatalen = b3dfg_nbuf * fgdev->frame_size * 3;
unsigned long psize = bufdatalen - offset;
int r = 0;
if (vsize <= psize) {
vma->vm_flags |= VM_IO | VM_RESERVED | VM_CAN_NONLINEAR |
VM_PFNMAP;
vma->vm_ops = &b3dfg_vm_ops;
} else {
r = -EINVAL;
}
return r;
}
static struct file_operations b3dfg_fops = {
.owner = THIS_MODULE,
.open = b3dfg_open,
.release = b3dfg_release,
.unlocked_ioctl = b3dfg_ioctl,
.poll = b3dfg_poll,
.mmap = b3dfg_mmap,
};
static void free_all_frame_buffers(struct b3dfg_dev *fgdev)
{
int i, j;
for (i = 0; i < b3dfg_nbuf; i++)
for (j = 0; j < B3DFG_FRAMES_PER_BUFFER; j++)
kfree(fgdev->buffers[i].frame[j]);
kfree(fgdev->buffers);
}
/* initialize device and any data structures. called before any interrupts
* are enabled. */
static int b3dfg_init_dev(struct b3dfg_dev *fgdev)
{
int i, j;
u32 frm_size = b3dfg_read32(fgdev, B3D_REG_FRM_SIZE);
/* Disable interrupts. In abnormal circumstances (e.g. after a crash)
* the board may still be transmitting from the previous session. If we
* ensure that interrupts are disabled before we later enable them, we
* are sure to capture a triplet from the start, rather than starting
* from frame 2 or 3. Disabling interrupts causes the FG to throw away
* all buffered data and stop buffering more until interrupts are
* enabled again.
*/
b3dfg_write32(fgdev, B3D_REG_HW_CTRL, 0);
fgdev->frame_size = frm_size * 4096;
fgdev->buffers = kzalloc(sizeof(struct b3dfg_buffer) * b3dfg_nbuf,
GFP_KERNEL);
if (!fgdev->buffers)
goto err_no_buf;
for (i = 0; i < b3dfg_nbuf; i++) {
struct b3dfg_buffer *buf = &fgdev->buffers[i];
for (j = 0; j < B3DFG_FRAMES_PER_BUFFER; j++) {
buf->frame[j] = kmalloc(fgdev->frame_size, GFP_KERNEL);
if (!buf->frame[j])
goto err_no_mem;
}
INIT_LIST_HEAD(&buf->list);
}
INIT_LIST_HEAD(&fgdev->buffer_queue);
init_waitqueue_head(&fgdev->buffer_waitqueue);
spin_lock_init(&fgdev->buffer_lock);
spin_lock_init(&fgdev->cstate_lock);
spin_lock_init(&fgdev->triplets_dropped_lock);
return 0;
err_no_mem:
free_all_frame_buffers(fgdev);
err_no_buf:
return -ENOMEM;
}
/* find next free minor number, returns -1 if none are availabile */
static int get_free_minor(void)
{
int i;
for (i = 0; i < B3DFG_MAX_DEVS; i++) {
if (b3dfg_devices[i] == 0)
return i;
}
return -1;
}
static int __devinit b3dfg_probe(struct pci_dev *pdev,
const struct pci_device_id *id)
{
struct b3dfg_dev *fgdev = kzalloc(sizeof(*fgdev), GFP_KERNEL);
int r = 0;
int minor = get_free_minor();
dev_t devno = MKDEV(MAJOR(b3dfg_devt), minor);
unsigned long res_len;
resource_size_t res_base;
if (fgdev == NULL)
return -ENOMEM;
if (minor < 0) {
dev_err(&pdev->dev, "too many devices found!\n");
r = -EIO;
goto err_free;
}
b3dfg_devices[minor] = 1;
dev_info(&pdev->dev, "probe device with IRQ %d\n", pdev->irq);
cdev_init(&fgdev->chardev, &b3dfg_fops);
fgdev->chardev.owner = THIS_MODULE;
r = cdev_add(&fgdev->chardev, devno, 1);
if (r) {
dev_err(&pdev->dev, "cannot add char device\n");
goto err_release_minor;
}
fgdev->dev = device_create(
b3dfg_class,
&pdev->dev,
devno,
dev_get_drvdata(&pdev->dev),
DRIVER_NAME "%d", minor);
if (IS_ERR(fgdev->dev)) {
dev_err(&pdev->dev, "cannot create device\n");
r = PTR_ERR(fgdev->dev);
goto err_del_cdev;
}
r = pci_enable_device(pdev);
if (r) {
dev_err(&pdev->dev, "cannot enable PCI device\n");
goto err_dev_unreg;
}
res_len = pci_resource_len(pdev, B3DFG_BAR_REGS);
if (res_len != B3DFG_REGS_LENGTH) {
dev_err(&pdev->dev, "invalid register resource size\n");
r = -EIO;
goto err_disable;
}
if (pci_resource_flags(pdev, B3DFG_BAR_REGS)
!= (IORESOURCE_MEM | IORESOURCE_SIZEALIGN)) {
dev_err(&pdev->dev, "invalid resource flags\n");
r = -EIO;
goto err_disable;
}
r = pci_request_regions(pdev, DRIVER_NAME);
if (r) {
dev_err(&pdev->dev, "cannot obtain PCI resources\n");
goto err_disable;
}
pci_set_master(pdev);
r = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
if (r) {
dev_err(&pdev->dev, "no usable DMA configuration\n");
goto err_free_res;
}
res_base = pci_resource_start(pdev, B3DFG_BAR_REGS);
fgdev->regs = ioremap_nocache(res_base, res_len);
if (!fgdev->regs) {
dev_err(&pdev->dev, "regs ioremap failed\n");
r = -EIO;
goto err_free_res;
}
fgdev->pdev = pdev;
pci_set_drvdata(pdev, fgdev);
r = b3dfg_init_dev(fgdev);
if (r < 0) {
dev_err(&pdev->dev, "failed to initalize device\n");
goto err_unmap;
}
r = request_irq(pdev->irq, b3dfg_intr, IRQF_SHARED, DRIVER_NAME, fgdev);
if (r) {
dev_err(&pdev->dev, "couldn't request irq %d\n", pdev->irq);
goto err_free_bufs;
}
return 0;
err_free_bufs:
free_all_frame_buffers(fgdev);
err_unmap:
iounmap(fgdev->regs);
err_free_res:
pci_release_regions(pdev);
err_disable:
pci_disable_device(pdev);
err_dev_unreg:
device_destroy(b3dfg_class, devno);
err_del_cdev:
cdev_del(&fgdev->chardev);
err_release_minor:
b3dfg_devices[minor] = 0;
err_free:
kfree(fgdev);
return r;
}
static void __devexit b3dfg_remove(struct pci_dev *pdev)
{
struct b3dfg_dev *fgdev = pci_get_drvdata(pdev);
unsigned int minor = MINOR(fgdev->chardev.dev);
dev_dbg(&pdev->dev, "remove\n");
free_irq(pdev->irq, fgdev);
iounmap(fgdev->regs);
pci_release_regions(pdev);
pci_disable_device(pdev);
device_destroy(b3dfg_class, MKDEV(MAJOR(b3dfg_devt), minor));
cdev_del(&fgdev->chardev);
free_all_frame_buffers(fgdev);
kfree(fgdev);
b3dfg_devices[minor] = 0;
}
static struct pci_driver b3dfg_driver = {
.name = DRIVER_NAME,
.id_table = b3dfg_ids,
.probe = b3dfg_probe,
.remove = __devexit_p(b3dfg_remove),
};
static int __init b3dfg_module_init(void)
{
int r;
if (b3dfg_nbuf < 2) {
printk(KERN_ERR DRIVER_NAME
": buffer_count is out of range (must be >= 2)");
return -EINVAL;
}
printk(KERN_INFO DRIVER_NAME ": loaded\n");
b3dfg_class = class_create(THIS_MODULE, DRIVER_NAME);
if (IS_ERR(b3dfg_class))
return PTR_ERR(b3dfg_class);
r = alloc_chrdev_region(&b3dfg_devt, 0, B3DFG_MAX_DEVS, DRIVER_NAME);
if (r)
goto err1;
r = pci_register_driver(&b3dfg_driver);
if (r)
goto err2;
return r;
err2:
unregister_chrdev_region(b3dfg_devt, B3DFG_MAX_DEVS);
err1:
class_destroy(b3dfg_class);
return r;
}
static void __exit b3dfg_module_exit(void)
{
printk(KERN_INFO DRIVER_NAME ": unloaded\n");
pci_unregister_driver(&b3dfg_driver);
unregister_chrdev_region(b3dfg_devt, B3DFG_MAX_DEVS);
class_destroy(b3dfg_class);
}
module_init(b3dfg_module_init);
module_exit(b3dfg_module_exit);
|