diff options
author | Ben Skeggs <skeggsb@gmail.com> | 2008-03-12 23:37:29 +1100 |
---|---|---|
committer | Ben Skeggs <skeggsb@gmail.com> | 2008-03-13 00:23:52 +1100 |
commit | 1766e1c07b03c6ccf545469663334be762c0bddf (patch) | |
tree | e60ee35ad5f843a882a1f4b65700ab66eea76c60 /shared-core/nouveau_drv.h | |
parent | 88bd1e4a350d011ec44f6786e0bfdf8fb386800c (diff) |
nv50: force channel vram access through vm
If we ever want to be able to use the 3D engine we have no choice. It
appears that the tiling setup (required for 3D on G8x) is in the page tables.
The immediate benefit of this change however is that it's now not possible
for a client to use the GPU to render over the top of important engine setup
tables, which also live in VRAM.
G8x VRAM size is limited to 512MiB at the moment, as we use a 1-1 mapping
of real vram pages to their offset within the start of a channel's VRAM
DMA object and only populate a single PDE for VRAM use.
Diffstat (limited to 'shared-core/nouveau_drv.h')
-rw-r--r-- | shared-core/nouveau_drv.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/shared-core/nouveau_drv.h b/shared-core/nouveau_drv.h index 4184aa5b..a51e552c 100644 --- a/shared-core/nouveau_drv.h +++ b/shared-core/nouveau_drv.h @@ -136,6 +136,7 @@ struct nouveau_channel /* NV50 VM */ struct nouveau_gpuobj *vm_pd; struct nouveau_gpuobj_ref *vm_gart_pt; + struct nouveau_gpuobj_ref *vm_vram_pt; /* Objects */ struct nouveau_gpuobj_ref *ramin; /* Private instmem */ @@ -290,6 +291,9 @@ struct drm_nouveau_private { unsigned long sg_handle; } gart_info; + /* G8x global VRAM page table */ + struct nouveau_gpuobj *vm_vram_pt; + /* the mtrr covering the FB */ int fb_mtrr; |