diff options
| author | Dave Airlie <airlied@linux.ie> | 2007-03-04 19:10:46 +1100 |
|---|---|---|
| committer | Dave Airlie <airlied@linux.ie> | 2007-03-04 19:10:46 +1100 |
| commit | 188a93c9dfde31de4d86733fa46b50487d3a4ac0 (patch) | |
| tree | 9152a127172dc9947794029b141682221b2c4660 /shared-core/radeon_state.c | |
| parent | c9178c3d01f6f38a33f9624c620d290cb9036964 (diff) | |
radeon: make PCI GART aperture size variable, but making table size variable
This is precursor to getting a TTM backend for this stuff, and also
allows the PCI table to be allocated at fb 0
Diffstat (limited to 'shared-core/radeon_state.c')
| -rw-r--r-- | shared-core/radeon_state.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/shared-core/radeon_state.c b/shared-core/radeon_state.c index 40b7d6ce..b95549d8 100644 --- a/shared-core/radeon_state.c +++ b/shared-core/radeon_state.c @@ -3196,10 +3196,16 @@ static int radeon_cp_setparam(DRM_IOCTL_ARGS) break; case RADEON_SETPARAM_PCIGART_LOCATION: dev_priv->pcigart_offset = sp.value; + dev_priv->pcigart_offset_set = 1; break; case RADEON_SETPARAM_NEW_MEMMAP: dev_priv->new_memmap = sp.value; break; + case RADEON_SETPARAM_PCIGART_TABLE_SIZE: + dev_priv->gart_info.table_size = sp.value; + if (dev_priv->gart_info.table_size < RADEON_PCIGART_TABLE_SIZE) + dev_priv->gart_info.table_size = RADEON_PCIGART_TABLE_SIZE; + break; default: DRM_DEBUG("Invalid parameter %d\n", sp.param); return DRM_ERR(EINVAL); |