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authorEric Anholt <anholt@freebsd.org>2005-11-08 02:38:01 +0000
committerEric Anholt <anholt@freebsd.org>2005-11-08 02:38:01 +0000
commit1a256df4804e4e987f81226a5d8e0573363607ee (patch)
tree31749f8042cfdd36260f195fb3af65c7bab46e51 /shared-core
parent145b23b55220bdfc6639d3279ad96310faa650a3 (diff)
Catch FreeBSD up to the pcie gart changes. Required minor modification to
radeon_cp.c to use a drm_local_map_t-type mapping (drm_core_ioremap rather than drm_ioremap), which contains private device mapping information on BSD. I also changed the ati_pcigart interface to use "void *" for pointers to kva rather than "unsigned long". While PCIGART support appears to be broken on FreeBSD currently, I think this is not new, and BusType PCI remains working on my r100 in Linux.
Diffstat (limited to 'shared-core')
-rw-r--r--shared-core/r128_cce.c3
-rw-r--r--shared-core/radeon_cp.c12
2 files changed, 10 insertions, 5 deletions
diff --git a/shared-core/r128_cce.c b/shared-core/r128_cce.c
index cb84fa84..06880e0b 100644
--- a/shared-core/r128_cce.c
+++ b/shared-core/r128_cce.c
@@ -559,7 +559,8 @@ static int r128_do_init_cce(drm_device_t * dev, drm_r128_init_t * init)
if (dev_priv->is_pci) {
#endif
dev_priv->gart_info.gart_table_location = DRM_ATI_GART_MAIN;
- dev_priv->gart_info.addr = dev_priv->gart_info.bus_addr = 0;
+ dev_priv->gart_info.addr = NULL;
+ dev_priv->gart_info.bus_addr = 0;
dev_priv->gart_info.is_pcie = 0;
if (!drm_ati_pcigart_init(dev, &dev_priv->gart_info)) {
DRM_ERROR("failed to init PCI GART!\n");
diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c
index 9b5c9a8f..30f63731 100644
--- a/shared-core/radeon_cp.c
+++ b/shared-core/radeon_cp.c
@@ -1541,16 +1541,20 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
/* if we have an offset set from userspace */
if (dev_priv->pcigart_offset) {
dev_priv->gart_info.bus_addr = dev_priv->pcigart_offset + dev_priv->fb_location;
- dev_priv->gart_info.addr = (unsigned long)drm_ioremap(dev_priv->gart_info.bus_addr, RADEON_PCIGART_TABLE_SIZE, dev);
+ dev_priv->gart_info.mapping.offset = dev_priv->gart_info.bus_addr;
+ dev_priv->gart_info.mapping.size = RADEON_PCIGART_TABLE_SIZE;
+ drm_core_ioremap(&dev_priv->gart_info.mapping, dev);
+ dev_priv->gart_info.addr = dev_priv->gart_info.mapping.handle;
dev_priv->gart_info.is_pcie = !!(dev_priv->flags & CHIP_IS_PCIE);
dev_priv->gart_info.gart_table_location = DRM_ATI_GART_FB;
- DRM_DEBUG("Setting phys_pci_gart to %08lX %08lX\n", dev_priv->gart_info.addr, dev_priv->pcigart_offset);
+ DRM_DEBUG("Setting phys_pci_gart to %p %08lX\n", dev_priv->gart_info.addr, dev_priv->pcigart_offset);
}
else {
dev_priv->gart_info.gart_table_location = DRM_ATI_GART_MAIN;
- dev_priv->gart_info.addr = dev_priv->gart_info.bus_addr= 0;
+ dev_priv->gart_info.addr = NULL;
+ dev_priv->gart_info.bus_addr = 0;
if (dev_priv->flags & CHIP_IS_PCIE)
{
DRM_ERROR("Cannot use PCI Express without GART in FB memory\n");
@@ -1618,7 +1622,7 @@ static int radeon_do_cleanup_cp(drm_device_t * dev)
if (dev_priv->gart_info.gart_table_location == DRM_ATI_GART_FB)
{
- drm_ioremapfree((void *)dev_priv->gart_info.addr, RADEON_PCIGART_TABLE_SIZE, dev);
+ drm_core_ioremapfree(&dev_priv->gart_info.mapping, dev);
dev_priv->gart_info.addr = 0;
}
}