diff options
author | Jesse Barnes <jbarnes@hobbes.(none)> | 2008-07-01 16:10:01 -0700 |
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committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2008-07-01 16:10:01 -0700 |
commit | 301d984ea80cb250460d6701c4373cf0af8bf59e (patch) | |
tree | b72281b24a13409030190fc6c8e3ac22d8ccada2 /shared-core | |
parent | 94dcc83ad2e8f848a3cac6cdc6f123e676e91cf8 (diff) |
i915: only use tiled blits on 965+
When scheduled swaps occur, we need to blit between front & back buffers. I
the buffers are tiled, we need to set the appropriate XY_SRC_COPY tile bit,
only on 965 chips, since it will cause corruption on pre-965 (e.g. 945).
Bug reported by and fix tested by Tomas Janousek <tomi@nomi.cz>.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'shared-core')
-rw-r--r-- | shared-core/i915_irq.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/shared-core/i915_irq.c b/shared-core/i915_irq.c index 0bf01bdd..28f9f6af 100644 --- a/shared-core/i915_irq.c +++ b/shared-core/i915_irq.c @@ -162,11 +162,11 @@ static void i915_vblank_tasklet(struct drm_device *dev) u32 ropcpp = (0xcc << 16) | ((cpp - 1) << 24); RING_LOCALS; - if (sarea_priv->front_tiled) { + if (IS_I965G(dev) && sarea_priv->front_tiled) { cmd |= XY_SRC_COPY_BLT_DST_TILED; dst_pitch >>= 2; } - if (sarea_priv->back_tiled) { + if (IS_I965G(dev) && sarea_priv->back_tiled) { cmd |= XY_SRC_COPY_BLT_SRC_TILED; src_pitch >>= 2; } |