diff options
author | Keith Whitwell <keithw@vmware.com> | 2009-11-24 15:08:55 +0000 |
---|---|---|
committer | Keith Whitwell <keithw@vmware.com> | 2009-11-24 15:08:55 +0000 |
commit | 5b0824dfe5eaf59fa87134e7482b3d147b262901 (patch) | |
tree | 442806a49e0963fe711bb681516fcf5c5c68a008 /src/gallium/auxiliary/vl | |
parent | fe2b31e4a896167a33d267822b36eb2de0ceecba (diff) |
tgsi: rename fields of tgsi_full_dst_register to reduce verbosity
DstRegister -> Register
DstRegisterInd -> Indirect
Diffstat (limited to 'src/gallium/auxiliary/vl')
-rw-r--r-- | src/gallium/auxiliary/vl/vl_compositor.c | 2 | ||||
-rw-r--r-- | src/gallium/auxiliary/vl/vl_mpeg12_mc_renderer.c | 6 | ||||
-rw-r--r-- | src/gallium/auxiliary/vl/vl_shader_build.c | 16 |
3 files changed, 12 insertions, 12 deletions
diff --git a/src/gallium/auxiliary/vl/vl_compositor.c b/src/gallium/auxiliary/vl/vl_compositor.c index 34a02b5042..e31a46ba46 100644 --- a/src/gallium/auxiliary/vl/vl_compositor.c +++ b/src/gallium/auxiliary/vl/vl_compositor.c @@ -213,7 +213,7 @@ create_frag_shader(struct vl_compositor *c) */ for (i = 0; i < 4; ++i) { inst = vl_inst3(TGSI_OPCODE_DP4, TGSI_FILE_OUTPUT, 0, TGSI_FILE_TEMPORARY, 0, TGSI_FILE_CONSTANT, i); - inst.Dst[0].DstRegister.WriteMask = TGSI_WRITEMASK_X << i; + inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_X << i; ti += tgsi_build_full_instruction(&inst, &tokens[ti], header, max_tokens - ti); } diff --git a/src/gallium/auxiliary/vl/vl_mpeg12_mc_renderer.c b/src/gallium/auxiliary/vl/vl_mpeg12_mc_renderer.c index 93e79e7f37..4564a6c67f 100644 --- a/src/gallium/auxiliary/vl/vl_mpeg12_mc_renderer.c +++ b/src/gallium/auxiliary/vl/vl_mpeg12_mc_renderer.c @@ -240,7 +240,7 @@ create_intra_frag_shader(struct vl_mpeg12_mc_renderer *r) inst.Src[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_X; inst.Src[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_X; inst.Src[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_X; - inst.Dst[0].DstRegister.WriteMask = TGSI_WRITEMASK_X << i; + inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_X << i; ti += tgsi_build_full_instruction(&inst, &tokens[ti], header, max_tokens - ti); } @@ -418,7 +418,7 @@ create_frame_pred_frag_shader(struct vl_mpeg12_mc_renderer *r) inst.Src[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_X; inst.Src[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_X; inst.Src[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_X; - inst.Dst[0].DstRegister.WriteMask = TGSI_WRITEMASK_X << i; + inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_X << i; ti += tgsi_build_full_instruction(&inst, &tokens[ti], header, max_tokens - ti); } @@ -623,7 +623,7 @@ create_frame_bi_pred_frag_shader(struct vl_mpeg12_mc_renderer *r) inst.Src[0].SrcRegister.SwizzleX = TGSI_SWIZZLE_X; inst.Src[0].SrcRegister.SwizzleY = TGSI_SWIZZLE_X; inst.Src[0].SrcRegister.SwizzleZ = TGSI_SWIZZLE_X; - inst.Dst[0].DstRegister.WriteMask = TGSI_WRITEMASK_X << i; + inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_X << i; ti += tgsi_build_full_instruction(&inst, &tokens[ti], header, max_tokens - ti); } diff --git a/src/gallium/auxiliary/vl/vl_shader_build.c b/src/gallium/auxiliary/vl/vl_shader_build.c index 548dfca05a..9ebb4a9171 100644 --- a/src/gallium/auxiliary/vl/vl_shader_build.c +++ b/src/gallium/auxiliary/vl/vl_shader_build.c @@ -138,8 +138,8 @@ struct tgsi_full_instruction vl_inst2 inst.Instruction.Opcode = opcode; inst.Instruction.NumDstRegs = 1; - inst.Dst[0].DstRegister.File = dst_file; - inst.Dst[0].DstRegister.Index = dst_index; + inst.Dst[0].Register.File = dst_file; + inst.Dst[0].Register.Index = dst_index; inst.Instruction.NumSrcRegs = 1; inst.Src[0].SrcRegister.File = src_file; inst.Src[0].SrcRegister.Index = src_index; @@ -162,8 +162,8 @@ struct tgsi_full_instruction vl_inst3 inst.Instruction.Opcode = opcode; inst.Instruction.NumDstRegs = 1; - inst.Dst[0].DstRegister.File = dst_file; - inst.Dst[0].DstRegister.Index = dst_index; + inst.Dst[0].Register.File = dst_file; + inst.Dst[0].Register.Index = dst_index; inst.Instruction.NumSrcRegs = 2; inst.Src[0].SrcRegister.File = src1_file; inst.Src[0].SrcRegister.Index = src1_index; @@ -188,8 +188,8 @@ struct tgsi_full_instruction vl_tex inst.Instruction.Opcode = TGSI_OPCODE_TEX; inst.Instruction.NumDstRegs = 1; - inst.Dst[0].DstRegister.File = dst_file; - inst.Dst[0].DstRegister.Index = dst_index; + inst.Dst[0].Register.File = dst_file; + inst.Dst[0].Register.Index = dst_index; inst.Instruction.NumSrcRegs = 2; inst.Instruction.Texture = 1; inst.Texture.Texture = tex; @@ -218,8 +218,8 @@ struct tgsi_full_instruction vl_inst4 inst.Instruction.Opcode = opcode; inst.Instruction.NumDstRegs = 1; - inst.Dst[0].DstRegister.File = dst_file; - inst.Dst[0].DstRegister.Index = dst_index; + inst.Dst[0].Register.File = dst_file; + inst.Dst[0].Register.Index = dst_index; inst.Instruction.NumSrcRegs = 3; inst.Src[0].SrcRegister.File = src1_file; inst.Src[0].SrcRegister.Index = src1_index; |