i965g: pass backbuffer tiling information to driver

The gem winsys gets this information, needs to pass it on.

4 files changed, 12 insertions, 13 deletions

diff --git a/src/gallium/drivers/i965/brw_screen.h b/src/gallium/drivers/i965/brw_screen.h
index 301b20d549..ab811e48fc 100644
--- a/src/gallium/drivers/i965/brw_screen.h
+++ b/src/gallium/drivers/i965/brw_screen.h
@@ -72,9 +72,6 @@ struct brw_buffer
    void *ptr;
 };
 
-#define BRW_TILING_NONE  0
-#define BRW_TILING_Y     1
-#define BRW_TILING_X     2
 
 union brw_surface_id {
    struct {
diff --git a/src/gallium/drivers/i965/brw_screen_tex_layout.c b/src/gallium/drivers/i965/brw_screen_tex_layout.c
index f793fa8859..71a8890f83 100644
--- a/src/gallium/drivers/i965/brw_screen_tex_layout.c
+++ b/src/gallium/drivers/i965/brw_screen_tex_layout.c
@@ -32,6 +32,7 @@
 
 #include "brw_screen.h"
 #include "brw_debug.h"
+#include "brw_winsys.h"
 
 /* Code to layout images in a mipmap tree for i965.
  */
diff --git a/src/gallium/drivers/i965/brw_screen_texture.c b/src/gallium/drivers/i965/brw_screen_texture.c
index 666ec70d42..650cac240b 100644
--- a/src/gallium/drivers/i965/brw_screen_texture.c
+++ b/src/gallium/drivers/i965/brw_screen_texture.c
@@ -472,7 +472,8 @@ boolean brw_texture_get_winsys_buffer(struct pipe_texture *texture,
 struct pipe_texture * 
 brw_texture_blanket_winsys_buffer(struct pipe_screen *screen,
                                   const struct pipe_texture *templ,
-                                  const unsigned pitch,
+                                  unsigned pitch,
+				  unsigned tiling,
                                   struct brw_winsys_buffer *buffer)
 {
    struct brw_screen *bscreen = brw_screen(screen);
@@ -495,18 +496,11 @@ brw_texture_blanket_winsys_buffer(struct pipe_screen *screen,
    tex->base.screen = screen;
 
    tex->cpp = pf_get_size(tex->base.format);
+   tex->tiling = tiling;
 
    make_empty_list(&tex->views[0]);
    make_empty_list(&tex->views[1]);
 
-   if (1)
-      tex->tiling = BRW_TILING_NONE;
-   else if (bscreen->chipset.is_965 &&
-            pf_is_depth_or_stencil(templ->format))
-      tex->tiling = BRW_TILING_Y;
-   else
-      tex->tiling = BRW_TILING_X;
-
    if (!brw_texture_layout(bscreen, tex))
       goto fail;
 
diff --git a/src/gallium/drivers/i965/brw_winsys.h b/src/gallium/drivers/i965/brw_winsys.h
index 9e86a1256e..af506a283d 100644
--- a/src/gallium/drivers/i965/brw_winsys.h
+++ b/src/gallium/drivers/i965/brw_winsys.h
@@ -111,6 +111,12 @@ enum brw_buffer_data_type {
 };
 
 
+/* Matches the i915_drm definitions:
+ */
+#define BRW_TILING_NONE  0
+#define BRW_TILING_X     1
+#define BRW_TILING_Y     2
+
 
 /* Relocations to be applied with subdata in a call to sws->bo_subdata, below.
  *
@@ -271,7 +277,8 @@ boolean brw_texture_get_winsys_buffer(struct pipe_texture *texture,
 struct pipe_texture * 
 brw_texture_blanket_winsys_buffer(struct pipe_screen *screen,
                                   const struct pipe_texture *template,
-                                  const unsigned pitch,
+                                  unsigned pitch,
+				  unsigned tiling,
                                   struct brw_winsys_buffer *buffer);