Merge branch 'gallium-tex-surface' into gallium-0.1

Conflicts:

	src/gallium/include/pipe/p_util.h

1 files changed, 46 insertions, 62 deletions

diff --git a/src/gallium/winsys/dri/intel/intel_batchbuffer.h b/src/gallium/winsys/dri/intel/intel_batchbuffer.h
index caf6870a3c..9e4b8043bf 100644
--- a/src/gallium/winsys/dri/intel/intel_batchbuffer.h
+++ b/src/gallium/winsys/dri/intel/intel_batchbuffer.h
@@ -1,54 +1,20 @@
-/**************************************************************************
- * 
- * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- * 
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- * 
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- * 
- **************************************************************************/
-
 #ifndef INTEL_BATCHBUFFER_H
 #define INTEL_BATCHBUFFER_H
 
-#include "pipe/p_debug.h"
-#include "pipe/p_compiler.h"
-#include "dri_bufmgr.h"
+#include "mtypes.h"
+#include "ws_dri_bufmgr.h"
 
 struct intel_context;
 
 #define BATCH_SZ 16384
 #define BATCH_RESERVED 16
 
-#define MAX_RELOCS 4096
+#define INTEL_DEFAULT_RELOCS 100
+#define INTEL_MAX_RELOCS 400
 
 #define INTEL_BATCH_NO_CLIPRECTS 0x1
 #define INTEL_BATCH_CLIPRECTS    0x2
 
-struct buffer_reloc
-{
-   struct _DriBufferObject *buf;
-   uint offset;
-   uint delta;                /* not needed? */
-};
-
 struct intel_batchbuffer
 {
    struct bufmgr *bm;
@@ -56,19 +22,30 @@ struct intel_batchbuffer
 
    struct _DriBufferObject *buffer;
    struct _DriFenceObject *last_fence;
-   uint flags;
+   GLuint flags;
 
-   drmBOList list;
-   uint list_count;
-   ubyte *map;
-   ubyte *ptr;
+   struct _DriBufferList *list;
+   GLuint list_count;
+   GLubyte *map;
+   GLubyte *ptr;
 
-   struct buffer_reloc reloc[MAX_RELOCS];
-   uint nr_relocs;
-   uint size;
+   uint32_t *reloc;
+   GLuint reloc_size;
+   GLuint nr_relocs;
+
+   GLuint size;
+
+   GLuint dirty_state;
+   GLuint id;
+
+  uint32_t poolOffset;
+  uint8_t *drmBOVirtual;
+  struct _drmBONode *node; /* Validation list node for this buffer */
+  int dest_location;     /* Validation list sequence for this buffer */
 };
 
-struct intel_batchbuffer *intel_batchbuffer_alloc(struct intel_context *intel);
+struct intel_batchbuffer *intel_batchbuffer_alloc(struct intel_context
+                                                  *intel);
 
 void intel_batchbuffer_free(struct intel_batchbuffer *batch);
 
@@ -82,26 +59,28 @@ void intel_batchbuffer_reset(struct intel_batchbuffer *batch);
 
 
 /* Unlike bmBufferData, this currently requires the buffer be mapped.
- * Consider it a convenience function wrapping multiple
+ * Consider it a convenience function wrapping multple
  * intel_buffer_dword() calls.
  */
 void intel_batchbuffer_data(struct intel_batchbuffer *batch,
-                            const void *data, uint bytes, uint flags);
+                            const void *data, GLuint bytes, GLuint flags);
 
 void intel_batchbuffer_release_space(struct intel_batchbuffer *batch,
-                                     uint bytes);
+                                     GLuint bytes);
 
-boolean intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
-                                     struct _DriBufferObject *buffer,
-                                     uint flags,
-                                     uint mask, uint offset);
+void
+intel_offset_relocation(struct intel_batchbuffer *batch,
+			unsigned pre_add,
+			struct _DriBufferObject *driBO,
+			uint64_t val_flags,
+			uint64_t val_mask);
 
 /* Inline functions - might actually be better off with these
  * non-inlined.  Certainly better off switching all command packets to
  * be passed as structs rather than dwords, but that's a little bit of
  * work...
  */
-static INLINE uint
+static INLINE GLuint
 intel_batchbuffer_space(struct intel_batchbuffer *batch)
 {
    return (batch->size - BATCH_RESERVED) - (batch->ptr - batch->map);
@@ -109,22 +88,26 @@ intel_batchbuffer_space(struct intel_batchbuffer *batch)
 
 
 static INLINE void
-intel_batchbuffer_emit_dword(struct intel_batchbuffer *batch, uint dword)
+intel_batchbuffer_emit_dword(struct intel_batchbuffer *batch, GLuint dword)
 {
    assert(batch->map);
    assert(intel_batchbuffer_space(batch) >= 4);
-   *(uint *) (batch->ptr) = dword;
+   *(GLuint *) (batch->ptr) = dword;
    batch->ptr += 4;
 }
 
 static INLINE void
 intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
-                                uint sz, uint flags)
+                                GLuint sz, GLuint flags)
 {
+   struct _DriFenceObject *fence;
+
    assert(sz < batch->size - 8);
    if (intel_batchbuffer_space(batch) < sz ||
-       (batch->flags != 0 && flags != 0 && batch->flags != flags))
-      intel_batchbuffer_flush(batch);
+       (batch->flags != 0 && flags != 0 && batch->flags != flags)) {
+      fence = intel_batchbuffer_flush(batch);
+      driFenceUnReference(&fence);
+   }
 
    batch->flags |= flags;
 }
@@ -134,14 +117,15 @@ intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
 #define BATCH_LOCALS
 
 #define BEGIN_BATCH(n, flags) do {				\
+   assert(!intel->prim.flush);					\
    intel_batchbuffer_require_space(intel->batch, (n)*4, flags);	\
 } while (0)
 
 #define OUT_BATCH(d)  intel_batchbuffer_emit_dword(intel->batch, d)
 
 #define OUT_RELOC(buf,flags,mask,delta) do { 				\
-   assert((delta) >= 0);						\
-   intel_batchbuffer_emit_reloc(intel->batch, buf, flags, mask, delta);	\
+   assert((delta) >= 0);							\
+   intel_offset_relocation(intel->batch, delta, buf, flags, mask); \
 } while (0)
 
 #define ADVANCE_BATCH() do { } while(0)