summaryrefslogtreecommitdiff
path: root/src/gallium/winsys/drm/intel/gem
diff options
context:
space:
mode:
authorIan Romanick <ian.d.romanick@intel.com>2009-08-18 12:20:36 -0700
committerIan Romanick <ian.d.romanick@intel.com>2009-08-18 12:20:36 -0700
commita512985fd81c1ed4ccc5e69aaa05015cf7ff844d (patch)
tree69e6e898deaeaed2b4dfb5851707c68261c464de /src/gallium/winsys/drm/intel/gem
parent0b5af41c6fae2809f4567a7cecbd207e5e4f3ab5 (diff)
parentc80bc3abcd3939e5e2d45aea4b01ff22bfec244b (diff)
Merge branch 'master' into asm-shader-rework-1
Conflicts: src/mesa/shader/arbprogparse.c
Diffstat (limited to 'src/gallium/winsys/drm/intel/gem')
-rw-r--r--src/gallium/winsys/drm/intel/gem/intel_be_batchbuffer.c43
-rw-r--r--src/gallium/winsys/drm/intel/gem/intel_be_context.c2
-rw-r--r--src/gallium/winsys/drm/intel/gem/intel_be_device.c83
-rw-r--r--src/gallium/winsys/drm/intel/gem/intel_be_device.h5
4 files changed, 112 insertions, 21 deletions
diff --git a/src/gallium/winsys/drm/intel/gem/intel_be_batchbuffer.c b/src/gallium/winsys/drm/intel/gem/intel_be_batchbuffer.c
index d5e63c3bae..c4a79586e6 100644
--- a/src/gallium/winsys/drm/intel/gem/intel_be_batchbuffer.c
+++ b/src/gallium/winsys/drm/intel/gem/intel_be_batchbuffer.c
@@ -21,12 +21,10 @@ intel_be_batchbuffer_alloc(struct intel_be_context *intel)
batch->base.size = 0;
batch->base.actual_size = intel->device->max_batch_size;
batch->base.relocs = 0;
- batch->base.max_relocs = 500;/*INTEL_DEFAULT_RELOCS;*/
+ batch->base.max_relocs = 100;/*INTEL_DEFAULT_RELOCS;*/
- batch->base.map = malloc(batch->base.actual_size);
- memset(batch->base.map, 0, batch->base.actual_size);
-
- batch->base.ptr = batch->base.map;
+ batch->intel = intel;
+ batch->device = intel->device;
intel_be_batchbuffer_reset(batch);
@@ -41,16 +39,17 @@ intel_be_batchbuffer_reset(struct intel_be_batchbuffer *batch)
if (batch->bo)
drm_intel_bo_unreference(batch->bo);
+ batch->bo = drm_intel_bo_alloc(dev->pools.gem,
+ "gallium3d_batch_buffer",
+ batch->base.actual_size,
+ 4096);
+ drm_intel_bo_map(batch->bo, TRUE);
+ batch->base.map = batch->bo->virtual;
memset(batch->base.map, 0, batch->base.actual_size);
batch->base.ptr = batch->base.map;
batch->base.size = batch->base.actual_size - BATCH_RESERVED;
-
batch->base.relocs = 0;
-
- batch->bo = drm_intel_bo_alloc(dev->pools.gem,
- "gallium3d_batch_buffer",
- batch->base.actual_size, 0);
}
int
@@ -88,6 +87,7 @@ intel_be_batchbuffer_flush(struct intel_be_batchbuffer *batch,
struct i915_batchbuffer *i915 = &batch->base;
unsigned used = 0;
int ret = 0;
+ int i;
assert(i915_batchbuffer_space(i915) >= 0);
@@ -105,11 +105,29 @@ intel_be_batchbuffer_flush(struct intel_be_batchbuffer *batch,
used = batch->base.ptr - batch->base.map;
- drm_intel_bo_subdata(batch->bo, 0, used, batch->base.map);
- ret = drm_intel_bo_exec(batch->bo, used, NULL, 0, 0);
+ drm_intel_bo_unmap(batch->bo);
+ /* Do the sending to HW */
+ ret = drm_intel_bo_exec(batch->bo, used, NULL, 0, 0);
assert(ret == 0);
+ if (batch->device->dump_cmd) {
+ unsigned *ptr;
+ drm_intel_bo_map(batch->bo, FALSE);
+ ptr = (unsigned*)batch->bo->virtual;
+
+ debug_printf("%s:\n", __func__);
+ for (i = 0; i < used / 4; i++, ptr++) {
+ debug_printf("\t%08x: %08x\n", i*4, *ptr);
+ }
+
+ drm_intel_bo_unmap(batch->bo);
+ } else {
+ /* TODO figgure out why the gpu hangs if we don't run sync */
+ drm_intel_bo_map(batch->bo, FALSE);
+ drm_intel_bo_unmap(batch->bo);
+ }
+
intel_be_batchbuffer_reset(batch);
if (fence) {
@@ -134,6 +152,5 @@ intel_be_batchbuffer_free(struct intel_be_batchbuffer *batch)
if (batch->bo)
drm_intel_bo_unreference(batch->bo);
- free(batch->base.map);
free(batch);
}
diff --git a/src/gallium/winsys/drm/intel/gem/intel_be_context.c b/src/gallium/winsys/drm/intel/gem/intel_be_context.c
index db84f9af51..629987c6f9 100644
--- a/src/gallium/winsys/drm/intel/gem/intel_be_context.c
+++ b/src/gallium/winsys/drm/intel/gem/intel_be_context.c
@@ -36,7 +36,7 @@ intel_be_batch_reloc(struct i915_winsys *sws,
}
if (access_flags & I915_BUFFER_ACCESS_READ) {
- read |= I915_GEM_DOMAIN_VERTEX;
+ read |= I915_GEM_DOMAIN_SAMPLER;
}
ret = intel_be_offset_relocation(intel->batch,
diff --git a/src/gallium/winsys/drm/intel/gem/intel_be_device.c b/src/gallium/winsys/drm/intel/gem/intel_be_device.c
index e3630f5d12..5312865a03 100644
--- a/src/gallium/winsys/drm/intel/gem/intel_be_device.c
+++ b/src/gallium/winsys/drm/intel/gem/intel_be_device.c
@@ -7,6 +7,7 @@
#include "pipe/p_inlines.h"
#include "util/u_memory.h"
#include "util/u_debug.h"
+#include "util/u_math.h"
#include "intel_be_fence.h"
@@ -16,6 +17,8 @@
#include "intel_be_api.h"
#include <stdio.h>
+#define I915_TILING_X 1
+
/*
* Buffer
*/
@@ -25,9 +28,10 @@ intel_be_buffer_map(struct pipe_winsys *winsys,
struct pipe_buffer *buf,
unsigned flags)
{
+ struct intel_be_buffer *buffer = intel_be_buffer(buf);
drm_intel_bo *bo = intel_bo(buf);
int write = 0;
- int ret;
+ int ret = 0;
if (flags & PIPE_BUFFER_USAGE_DONTBLOCK) {
/* Remove this when drm_intel_bo_map supports DONTBLOCK
@@ -38,19 +42,37 @@ intel_be_buffer_map(struct pipe_winsys *winsys,
if (flags & PIPE_BUFFER_USAGE_CPU_WRITE)
write = 1;
- ret = drm_intel_bo_map(bo, write);
+ if (buffer->map_count)
+ goto out;
+
+ if (buffer->map_gtt)
+ ret = drm_intel_gem_bo_map_gtt(bo);
+ else
+ ret = drm_intel_bo_map(bo, write);
+
+ buffer->ptr = bo->virtual;
+out:
if (ret)
return NULL;
- return bo->virtual;
+ buffer->map_count++;
+ return buffer->ptr;
}
static void
intel_be_buffer_unmap(struct pipe_winsys *winsys,
struct pipe_buffer *buf)
{
- drm_intel_bo_unmap(intel_bo(buf));
+ struct intel_be_buffer *buffer = intel_be_buffer(buf);
+
+ if (--buffer->map_count)
+ return;
+
+ if (buffer->map_gtt)
+ drm_intel_gem_bo_unmap_gtt(intel_bo(buf));
+ else
+ drm_intel_bo_unmap(intel_bo(buf));
}
static void
@@ -80,8 +102,13 @@ intel_be_buffer_create(struct pipe_winsys *winsys,
buffer->base.size = size;
buffer->flinked = FALSE;
buffer->flink = 0;
+ buffer->map_gtt = FALSE;
- if (usage & (PIPE_BUFFER_USAGE_VERTEX | PIPE_BUFFER_USAGE_CONSTANT)) {
+ if (usage & I915_BUFFER_USAGE_SCANOUT) {
+ /* Scanout buffer */
+ name = "gallium3d_scanout";
+ pool = dev->pools.gem;
+ } else if (usage & (PIPE_BUFFER_USAGE_VERTEX | PIPE_BUFFER_USAGE_CONSTANT)) {
/* Local buffer */
name = "gallium3d_local";
pool = dev->pools.gem;
@@ -96,6 +123,12 @@ intel_be_buffer_create(struct pipe_winsys *winsys,
}
buffer->bo = drm_intel_bo_alloc(pool, name, size, alignment);
+ if (usage & I915_BUFFER_USAGE_SCANOUT) {
+ unsigned tiling = I915_TILING_X;
+ unsigned stride = 2048 * 4; /* TODO do something smarter here */
+ drm_intel_bo_set_tiling(buffer->bo, &tiling, stride);
+ buffer->map_gtt = TRUE;
+ }
if (!buffer->bo)
goto err;
@@ -142,6 +175,40 @@ err:
return NULL;
}
+static struct pipe_buffer *
+intel_be_surface_buffer_create(struct pipe_winsys *winsys,
+ unsigned width, unsigned height,
+ enum pipe_format format,
+ unsigned usage,
+ unsigned tex_usage,
+ unsigned *stride)
+{
+ struct pipe_format_block block;
+ unsigned buf_usage = 0;
+ unsigned buf_stride = 0;
+ unsigned buf_size = 0;
+
+ pf_get_block(format, &block);
+ buf_stride = pf_get_stride(&block, width);
+ buf_stride = align(buf_stride, 64);
+
+ if (tex_usage & PIPE_TEXTURE_USAGE_PRIMARY) {
+ /* TODO more checks */
+ assert(buf_stride <= 2048*4);
+ assert(height % 8 == 0);
+ buf_stride = 2048 * 4;
+ buf_usage |= I915_BUFFER_USAGE_SCANOUT;
+ }
+
+ buf_size = buf_stride * height;
+ *stride = buf_stride;
+
+ return intel_be_buffer_create(winsys,
+ 0,
+ buf_usage,
+ buf_size);
+}
+
boolean
intel_be_get_texture_buffer(struct drm_api *api,
struct pipe_texture *texture,
@@ -225,6 +292,7 @@ intel_be_global_handle_from_buffer(struct drm_api *api,
*handle = buf->flink;
return TRUE;
}
+
/*
* Fence
*/
@@ -296,8 +364,8 @@ intel_be_init_device(struct intel_be_device *dev, int fd, unsigned id)
dev->base.buffer_unmap = intel_be_buffer_unmap;
dev->base.buffer_destroy = intel_be_buffer_destroy;
- /* Not used anymore */
- dev->base.surface_buffer_create = NULL;
+ /* Used by softpipe */
+ dev->base.surface_buffer_create = intel_be_surface_buffer_create;
dev->base.fence_reference = intel_be_fence_refunref;
dev->base.fence_signalled = intel_be_fence_signalled;
@@ -308,6 +376,7 @@ intel_be_init_device(struct intel_be_device *dev, int fd, unsigned id)
dev->pools.gem = drm_intel_bufmgr_gem_init(dev->fd, dev->max_batch_size);
dev->softpipe = debug_get_bool_option("INTEL_SOFTPIPE", FALSE);
+ dev->dump_cmd = debug_get_bool_option("INTEL_DUMP_CMD", FALSE);
return true;
}
diff --git a/src/gallium/winsys/drm/intel/gem/intel_be_device.h b/src/gallium/winsys/drm/intel/gem/intel_be_device.h
index 56d95bd7fe..c397048f8c 100644
--- a/src/gallium/winsys/drm/intel/gem/intel_be_device.h
+++ b/src/gallium/winsys/drm/intel/gem/intel_be_device.h
@@ -19,6 +19,7 @@ struct intel_be_device
struct pipe_winsys base;
boolean softpipe;
+ boolean dump_cmd;
int fd; /**< Drm file discriptor */
@@ -47,6 +48,10 @@ intel_be_init_device(struct intel_be_device *device, int fd, unsigned id);
struct intel_be_buffer {
struct pipe_buffer base;
+ void *ptr;
+ unsigned map_count;
+ boolean map_gtt;
+
drm_intel_bo *bo;
boolean flinked;
unsigned flink;