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authorMichel Dänzer <daenzer@vmware.com>2009-07-20 01:53:15 +0200
committerMichel Dänzer <michel@daenzer.net>2009-07-20 01:53:15 +0200
commit3326be6c0a008c42e19a039cbfbf2fac3f6e2212 (patch)
treed4460d79fe1905b40b3e2b7354c7c731e54c4dd8 /src/gallium
parenta8921d0b52f04bbd62c66278e7421e6b99bfd7c3 (diff)
r300g: Guard R500 register writes by is_r500 check.
Flagged by the DRM command stream checker. This allows the driver to work on non-R500 cards.
Diffstat (limited to 'src/gallium')
-rw-r--r--src/gallium/drivers/r300/r300_state_invariant.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c
index 9f534b8ce3..430129d5bd 100644
--- a/src/gallium/drivers/r300/r300_state_invariant.c
+++ b/src/gallium/drivers/r300/r300_state_invariant.c
@@ -72,7 +72,7 @@ void r300_emit_invariant_state(struct r300_context* r300)
END_CS;
/* XXX unsorted stuff from surface_fill */
- BEGIN_CS(75 + (caps->has_tcl ? 5 : 0));
+ BEGIN_CS(71 + (caps->has_tcl ? 5 : 0) + (caps->is_r500 ? 4 : 0));
/* Flush PVS. */
OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
@@ -115,8 +115,10 @@ void r300_emit_invariant_state(struct r300_context* r300)
OUT_CS_REG(R300_RB3D_CCTL, 0x00000000);
OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F);
OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, 0x00000000);
- OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000);
- OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFFFFFFFF);
+ if (caps->is_r500) {
+ OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x00000000);
+ OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFFFFFFFF);
+ }
OUT_CS_REG(R300_ZB_FORMAT, 0x00000002);
OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT, 0x00000003);
OUT_CS_REG(R300_ZB_BW_CNTL, 0x00000000);