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authorEric Anholt <eric@anholt.net>2007-11-16 16:43:45 -0800
committerEric Anholt <eric@anholt.net>2007-11-16 17:29:30 -0800
commitf00a64999c197e6a96e65fd00f64224a6f22c9fa (patch)
tree48c1171ce1b7a7eaa1396ac61069819f5b5c4be2 /src/mesa/drivers/dri/i915/intel_pixel_copy.c
parent9b461d4d029497dd6f71e60220849e1b66bb8cf5 (diff)
[intel] Add 965 support to shared intel_blit.c
This requires that regions grow a marker of whether they are tiled or not, because fence (surface) registers are ignored by the 965 2D engine.
Diffstat (limited to 'src/mesa/drivers/dri/i915/intel_pixel_copy.c')
-rw-r--r--src/mesa/drivers/dri/i915/intel_pixel_copy.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i915/intel_pixel_copy.c b/src/mesa/drivers/dri/i915/intel_pixel_copy.c
index 9d478283e4..629cdb979d 100644
--- a/src/mesa/drivers/dri/i915/intel_pixel_copy.c
+++ b/src/mesa/drivers/dri/i915/intel_pixel_copy.c
@@ -342,8 +342,8 @@ do_blit_copypixels(GLcontext * ctx,
intelEmitCopyBlit(intel, dst->cpp,
- src->pitch, src->buffer, 0,
- dst->pitch, dst->buffer, 0,
+ src->pitch, src->buffer, 0, src->tiled,
+ dst->pitch, dst->buffer, 0, dst->tiled,
rect.x1 + delta_x,
rect.y1 + delta_y, /* srcx, srcy */
rect.x1, rect.y1, /* dstx, dsty */