Merge commit 'origin/master' into radeon-rewrite

Conflicts:
	src/mesa/drivers/dri/r200/r200_state.c
	src/mesa/drivers/dri/r300/r300_context.h
	src/mesa/drivers/dri/r300/r300_fragprog.c
	src/mesa/drivers/dri/r300/r300_state.c
	src/mesa/drivers/dri/r300/r300_texmem.c
	src/mesa/drivers/dri/r300/r300_texstate.c
	src/mesa/drivers/dri/r300/r500_fragprog.c
	src/mesa/drivers/dri/radeon/radeon_screen.c
	src/mesa/drivers/dri/radeon/radeon_state.c

1 files changed, 6 insertions, 3 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index d0ab3bdc65..59ead757b5 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -240,22 +240,25 @@ struct brw_wm_compile {
    GLuint max_wm_grf;
    GLuint last_scratch;
 
+   GLuint cur_inst;  /**< index of current instruction */
+
+   GLboolean out_of_regs;  /**< ran out of GRF registers? */
+
    /** Mapping from Mesa registers to hardware registers */
    struct {
       GLboolean inited;
       struct brw_reg reg;
    } wm_regs[PROGRAM_PAYLOAD+1][256][4];
 
+   GLboolean used_grf[BRW_WM_MAX_GRF];
+   GLuint first_free_grf;
    struct brw_reg stack;
    struct brw_reg emit_mask_reg;
-   GLuint reg_index;  /**< Index of next free GRF register */
    GLuint tmp_regs[BRW_WM_MAX_GRF];
    GLuint tmp_index;
    GLuint tmp_max;
    GLuint subroutines[BRW_WM_MAX_SUBROUTINE];
 
-   /** using a real constant buffer? */
-   GLboolean use_const_buffer;
    /** we may need up to 3 constants per instruction (if use_const_buffer) */
    struct {
       GLint index;