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authorEric Anholt <eric@anholt.net>2009-02-19 13:53:46 -0800
committerEric Anholt <eric@anholt.net>2009-02-21 10:53:05 -0800
commit078e8a61b2aa547c6794f586a5c8bfaa575bb066 (patch)
tree0e6a52f52dfdc8ff1f7be6672e352c125517825a /src/mesa/drivers/dri/i965
parent776971218ef6c6749fcb882a95ae5fc3a1ff5059 (diff)
i965: Fix render target read domains.
We were asking for something illegal (write_domain != 0 && read_domains != write_domain) because at the time of writing the region surfaces were used for texturing occasionally as well, and we weren't really clear on the model GEM was going to use. This reliably triggered a kernel bug with domain handling, resulting in oglconform mustpass.c failure. Of course, it only became visible after 01bc4d441fd6821ad9fc20d5e9544e4e587e4ff0 cleaned up some gratuitous flushing.
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 3593988f8d..654adcd131 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -389,8 +389,7 @@ brw_update_region_surface(struct brw_context *brw, struct intel_region *region,
* a more restrictive relocation to emit.
*/
dri_bo_emit_reloc(brw->wm.surf_bo[unit],
- I915_GEM_DOMAIN_RENDER |
- I915_GEM_DOMAIN_SAMPLER,
+ I915_GEM_DOMAIN_RENDER,
I915_GEM_DOMAIN_RENDER,
0,
offsetof(struct brw_surface_state, ss1),