diff options
author | Keith Packard <keithp@keithp.com> | 2007-12-17 22:43:48 -0800 |
---|---|---|
committer | Keith Packard <keithp@keithp.com> | 2007-12-18 10:22:04 -0800 |
commit | a183efc132c8db1bb42525ac177ffff96f69a59b (patch) | |
tree | e4106d93ea70e4b9fbe635704983e34b1dd24a78 /src/mesa/drivers/dri/intel/intel_tex_layout.h | |
parent | 6f1bfdc4bf5b72ac705b8cbb2dc431e133dcb5b8 (diff) |
[Intel] Centralize mipmap pitch computations.
mipmap pitches must account for the device alignment requirements, which
used to be fairly simple; just align to a 4-byte boundary. However, to allow
textures to be drawn to under TTM, they now need to be aligned to a 64-byte
boundary. Placing all of the alignment constraints in a single function
allows this new constraint to be applied uniformly.
There was some pitch constraining code in intel_miptree_create, but that was
modifying the pitch long after the miptree had been layed out, so it only
served to wreck the mipmap and cause rendering errors.
Diffstat (limited to 'src/mesa/drivers/dri/intel/intel_tex_layout.h')
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_tex_layout.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_tex_layout.h b/src/mesa/drivers/dri/intel/intel_tex_layout.h index 99d41c3629..193699d3f7 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_layout.h +++ b/src/mesa/drivers/dri/intel/intel_tex_layout.h @@ -38,5 +38,5 @@ static GLuint minify( GLuint d ) return MAX2(1, d>>1); } -extern void i945_miptree_layout_2d( struct intel_mipmap_tree *mt ); +extern void i945_miptree_layout_2d( struct intel_context *intel, struct intel_mipmap_tree *mt ); extern GLuint intel_compressed_alignment(GLenum); |