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authorDave Airlie <airlied@redhat.com>2009-02-26 11:08:14 +1000
committerDave Airlie <airlied@redhat.com>2009-02-26 11:08:14 +1000
commitbc5f94c1e1fddcf2b2a50972cb96e2593b288994 (patch)
tree488145f034bcfea4999d4d6884697da87c20dd44 /src/mesa/drivers/dri/r300/r300_cmdbuf.c
parent199867bd4585036f19e219562c22a9b499a7b0d2 (diff)
r300: don't flush VAP too often.
Flush the VAP the first time for each state atom we upload new VAP data
Diffstat (limited to 'src/mesa/drivers/dri/r300/r300_cmdbuf.c')
-rw-r--r--src/mesa/drivers/dri/r300/r300_cmdbuf.c22
1 files changed, 14 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
index c3a808ca79..3b12d36419 100644
--- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c
+++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
@@ -97,14 +97,20 @@ void emit_vpu(GLcontext *ctx, struct radeon_state_atom * atom)
addr = (cmd.vpu.adrhi << 8) | cmd.vpu.adrlo;
ndw = cmd.vpu.count * 4;
if (ndw) {
- BEGIN_BATCH_NO_AUTOSTATE(15 + ndw);
-
- /* flush processing vertices */
- OUT_BATCH_REGVAL(R300_SC_SCREENDOOR, 0);
- OUT_BATCH_REGVAL(R300_RB3D_DSTCACHE_CTLSTAT, R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
- OUT_BATCH_REGVAL(RADEON_WAIT_UNTIL, RADEON_WAIT_3D_IDLECLEAN);
- OUT_BATCH_REGVAL(R300_SC_SCREENDOOR, 0xffffff);
- OUT_BATCH_REGVAL(R300_VAP_PVS_STATE_FLUSH_REG, 1);
+
+ if (r300->vap_flush_needed) {
+ BEGIN_BATCH_NO_AUTOSTATE(15 + ndw);
+
+ /* flush processing vertices */
+ OUT_BATCH_REGVAL(R300_SC_SCREENDOOR, 0);
+ OUT_BATCH_REGVAL(R300_RB3D_DSTCACHE_CTLSTAT, R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
+ OUT_BATCH_REGVAL(RADEON_WAIT_UNTIL, RADEON_WAIT_3D_IDLECLEAN);
+ OUT_BATCH_REGVAL(R300_SC_SCREENDOOR, 0xffffff);
+ OUT_BATCH_REGVAL(R300_VAP_PVS_STATE_FLUSH_REG, 0);
+ r300->vap_flush_needed = GL_FALSE;
+ } else {
+ BEGIN_BATCH_NO_AUTOSTATE(5 + ndw);
+ }
OUT_BATCH_REGVAL(R300_VAP_PVS_UPLOAD_ADDRESS, addr);
OUT_BATCH(CP_PACKET0(R300_VAP_PVS_UPLOAD_DATA, ndw-1) | RADEON_ONE_REG_WR);
for (i = 0; i < ndw; i++) {