Merge branch 'master' into r300-compiler

Conflicts:
	src/gallium/drivers/r300/r300_tgsi_to_rc.c

33 files changed, 476 insertions, 291 deletions

diff --git a/src/mesa/drivers/dri/radeon/Makefile b/src/mesa/drivers/dri/radeon/Makefile
index 8fe9d98a0b..1f286776b5 100644
--- a/src/mesa/drivers/dri/radeon/Makefile
+++ b/src/mesa/drivers/dri/radeon/Makefile
@@ -15,17 +15,18 @@ CS_SOURCES = radeon_cs_space_drm.c
 endif
 
 RADEON_COMMON_SOURCES = \
-	radeon_texture.c \
+	radeon_bo_legacy.c \
 	radeon_common_context.c \
 	radeon_common.c \
+	radeon_cs_legacy.c \
 	radeon_dma.c \
+	radeon_debug.c \
+	radeon_fbo.c \
 	radeon_lock.c \
-	radeon_bo_legacy.c \
-	radeon_cs_legacy.c \
 	radeon_mipmap_tree.c \
+	radeon_queryobj.c \
 	radeon_span.c \
-	radeon_fbo.c \
-	radeon_queryobj.c
+	radeon_texture.c
 
 DRIVER_SOURCES = \
 	radeon_context.c \
diff --git a/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c b/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c
index a10c6b73ab..3e7547d2f9 100644
--- a/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c
+++ b/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c
@@ -640,7 +640,7 @@ static int bo_vram_validate(struct radeon_bo *bo,
 						      &tex,
 						      sizeof(drm_radeon_texture_t));
 			    if (ret) {
-				    if (RADEON_DEBUG & DEBUG_IOCTL)
+				    if (RADEON_DEBUG & RADEON_IOCTL)
 					    fprintf(stderr, "DRM_RADEON_TEXTURE:  again!\n");
 				    usleep(1);
 			    }
@@ -677,7 +677,7 @@ static int bo_vram_validate(struct radeon_bo *bo,
 						      &tex,
 						      sizeof(drm_radeon_texture_t));
 			    if (ret) {
-				    if (RADEON_DEBUG & DEBUG_IOCTL)
+				    if (RADEON_DEBUG & RADEON_IOCTL)
 					    fprintf(stderr, "DRM_RADEON_TEXTURE:  again!\n");
 				    usleep(1);
 			    }
diff --git a/src/mesa/drivers/dri/radeon/radeon_buffer_objects.c b/src/mesa/drivers/dri/radeon/radeon_buffer_objects.c
index e8ae51e6ea..a24b6dac26 100644
--- a/src/mesa/drivers/dri/radeon/radeon_buffer_objects.c
+++ b/src/mesa/drivers/dri/radeon/radeon_buffer_objects.c
@@ -78,9 +78,10 @@ radeonDeleteBufferObject(GLcontext * ctx,
  * Allocate space for and store data in a buffer object.  Any data that was
  * previously stored in the buffer object is lost.  If data is NULL,
  * memory will be allocated, but no copy will occur.
- * Called via glBufferDataARB().
+ * Called via ctx->Driver.BufferData().
+ * \return GL_TRUE for success, GL_FALSE if out of memory
  */
-static void
+static GLboolean
 radeonBufferData(GLcontext * ctx,
                  GLenum target,
                  GLsizeiptrARB size,
@@ -107,6 +108,9 @@ radeonBufferData(GLcontext * ctx,
                                         RADEON_GEM_DOMAIN_GTT,
                                         0);
 
+        if (!radeon_obj->bo)
+            return GL_FALSE;
+
         if (data != NULL) {
             radeon_bo_map(radeon_obj->bo, GL_TRUE);
 
@@ -115,6 +119,7 @@ radeonBufferData(GLcontext * ctx,
             radeon_bo_unmap(radeon_obj->bo);
         }
     }
+    return GL_TRUE;
 }
 
 /**
diff --git a/src/mesa/drivers/dri/radeon/radeon_chipset.h b/src/mesa/drivers/dri/radeon/radeon_chipset.h
index 0da1c0f9ee..46a9cd5ff8 100644
--- a/src/mesa/drivers/dri/radeon/radeon_chipset.h
+++ b/src/mesa/drivers/dri/radeon/radeon_chipset.h
@@ -344,6 +344,7 @@
 #define PCI_CHIP_RV770_9440             0x9440
 #define PCI_CHIP_RV770_9441             0x9441
 #define PCI_CHIP_RV770_9442             0x9442
+#define PCI_CHIP_RV770_9443             0x9443
 #define PCI_CHIP_RV770_9444             0x9444
 #define PCI_CHIP_RV770_9446             0x9446
 #define PCI_CHIP_RV770_944A             0x944A
diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c
index ee0cbf65ca..e53eb0904d 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common.c
@@ -45,44 +45,17 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "main/glheader.h"
 #include "main/imports.h"
 #include "main/context.h"
-#include "main/arrayobj.h"
-#include "main/api_arrayelt.h"
 #include "main/enums.h"
-#include "main/colormac.h"
-#include "main/light.h"
 #include "main/framebuffer.h"
-#include "main/simple_list.h"
 #include "main/renderbuffer.h"
-#include "swrast/swrast.h"
-#include "vbo/vbo.h"
-#include "tnl/tnl.h"
-#include "tnl/t_pipeline.h"
-#include "swrast_setup/swrast_setup.h"
-
-#include "main/blend.h"
-#include "main/bufferobj.h"
-#include "main/buffers.h"
-#include "main/depth.h"
-#include "main/polygon.h"
-#include "main/shaders.h"
-#include "main/texstate.h"
-#include "main/varray.h"
-#include "glapi/dispatch.h"
-#include "swrast/swrast.h"
-#include "main/stencil.h"
-#include "main/matrix.h"
-#include "main/attrib.h"
-#include "main/enable.h"
-#include "main/viewport.h"
-
-#include "dri_util.h"
+#include "drivers/common/meta.h"
+
 #include "vblank.h"
 
 #include "radeon_common.h"
 #include "radeon_bocs_wrapper.h"
 #include "radeon_lock.h"
 #include "radeon_drm.h"
-#include "radeon_mipmap_tree.h"
 #include "radeon_queryobj.h"
 
 /**
@@ -91,7 +64,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  * 1 most output
  * 2 also print state alues
  */
-#define DEBUG_CMDBUF         0
+#define RADEON_CMDBUF         0
 
 /* =============================================================
  * Scissoring
@@ -312,31 +285,6 @@ void radeonPolygonStipplePreKMS( GLcontext *ctx, const GLubyte *mask )
    UNLOCK_HARDWARE( radeon );
 }
 
-void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask )
-{
-   radeonContextPtr radeon = RADEON_CONTEXT(ctx);
-   GLint i;
-   BATCH_LOCALS(radeon);
-
-   radeon_firevertices(radeon);
-
-   BEGIN_BATCH_NO_AUTOSTATE(35);
-
-   OUT_BATCH(CP_PACKET0(RADEON_RE_STIPPLE_ADDR, 0));
-   OUT_BATCH(0x00000000);
-
-   OUT_BATCH(CP_PACKET0_ONE(RADEON_RE_STIPPLE_DATA, 31));
-
-   /* Must flip pattern upside down.
-    */
-   for ( i = 31 ; i >= 0; i--) {
-      OUT_BATCH(((GLuint *) mask)[i]);
-   }
-
-   END_BATCH();
-}
-
-
 
 /* ================================================================
  * SwapBuffers with client-side throttling
@@ -521,7 +469,7 @@ void radeonCopyBuffer( __DRIdrawablePrivate *dPriv,
 
 	rfb = dPriv->driverPrivate;
 
-	if ( RADEON_DEBUG & DEBUG_IOCTL ) {
+	if ( RADEON_DEBUG & RADEON_IOCTL ) {
 		fprintf( stderr, "\n%s( %p )\n\n", __FUNCTION__, (void *) rmesa->glCtx );
 	}
 
@@ -615,7 +563,7 @@ static GLboolean radeonPageFlip( __DRIdrawablePrivate *dPriv )
 
 	LOCK_HARDWARE(radeon);
 
-	if ( RADEON_DEBUG & DEBUG_IOCTL ) {
+	if ( RADEON_DEBUG & RADEON_IOCTL ) {
 		fprintf(stderr, "%s: pfCurrentPage: %d %d\n", __FUNCTION__,
 			radeon->sarea->pfCurrentPage, radeon->sarea->pfState);
 	}
@@ -875,7 +823,7 @@ void radeon_draw_buffer(GLcontext *ctx, struct gl_framebuffer *fb)
  */
 void radeonDrawBuffer( GLcontext *ctx, GLenum mode )
 {
-	if (RADEON_DEBUG & DEBUG_DRI)
+	if (RADEON_DEBUG & RADEON_DRI)
 		fprintf(stderr, "%s %s\n", __FUNCTION__,
 			_mesa_lookup_enum_by_nr( mode ));
 
@@ -981,7 +929,7 @@ static void radeon_print_state_atom_prekmm(radeonContextPtr radeon, struct radeo
 
 	fprintf(stderr, "  emit %s %d/%d\n", state->name, dwords, state->cmd_size);
 
-	if (DEBUG_CMDBUF > 1 && RADEON_DEBUG & DEBUG_VERBOSE) {
+	if (radeon_is_debug_enabled(RADEON_STATE, RADEON_TRACE)) {
 		if (dwords > state->cmd_size)
 			dwords = state->cmd_size;
 
@@ -1006,7 +954,7 @@ static void radeon_print_state_atom(radeonContextPtr radeon, struct radeon_state
 	int i, j, reg, count;
 	int dwords;
 	uint32_t packet0;
-	if (! (DEBUG_CMDBUF && RADEON_DEBUG & DEBUG_STATE) )
+	if (!radeon_is_debug_enabled(RADEON_STATE, RADEON_VERBOSE) )
 		return;
 
 	if (!radeon->radeonScreen->kernel_mm) {
@@ -1018,7 +966,7 @@ static void radeon_print_state_atom(radeonContextPtr radeon, struct radeon_state
 
 	fprintf(stderr, "  emit %s %d/%d\n", state->name, dwords, state->cmd_size);
 
-	if (DEBUG_CMDBUF > 1 && RADEON_DEBUG & DEBUG_VERBOSE) {
+	if (radeon_is_debug_enabled(RADEON_STATE, RADEON_TRACE)) {
 		if (dwords > state->cmd_size)
 			dwords = state->cmd_size;
 		for (i = 0; i < dwords;) {
@@ -1046,17 +994,15 @@ GLuint radeonCountStateEmitSize(radeonContextPtr radeon)
 	struct radeon_state_atom *atom;
 	GLuint dwords = 0;
 	/* check if we are going to emit full state */
-	if (DEBUG_CMDBUF && RADEON_DEBUG & DEBUG_VERBOSE)
-		fprintf(stderr, "%s\n", __func__);
 
 	if (radeon->cmdbuf.cs->cdw && !radeon->hw.all_dirty) {
 		if (!radeon->hw.is_dirty)
-			return dwords;
+			goto out;
 		foreach(atom, &radeon->hw.atomlist) {
 			if (atom->dirty) {
 				const GLuint atom_size = atom->check(radeon->glCtx, atom);
 				dwords += atom_size;
-				if (DEBUG_CMDBUF && atom_size) {
+				if (RADEON_CMDBUF && atom_size) {
 					radeon_print_state_atom(radeon, atom);
 				}
 			}
@@ -1065,12 +1011,14 @@ GLuint radeonCountStateEmitSize(radeonContextPtr radeon)
 		foreach(atom, &radeon->hw.atomlist) {
 			const GLuint atom_size = atom->check(radeon->glCtx, atom);
 			dwords += atom_size;
-			if (DEBUG_CMDBUF && atom_size) {
+			if (RADEON_CMDBUF && atom_size) {
 				radeon_print_state_atom(radeon, atom);
 			}
 
 		}
 	}
+out:
+	radeon_print(RADEON_STATE, RADEON_NORMAL, "%s %u\n", __func__, dwords);
 	return dwords;
 }
 
@@ -1092,10 +1040,7 @@ static INLINE void radeon_emit_atom(radeonContextPtr radeon, struct radeon_state
 			END_BATCH();
 		}
 	} else {
-		if (DEBUG_CMDBUF && RADEON_DEBUG & DEBUG_STATE) {
-			fprintf(stderr, "  skip state %s\n",
-					atom->name);
-		}
+		radeon_print(RADEON_STATE, RADEON_VERBOSE, "  skip state %s\n", atom->name);
 	}
 	atom->dirty = GL_FALSE;
 
@@ -1135,8 +1080,7 @@ static GLboolean radeon_revalidate_bos(GLcontext *ctx)
 
 void radeonEmitState(radeonContextPtr radeon)
 {
-	if (RADEON_DEBUG & (DEBUG_STATE|DEBUG_PRIMS))
-		fprintf(stderr, "%s\n", __FUNCTION__);
+	radeon_print(RADEON_STATE, RADEON_NORMAL, "%s\n", __FUNCTION__);
 
 	if (radeon->vtbl.pre_emit_state)
 		radeon->vtbl.pre_emit_state(radeon);
@@ -1146,13 +1090,13 @@ void radeonEmitState(radeonContextPtr radeon)
 		return;
 
 	if (!radeon->cmdbuf.cs->cdw) {
-		if (RADEON_DEBUG & DEBUG_STATE)
+		if (RADEON_DEBUG & RADEON_STATE)
 			fprintf(stderr, "Begin reemit state\n");
 
 		radeonEmitAtoms(radeon, GL_TRUE);
 	} else {
 
-		if (RADEON_DEBUG & DEBUG_STATE)
+		if (RADEON_DEBUG & RADEON_STATE)
 			fprintf(stderr, "Begin dirty state\n");
 
 		radeonEmitAtoms(radeon, GL_FALSE);
@@ -1166,7 +1110,7 @@ void radeonEmitState(radeonContextPtr radeon)
 void radeonFlush(GLcontext *ctx)
 {
 	radeonContextPtr radeon = RADEON_CONTEXT(ctx);
-	if (RADEON_DEBUG & DEBUG_IOCTL)
+	if (RADEON_DEBUG & RADEON_IOCTL)
 		fprintf(stderr, "%s %d\n", __FUNCTION__, radeon->cmdbuf.cs->cdw);
 
 	/* okay if we have no cmds in the buffer &&
@@ -1258,7 +1202,7 @@ int rcommonFlushCmdBufLocked(radeonContextPtr rmesa, const char *caller)
 	}
 	rmesa->cmdbuf.flushing = 1;
 
-	if (RADEON_DEBUG & DEBUG_IOCTL) {
+	if (RADEON_DEBUG & RADEON_IOCTL) {
 		fprintf(stderr, "%s from %s - %i cliprects\n",
 			__FUNCTION__, caller, rmesa->numClipRects);
 	}
@@ -1327,15 +1271,13 @@ void rcommonInitCmdBuf(radeonContextPtr rmesa)
 	if (size > 64 * 256)
 		size = 64 * 256;
 
-	if (RADEON_DEBUG & (DEBUG_IOCTL | DEBUG_DMA)) {
-		fprintf(stderr, "sizeof(drm_r300_cmd_header_t)=%zd\n",
-			sizeof(drm_r300_cmd_header_t));
-		fprintf(stderr, "sizeof(drm_radeon_cmd_buffer_t)=%zd\n",
-			sizeof(drm_radeon_cmd_buffer_t));
-		fprintf(stderr,
+	radeon_print(RADEON_CS, RADEON_VERBOSE,
+			"sizeof(drm_r300_cmd_header_t)=%zd\n", sizeof(drm_r300_cmd_header_t));
+	radeon_print(RADEON_CS, RADEON_VERBOSE,
+			"sizeof(drm_radeon_cmd_buffer_t)=%zd\n", sizeof(drm_radeon_cmd_buffer_t));
+	radeon_print(RADEON_CS, RADEON_VERBOSE,
 			"Allocating %d bytes command buffer (max state is %d bytes)\n",
 			size * 4, rmesa->hw.max_state_size * 4);
-	}
 
 	if (rmesa->radeonScreen->kernel_mm) {
 		int fd = rmesa->radeonScreen->driScreen->fd;
@@ -1388,20 +1330,18 @@ void rcommonBeginBatch(radeonContextPtr rmesa, int n,
 		       int line)
 {
 	if (!rmesa->cmdbuf.cs->cdw && dostate) {
-		if (RADEON_DEBUG & DEBUG_IOCTL)
-			fprintf(stderr, "Reemit state after flush (from %s)\n", function);
+		radeon_print(RADEON_STATE, RADEON_NORMAL,
+				"Reemit state after flush (from %s)\n", function);
 		radeonEmitState(rmesa);
 	}
 	radeon_cs_begin(rmesa->cmdbuf.cs, n, file, function, line);
 
-        if (DEBUG_CMDBUF && RADEON_DEBUG & DEBUG_IOCTL)
-                fprintf(stderr, "BEGIN_BATCH(%d) at %d, from %s:%i\n",
+    radeon_print(RADEON_CS, RADEON_VERBOSE, "BEGIN_BATCH(%d) at %d, from %s:%i\n",
                         n, rmesa->cmdbuf.cs->cdw, function, line);
 
 }
 
 void radeonUserClear(GLcontext *ctx, GLuint mask)
 {
-   radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
-   meta_clear_tris(&rmesa->meta, mask);
+   _mesa_meta_clear(ctx, mask);
 }
diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h
index ba983e5ab6..f3201911ac 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common.h
@@ -10,7 +10,6 @@ void radeonRecalcScissorRects(radeonContextPtr radeon);
 void radeonSetCliprects(radeonContextPtr radeon);
 void radeonUpdateScissor( GLcontext *ctx );
 void radeonScissor(GLcontext* ctx, GLint x, GLint y, GLsizei w, GLsizei h);
-void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask );
 void radeonPolygonStipplePreKMS( GLcontext *ctx, const GLubyte *mask );
 
 void radeonWaitForIdleLocked(radeonContextPtr radeon);
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c
index b76efa8eaa..71ee06d9a7 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c
@@ -363,7 +363,7 @@ GLboolean radeonUnbindContext(__DRIcontextPrivate * driContextPriv)
 {
 	radeonContextPtr radeon = (radeonContextPtr) driContextPriv->driverPrivate;
 
-	if (RADEON_DEBUG & DEBUG_DRI)
+	if (RADEON_DEBUG & RADEON_DRI)
 		fprintf(stderr, "%s ctx %p\n", __FUNCTION__,
 			radeon->glCtx);
 
@@ -527,7 +527,7 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
 	char *regname;
 	struct radeon_bo *depth_bo = NULL, *bo;
 
-	if (RADEON_DEBUG & DEBUG_DRI)
+	if (RADEON_DEBUG & RADEON_DRI)
 	    fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
 
 	draw = drawable->driverPrivate;
@@ -654,7 +654,7 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
 				continue;
 		}
 
-		if (RADEON_DEBUG & DEBUG_DRI)
+		if (RADEON_DEBUG & RADEON_DRI)
 			fprintf(stderr,
 				"attaching buffer %s, %d, at %d, cpp %d, pitch %d\n",
 				regname, buffers[i].name, buffers[i].attachment,
@@ -667,7 +667,7 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
 		rb->has_surface = 0;
 
 		if (buffers[i].attachment == __DRI_BUFFER_STENCIL && depth_bo) {
-			if (RADEON_DEBUG & DEBUG_DRI)
+			if (RADEON_DEBUG & RADEON_DRI)
 				fprintf(stderr, "(reusing depth buffer as stencil)\n");
 			bo = depth_bo;
 			radeon_bo_ref(bo);
@@ -740,7 +740,7 @@ GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv,
 	struct gl_framebuffer *readfb;
 
 	if (!driContextPriv) {
-		if (RADEON_DEBUG & DEBUG_DRI)
+		if (RADEON_DEBUG & RADEON_DRI)
 			fprintf(stderr, "%s ctx is null\n", __FUNCTION__);
 		_mesa_make_current(NULL, NULL, NULL);
 		return GL_TRUE;
@@ -762,7 +762,7 @@ GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv,
 		radeon_make_renderbuffer_current(radeon, drfb);
 	}
 
-	if (RADEON_DEBUG & DEBUG_DRI)
+	if (RADEON_DEBUG & RADEON_DRI)
 	     fprintf(stderr, "%s ctx %p dfb %p rfb %p\n", __FUNCTION__, radeon->glCtx, drfb, readfb);
 
 	driUpdateFramebufferSize(radeon->glCtx, driDrawPriv);
@@ -797,7 +797,7 @@ GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv,
 	}
 
 
-	if (RADEON_DEBUG & DEBUG_DRI)
+	if (RADEON_DEBUG & RADEON_DRI)
 		fprintf(stderr, "End %s\n", __FUNCTION__);
 
 	return GL_TRUE;
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
index 3463b4d264..0309345393 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h
@@ -8,6 +8,7 @@
 #include "tnl/t_context.h"
 #include "main/colormac.h"
 
+#include "radeon_debug.h"
 #include "radeon_screen.h"
 #include "radeon_drm.h"
 #include "dri_util.h"
@@ -18,22 +19,6 @@ struct radeon_context;
 
 #include "radeon_bocs_wrapper.h"
 
-/* From http://gcc. gnu.org/onlinedocs/gcc-3.2.3/gcc/Variadic-Macros.html .
-   I suppose we could inline this and use macro to fetch out __LINE__ and stuff in case we run into trouble
-   with other compilers ... GLUE!
-*/
-#define WARN_ONCE(a, ...)	{ \
-	static int warn##__LINE__=1; \
-	if(warn##__LINE__){ \
-		fprintf(stderr, "*********************************WARN_ONCE*********************************\n"); \
-		fprintf(stderr, "File %s function %s line %d\n", \
-			__FILE__, __FUNCTION__, __LINE__); \
-		fprintf(stderr,  a, ## __VA_ARGS__);\
-		fprintf(stderr, "***************************************************************************\n"); \
-		warn##__LINE__=0;\
-		} \
-	}
-
 /* This union is used to avoid warnings/miscompilation
    with float to uint32_t casts due to strict-aliasing */
 typedef union { GLfloat f; uint32_t ui32; } float_ui32_type;
@@ -401,23 +386,6 @@ struct radeon_dri_mirror {
 	int drmMinor;
 };
 
-#define DEBUG_TEXTURE	0x001
-#define DEBUG_STATE	0x002
-#define DEBUG_IOCTL	0x004
-#define DEBUG_PRIMS	0x008
-#define DEBUG_VERTS	0x010
-#define DEBUG_FALLBACKS	0x020
-#define DEBUG_VFMT	0x040
-#define DEBUG_CODEGEN	0x080
-#define DEBUG_VERBOSE	0x100
-#define DEBUG_DRI       0x200
-#define DEBUG_DMA       0x400
-#define DEBUG_SANITY    0x800
-#define DEBUG_SYNC      0x1000
-#define DEBUG_PIXEL     0x2000
-#define DEBUG_MEMORY    0x4000
-
-
 typedef void (*radeon_tri_func) (radeonContextPtr,
 				 radeonVertex *,
 				 radeonVertex *, radeonVertex *);
@@ -499,6 +467,8 @@ struct radeon_context {
 
    struct radeon_cmdbuf cmdbuf;
 
+   struct radeon_debug debug;
+
   drm_clip_rect_t fboRect;
   GLboolean constant_cliprect; /* use for FBO or DRI2 rendering */
   GLboolean front_cliprects;
@@ -621,15 +591,4 @@ GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv,
 			    __DRIdrawablePrivate * driReadPriv);
 extern void radeonDestroyContext(__DRIcontextPrivate * driContextPriv);
 
-/* ================================================================
- * Debugging:
- */
-#define DO_DEBUG		1
-
-#if DO_DEBUG
-extern int RADEON_DEBUG;
-#else
-#define RADEON_DEBUG		0
-#endif
-
 #endif
diff --git a/src/mesa/drivers/dri/radeon/radeon_context.c b/src/mesa/drivers/dri/radeon/radeon_context.c
index 32485a7270..8f4485aee7 100644
--- a/src/mesa/drivers/dri/radeon/radeon_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_context.c
@@ -137,25 +137,6 @@ static const struct tnl_pipeline_stage *radeon_pipeline[] = {
    NULL,
 };
 
-static const struct dri_debug_control debug_control[] =
-{
-    { "fall",  DEBUG_FALLBACKS },
-    { "tex",   DEBUG_TEXTURE },
-    { "ioctl", DEBUG_IOCTL },
-    { "prim",  DEBUG_PRIMS },
-    { "vert",  DEBUG_VERTS },
-    { "state", DEBUG_STATE },
-    { "code",  DEBUG_CODEGEN },
-    { "vfmt",  DEBUG_VFMT },
-    { "vtxf",  DEBUG_VFMT },
-    { "verb",  DEBUG_VERBOSE },
-    { "dri",   DEBUG_DRI },
-    { "dma",   DEBUG_DMA },
-    { "san",   DEBUG_SANITY },
-    { "sync",  DEBUG_SYNC },
-    { NULL,    0 }
-};
-
 static void r100_get_lock(radeonContextPtr radeon)
 {
    r100ContextPtr rmesa = (r100ContextPtr)radeon;
diff --git a/src/mesa/drivers/dri/radeon/radeon_context.h b/src/mesa/drivers/dri/radeon/radeon_context.h
index 572acbb006..4e2c52c835 100644
--- a/src/mesa/drivers/dri/radeon/radeon_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_context.h
@@ -299,6 +299,11 @@ struct radeon_texture_state {
 #define R100_QUERYOBJ_DATA_0 1
 #define R100_QUERYOBJ_CMDSIZE  2
 
+#define STP_CMD_0 0
+#define STP_DATA_0 1
+#define STP_CMD_1 2
+#define STP_STATE_SIZE 35
+
 struct r100_hw_state {
 	/* Hardware state, stored as cmdbuf commands:  
 	 *   -- Need to doublebuffer for
@@ -323,7 +328,7 @@ struct r100_hw_state {
 	struct radeon_state_atom fog;
 	struct radeon_state_atom glt;
 	struct radeon_state_atom txr[3];	/* for NPOT */
-
+	struct radeon_state_atom stp;
 };
 
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c
index 587e2acf91..f1addb299e 100644
--- a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c
+++ b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c
@@ -32,6 +32,7 @@
 #include <errno.h>
 
 #include "radeon_bocs_wrapper.h"
+#include "radeon_common.h"
 
 struct cs_manager_legacy {
     struct radeon_cs_manager    base;
diff --git a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.h b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.h
index e177b4bafe..cafbc9e576 100644
--- a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.h
+++ b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.h
@@ -32,7 +32,7 @@
 #ifndef RADEON_CS_LEGACY_H
 #define RADEON_CS_LEGACY_H
 
-#include "radeon_common.h"
+struct radeon_context;
 
 struct radeon_cs_manager *radeon_cs_manager_legacy_ctor(struct radeon_context *ctx);
 void radeon_cs_manager_legacy_dtor(struct radeon_cs_manager *csm);
diff --git a/src/mesa/drivers/dri/radeon/radeon_debug.c b/src/mesa/drivers/dri/radeon/radeon_debug.c
new file mode 100644
index 0000000000..a1ed39683f
--- /dev/null
+++ b/src/mesa/drivers/dri/radeon/radeon_debug.c
@@ -0,0 +1,101 @@
+/*
+ * Copyright © 2009 Pauli Nieminen
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ */
+/*
+ * Authors:
+ *      Pauli Nieminen <suokkos@gmail.com>
+ */
+
+#include "utils.h"
+
+#include "radeon_debug.h"
+#include "radeon_common_context.h"
+
+static const struct dri_debug_control debug_control[] = {
+	{"fall", RADEON_FALLBACKS},
+	{"tex", RADEON_TEXTURE},
+	{"ioctl", RADEON_IOCTL},
+	{"verts", RADEON_RENDER},
+	{"render", RADEON_RENDER},
+	{"swrender", RADEON_SWRENDER},
+	{"state", RADEON_STATE},
+	{"shader", RADEON_SHADER},
+	{"vfmt", RADEON_VFMT},
+	{"vtxf", RADEON_VFMT},
+	{"dri", RADEON_DRI},
+	{"dma", RADEON_DMA},
+	{"sanity", RADEON_SANITY},
+	{"sync", RADEON_SYNC},
+	{"pixel", RADEON_PIXEL},
+	{"mem", RADEON_MEMORY},
+	{"cs", RADEON_CS},
+	{"allmsg", ~RADEON_SYNC}, /* avoid the term "sync" because the parser uses strstr */
+	{NULL, 0}
+};
+
+radeon_debug_type_t radeon_enabled_debug_types;
+
+void radeon_init_debug(void)
+{
+	radeon_enabled_debug_types = driParseDebugString(getenv("RADEON_DEBUG"), debug_control);
+
+	radeon_enabled_debug_types |= RADEON_GENERAL;
+}
+
+void _radeon_debug_add_indent(void)
+{
+	GET_CURRENT_CONTEXT(ctx);
+	radeonContextPtr radeon = RADEON_CONTEXT(ctx);
+	const size_t length = sizeof(radeon->debug.indent)
+		/ sizeof(radeon->debug.indent[0]);
+	if (radeon->debug.indent_depth < length - 1) {
+		radeon->debug.indent[radeon->debug.indent_depth] = '\t';
+		++radeon->debug.indent_depth;
+	};
+}
+
+void _radeon_debug_remove_indent(void)
+{
+	GET_CURRENT_CONTEXT(ctx);
+	radeonContextPtr radeon = RADEON_CONTEXT(ctx);
+	if (radeon->debug.indent_depth > 0) {
+		radeon->debug.indent[radeon->debug.indent_depth] = '\0';
+		--radeon->debug.indent_depth;
+	}
+}
+
+extern void _radeon_print(const radeon_debug_type_t type,
+	   const radeon_debug_level_t level,
+	   const char* message,
+	   va_list values)
+{
+	GET_CURRENT_CONTEXT(ctx);
+	if (ctx) {
+		radeonContextPtr radeon = RADEON_CONTEXT(ctx);
+		// FIXME: Make this multi thread safe
+		if (radeon->debug.indent_depth)
+			fprintf(stderr, "%s", radeon->debug.indent);
+	}
+	vfprintf(stderr, message, values);
+}
diff --git a/src/mesa/drivers/dri/radeon/radeon_debug.h b/src/mesa/drivers/dri/radeon/radeon_debug.h
new file mode 100644
index 0000000000..132e27351d
--- /dev/null
+++ b/src/mesa/drivers/dri/radeon/radeon_debug.h
@@ -0,0 +1,191 @@
+/*
+ * Copyright © 2009 Pauli Nieminen
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ */
+/*
+ * Authors:
+ *      Pauli Nieminen <suokkos@gmail.com>
+ */
+
+#ifndef RADEON_DEBUG_H_INCLUDED
+#define RADEON_DEBUG_H_INCLUDED
+
+#include <stdarg.h>
+#include <stdio.h>
+
+typedef enum radeon_debug_levels {
+	RADEON_CRITICAL  = 0, /* Only errors */
+	RADEON_IMPORTANT = 1, /* Important warnings and messages */
+	RADEON_NORMAL    = 2, /* Normal log messages usefull for debugging */
+	RADEON_VERBOSE   = 3, /* Extra details to debugging */
+	RADEON_TRACE     = 4  /* Log about everything that happens */
+} radeon_debug_level_t;
+
+/**
+ * Compile time option to change level of debugging compiled to dri driver.
+ * Selecting critical level is not recommended because perfromance gains are
+ * going to minimal but you will lose a lot of important warnings in case of
+ * errors.
+ */
+#ifndef RADEON_DEBUG_LEVEL
+#define RADEON_DEBUG_LEVEL RADEON_VERBOSE
+#endif
+
+typedef enum radeon_debug_types {
+	RADEON_TEXTURE   = 0x00001,
+	RADEON_STATE     = 0x00002,
+	RADEON_IOCTL     = 0x00004,
+	RADEON_RENDER    = 0x00008,
+	RADEON_SWRENDER  = 0x00010,
+	RADEON_FALLBACKS = 0x00020,
+	RADEON_VFMT      = 0x00040,
+	RADEON_SHADER    = 0x00080,
+	RADEON_CS        = 0x00100,
+	RADEON_DRI       = 0x00200,
+	RADEON_DMA       = 0x00400,
+	RADEON_SANITY    = 0x00800,
+	RADEON_SYNC      = 0x01000,
+	RADEON_PIXEL     = 0x02000,
+	RADEON_MEMORY    = 0x04000,
+	RADEON_VERTS     = 0x08000,
+	RADEON_GENERAL   = 0x10000   /* Used for errors and warnings */
+} radeon_debug_type_t;
+
+#define RADEON_MAX_INDENT 5
+
+struct radeon_debug {
+       size_t indent_depth;
+       char indent[RADEON_MAX_INDENT];
+};
+
+extern radeon_debug_type_t radeon_enabled_debug_types;
+
+/**
+ * Compabibility layer for old debug code
+ **/
+#define RADEON_DEBUG radeon_enabled_debug_types
+
+static inline int radeon_is_debug_enabled(const radeon_debug_type_t type,
+	   const radeon_debug_level_t level)
+{
+       return RADEON_DEBUG_LEVEL >= level
+		&& (type & radeon_enabled_debug_types);
+}
+/*
+ * define macro for gcc specific __attribute__ if using alternative compiler
+ */
+#ifndef __GNUC__
+#define  __attribute__(x)  /*empty*/
+#endif
+
+
+extern void _radeon_print(const radeon_debug_type_t type,
+	   const radeon_debug_level_t level,
+	   const char* message,
+	   va_list values);
+/**
+ * Format attribute requires declaration for setting it. Don't ask me why!
+ */
+static inline void radeon_print(const radeon_debug_type_t type,
+	   const radeon_debug_level_t level,
+	   const char* message,
+	   ...) __attribute__((format(printf,3,4)));
+
+/**
+ * Print out debug message if channel specified by type is enabled
+ * and compile time debugging level is at least as high as level parameter
+ */
+static inline void radeon_print(const radeon_debug_type_t type,
+	   const radeon_debug_level_t level,
+	   const char* message,
+	   ...)
+{
+	/* Compile out if level of message is too high */
+	if (radeon_is_debug_enabled(type, level)) {
+
+		va_list values;
+		va_start( values, message );
+		_radeon_print(type, level, message, values);
+		va_end( values );
+	}
+}
+
+static inline void radeon_error(const char* message, ...)  __attribute__((format(printf,1,2)));
+/**
+ * printf style function for writing error messages.
+ */
+static inline void radeon_error(const char* message, ...)
+{
+       va_list values;
+       va_start( values, message );
+       radeon_print(RADEON_GENERAL, RADEON_CRITICAL, message, values);
+       va_end( values );
+}
+
+static inline void radeon_warning(const char* message, ...)  __attribute__((format(printf,1,2)));
+/**
+ * printf style function for writing warnings.
+ */
+static inline void radeon_warning(const char* message, ...)
+{
+       va_list values;
+       va_start( values, message );
+       radeon_print(RADEON_GENERAL, RADEON_IMPORTANT, message, values);
+       va_end( values );
+}
+
+extern void radeon_init_debug(void);
+extern void _radeon_debug_add_indent(void);
+extern void _radeon_debug_remove_indent(void);
+
+static inline void radeon_debug_add_indent(void)
+{
+       if (RADEON_DEBUG_LEVEL >= RADEON_VERBOSE) {
+	      _radeon_debug_add_indent();
+       }
+}
+static inline void radeon_debug_remove_indent(void)
+{
+       if (RADEON_DEBUG_LEVEL >= RADEON_VERBOSE) {
+	      _radeon_debug_remove_indent();
+       }
+}
+
+/* From http://gcc. gnu.org/onlinedocs/gcc-3.2.3/gcc/Variadic-Macros.html .
+   I suppose we could inline this and use macro to fetch out __LINE__ and stuff in case we run into trouble
+   with other compilers ... GLUE!
+*/
+#define WARN_ONCE(a, ...)      { \
+       static int warn##__LINE__=1; \
+       if(warn##__LINE__){ \
+               radeon_warning("*********************************WARN_ONCE*********************************\n"); \
+               radeon_warning("File %s function %s line %d\n", \
+                       __FILE__, __FUNCTION__, __LINE__); \
+               radeon_warning(  (a), ## __VA_ARGS__);\
+               radeon_warning("***************************************************************************\n"); \
+               warn##__LINE__=0;\
+               } \
+       }
+
+
+#endif
diff --git a/src/mesa/drivers/dri/radeon/radeon_dma.c b/src/mesa/drivers/dri/radeon/radeon_dma.c
index 386262b126..2eefa3f2b1 100644
--- a/src/mesa/drivers/dri/radeon/radeon_dma.c
+++ b/src/mesa/drivers/dri/radeon/radeon_dma.c
@@ -58,7 +58,7 @@ void radeonEmitVec4(uint32_t *out, const GLvoid * data, int stride, int count)
 {
 	int i;
 
-	if (RADEON_DEBUG & DEBUG_VERTS)
+	if (RADEON_DEBUG & RADEON_VERTS)
 		fprintf(stderr, "%s count %d stride %d out %p data %p\n",
 			__FUNCTION__, count, stride, (void *)out, (void *)data);
 
@@ -76,7 +76,7 @@ void radeonEmitVec8(uint32_t *out, const GLvoid * data, int stride, int count)
 {
 	int i;
 
-	if (RADEON_DEBUG & DEBUG_VERTS)
+	if (RADEON_DEBUG & RADEON_VERTS)
 		fprintf(stderr, "%s count %d stride %d out %p data %p\n",
 			__FUNCTION__, count, stride, (void *)out, (void *)data);
 
@@ -95,7 +95,7 @@ void radeonEmitVec12(uint32_t *out, const GLvoid * data, int stride, int count)
 {
 	int i;
 
-	if (RADEON_DEBUG & DEBUG_VERTS)
+	if (RADEON_DEBUG & RADEON_VERTS)
 		fprintf(stderr, "%s count %d stride %d out %p data %p\n",
 			__FUNCTION__, count, stride, (void *)out, (void *)data);
 
@@ -116,7 +116,7 @@ void radeonEmitVec16(uint32_t *out, const GLvoid * data, int stride, int count)
 {
 	int i;
 
-	if (RADEON_DEBUG & DEBUG_VERTS)
+	if (RADEON_DEBUG & RADEON_VERTS)
 		fprintf(stderr, "%s count %d stride %d out %p data %p\n",
 			__FUNCTION__, count, stride, (void *)out, (void *)data);
 
@@ -179,8 +179,8 @@ void radeonRefillCurrentDmaRegion(radeonContextPtr rmesa, int size)
 	if (size > rmesa->dma.minimum_size)
 		rmesa->dma.minimum_size = (size + 15) & (~15);
 
-	if (RADEON_DEBUG & (DEBUG_IOCTL | DEBUG_DMA))
-		fprintf(stderr, "%s\n", __FUNCTION__);
+	radeon_print(RADEON_DMA, RADEON_NORMAL, "%s size %d minimum_size %d\n",
+			__FUNCTION__, size, rmesa->dma.minimum_size);
 
 
 	/* unmap old reserved bo */
@@ -235,7 +235,7 @@ void radeonAllocDmaRegion(radeonContextPtr rmesa,
 			  struct radeon_bo **pbo, int *poffset,
 			  int bytes, int alignment)
 {
-	if (RADEON_DEBUG & DEBUG_IOCTL)
+	if (RADEON_DEBUG & RADEON_IOCTL)
 		fprintf(stderr, "%s %d\n", __FUNCTION__, bytes);
 
 	if (rmesa->dma.flush)
@@ -265,7 +265,7 @@ void radeonFreeDmaRegions(radeonContextPtr rmesa)
 {
 	struct radeon_dma_bo *dma_bo = CALLOC_STRUCT(radeon_dma_bo);
 	struct radeon_dma_bo *temp;
-	if (RADEON_DEBUG & DEBUG_DMA)
+	if (RADEON_DEBUG & RADEON_DMA)
 		fprintf(stderr, "%s\n", __FUNCTION__);
 
 	foreach_s(dma_bo, temp, &rmesa->dma.free) {
@@ -293,7 +293,7 @@ void radeonReturnDmaRegion(radeonContextPtr rmesa, int return_bytes)
 	if (is_empty_list(&rmesa->dma.reserved))
 		return;
 
-	if (RADEON_DEBUG & DEBUG_IOCTL)
+	if (RADEON_DEBUG & RADEON_IOCTL)
 		fprintf(stderr, "%s %d\n", __FUNCTION__, return_bytes);
 	rmesa->dma.current_used -= return_bytes;
 	rmesa->dma.current_vertexptr = rmesa->dma.current_used;
@@ -317,7 +317,7 @@ void radeonReleaseDmaRegions(radeonContextPtr rmesa)
 	const int expire_at = ++rmesa->dma.free.expire_counter + DMA_BO_FREE_TIME;
 	const int time = rmesa->dma.free.expire_counter;
 
-	if (RADEON_DEBUG & DEBUG_DMA) {
+	if (RADEON_DEBUG & RADEON_DMA) {
 		size_t free = 0,
 		       wait = 0,
 		       reserved = 0;
@@ -399,7 +399,7 @@ void rcommon_flush_last_swtcl_prim( GLcontext *ctx  )
 	struct radeon_dma *dma = &rmesa->dma;
 		
 
-	if (RADEON_DEBUG & DEBUG_IOCTL)
+	if (RADEON_DEBUG & RADEON_IOCTL)
 		fprintf(stderr, "%s\n", __FUNCTION__);
 	dma->flush = NULL;
 
@@ -425,7 +425,7 @@ rcommonAllocDmaLowVerts( radeonContextPtr rmesa, int nverts, int vsize )
 {
 	GLuint bytes = vsize * nverts;
 	void *head;
-	if (RADEON_DEBUG & DEBUG_IOCTL)
+	if (RADEON_DEBUG & RADEON_IOCTL)
 		fprintf(stderr, "%s\n", __FUNCTION__);
 	if(is_empty_list(&rmesa->dma.reserved)
 	      ||rmesa->dma.current_vertexptr + bytes > first_elem(&rmesa->dma.reserved)->bo->size) {
@@ -460,7 +460,7 @@ void radeonReleaseArrays( GLcontext *ctx, GLuint newinputs )
 {
    radeonContextPtr radeon = RADEON_CONTEXT( ctx );
    int i;
-	if (RADEON_DEBUG & DEBUG_IOCTL)
+	if (RADEON_DEBUG & RADEON_IOCTL)
 		fprintf(stderr, "%s\n", __FUNCTION__);
 
    if (radeon->dma.flush) {
diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c
index 6f0cc08770..d83b166742 100644
--- a/src/mesa/drivers/dri/radeon/radeon_fbo.c
+++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c
@@ -40,7 +40,7 @@
 #include "radeon_common.h"
 #include "radeon_mipmap_tree.h"
 
-#define FILE_DEBUG_FLAG DEBUG_TEXTURE
+#define FILE_DEBUG_FLAG RADEON_TEXTURE
 #define DBG(...) do {                                           \
         if (RADEON_DEBUG & FILE_DEBUG_FLAG)                      \
                 _mesa_printf(__VA_ARGS__);                      \
diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.c b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
index 9ced62418b..a0106d00fa 100644
--- a/src/mesa/drivers/dri/radeon/radeon_ioctl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
@@ -200,7 +200,7 @@ void radeonFlushElts( GLcontext *ctx )
    uint32_t *cmd = (uint32_t *)(rmesa->radeon.cmdbuf.cs->packets + rmesa->tcl.elt_cmd_start);
    int dwords = (rmesa->radeon.cmdbuf.cs->section_ndw - rmesa->radeon.cmdbuf.cs->section_cdw);
 
-   if (RADEON_DEBUG & DEBUG_IOCTL)
+   if (RADEON_DEBUG & RADEON_IOCTL)
       fprintf(stderr, "%s\n", __FUNCTION__);
 
    assert( rmesa->radeon.dma.flush == radeonFlushElts );
@@ -236,7 +236,7 @@ void radeonFlushElts( GLcontext *ctx )
 
    END_BATCH();
 
-   if (RADEON_DEBUG & DEBUG_SYNC) {
+   if (RADEON_DEBUG & RADEON_SYNC) {
       fprintf(stderr, "%s: Syncing\n", __FUNCTION__);
       radeonFinish( rmesa->radeon.glCtx );
    }
@@ -252,7 +252,7 @@ GLushort *radeonAllocEltsOpenEnded( r100ContextPtr rmesa,
    int align_min_nr;
    BATCH_LOCALS(&rmesa->radeon);
 
-   if (RADEON_DEBUG & DEBUG_IOCTL)
+   if (RADEON_DEBUG & RADEON_IOCTL)
       fprintf(stderr, "%s %d prim %x\n", __FUNCTION__, min_nr, primitive);
 
    assert((primitive & RADEON_CP_VC_CNTL_PRIM_WALK_IND));
@@ -296,7 +296,7 @@ GLushort *radeonAllocEltsOpenEnded( r100ContextPtr rmesa,
 
    retval = (GLushort *)(rmesa->radeon.cmdbuf.cs->packets + rmesa->tcl.elt_cmd_offset);
 
-   if (RADEON_DEBUG & DEBUG_PRIMS)
+   if (RADEON_DEBUG & RADEON_RENDER)
       fprintf(stderr, "%s: header prim %x \n",
 	      __FUNCTION__, primitive);
 
@@ -318,7 +318,7 @@ void radeonEmitVertexAOS( r100ContextPtr rmesa,
 #else
    BATCH_LOCALS(&rmesa->radeon);
 
-   if (RADEON_DEBUG & (DEBUG_PRIMS|DEBUG_IOCTL))
+   if (RADEON_DEBUG & (RADEON_PRIMS|DEBUG_IOCTL))
       fprintf(stderr, "%s:  vertex_size 0x%x offset 0x%x \n",
 	      __FUNCTION__, vertex_size, offset);
 
@@ -350,7 +350,7 @@ void radeonEmitAOS( r100ContextPtr rmesa,
    int sz = 1 + (nr >> 1) * 3 + (nr & 1) * 2;
    int i;
 
-   if (RADEON_DEBUG & DEBUG_IOCTL)
+   if (RADEON_DEBUG & RADEON_IOCTL)
       fprintf(stderr, "%s\n", __FUNCTION__);
 
    BEGIN_BATCH(sz+2+(nr * 2));
@@ -575,7 +575,7 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask )
    GLuint color_mask = 0;
    GLuint orig_mask = mask;
 
-   if ( RADEON_DEBUG & DEBUG_IOCTL ) {
+   if ( RADEON_DEBUG & RADEON_IOCTL ) {
       fprintf( stderr, "radeonClear\n");
    }
 
@@ -611,7 +611,7 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask )
    }
 
    if ( mask ) {
-      if (RADEON_DEBUG & DEBUG_FALLBACKS)
+      if (RADEON_DEBUG & RADEON_FALLBACKS)
 	 fprintf(stderr, "%s: swrast clear, mask: %x\n", __FUNCTION__, mask);
       _swrast_Clear( ctx, mask );
    }
diff --git a/src/mesa/drivers/dri/radeon/radeon_lighting.c b/src/mesa/drivers/dri/radeon/radeon_lighting.c
index ac3b94e4a6..ba444f2b10 100644
--- a/src/mesa/drivers/dri/radeon/radeon_lighting.c
+++ b/src/mesa/drivers/dri/radeon/radeon_lighting.c
@@ -195,7 +195,7 @@ void radeonUpdateMaterial( GLcontext *ctx )
    if (ctx->Light.ColorMaterialEnabled)
       mask &= ~ctx->Light.ColorMaterialBitmask;
 
-   if (RADEON_DEBUG & DEBUG_STATE)
+   if (RADEON_DEBUG & RADEON_STATE)
       fprintf(stderr, "%s\n", __FUNCTION__);
 
       
@@ -234,7 +234,7 @@ void radeonUpdateMaterial( GLcontext *ctx )
       check_twoside_fallback( ctx );
       update_global_ambient( ctx );
    }
-   else if (RADEON_DEBUG & (DEBUG_PRIMS|DEBUG_STATE))
+   else if (RADEON_DEBUG & (RADEON_PRIMS|DEBUG_STATE))
       fprintf(stderr, "%s: Elided noop material call\n", __FUNCTION__);
 }
 
@@ -624,7 +624,7 @@ static void radeonLightingSpaceChange( GLcontext *ctx )
    GLboolean tmp;
    RADEON_STATECHANGE( rmesa, tcl );
 
-   if (RADEON_DEBUG & DEBUG_STATE)
+   if (RADEON_DEBUG & RADEON_STATE)
       fprintf(stderr, "%s %d\n", __FUNCTION__, ctx->_NeedEyeCoords);
 
    if (ctx->_NeedEyeCoords)
diff --git a/src/mesa/drivers/dri/radeon/radeon_lock.c b/src/mesa/drivers/dri/radeon/radeon_lock.c
index 6294b7e42b..02de8e5fd1 100644
--- a/src/mesa/drivers/dri/radeon/radeon_lock.c
+++ b/src/mesa/drivers/dri/radeon/radeon_lock.c
@@ -131,7 +131,7 @@ void radeon_lock_hardware(radeonContextPtr radeon
 		if (ATOMIC_INC_AND_FETCH(radeon->dri.hwLockCount) > 1)
 		{
 #ifndef NDEBUG
-			if ( RADEON_DEBUG & DEBUG_SANITY )
+			if ( RADEON_DEBUG & RADEON_SANITY )
 				fprintf(stderr, "*** %d times of recursive call to %s ***\n"
 						"Original call was from %s (file: %s line: %d)\n"
 						"Now call is coming from %s (file: %s line: %d)\n"
diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c b/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
index 7c6ea0530e..08e1c5d00d 100644
--- a/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
+++ b/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
@@ -56,7 +56,7 @@ static void emit_vecfog(GLcontext *ctx, struct radeon_aos *aos,
    int size = 1;
    radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
 
-   if (RADEON_DEBUG & DEBUG_VERTS)
+   if (RADEON_DEBUG & RADEON_VERTS)
       fprintf(stderr, "%s count %d stride %d\n",
 	      __FUNCTION__, count, stride);
 
@@ -87,7 +87,7 @@ static void emit_vecfog(GLcontext *ctx, struct radeon_aos *aos,
 static void emit_s0_vec(uint32_t *out, GLvoid *data, int stride, int count)
 {
    int i;
-   if (RADEON_DEBUG & DEBUG_VERTS)
+   if (RADEON_DEBUG & RADEON_VERTS)
       fprintf(stderr, "%s count %d stride %d\n",
 	      __FUNCTION__, count, stride);
 
@@ -103,7 +103,7 @@ static void emit_stq_vec(uint32_t *out, GLvoid *data, int stride, int count)
 {
    int i;
 
-   if (RADEON_DEBUG & DEBUG_VERTS)
+   if (RADEON_DEBUG & RADEON_VERTS)
       fprintf(stderr, "%s count %d stride %d\n",
 	      __FUNCTION__, count, stride);
 
@@ -126,7 +126,7 @@ static void emit_tex_vector(GLcontext *ctx, struct radeon_aos *aos,
    int emitsize;
    uint32_t *out;
 
-   if (RADEON_DEBUG & DEBUG_VERTS)
+   if (RADEON_DEBUG & RADEON_VERTS)
       fprintf(stderr, "%s %d/%d\n", __FUNCTION__, count, size);
 
    switch (size) {
@@ -188,7 +188,7 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
    GLuint vtx, unit;
    
 #if 0
-   if (RADEON_DEBUG & DEBUG_VERTS) 
+   if (RADEON_DEBUG & RADEON_VERTS)
       _tnl_print_vert_flags( __FUNCTION__, inputs );
 #endif
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h b/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h
index 034cda8a65..515783135d 100644
--- a/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h
+++ b/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h
@@ -54,8 +54,7 @@ static void TAG(emit)( GLcontext *ctx,
 
    union emit_union *v = (union emit_union *)dest;
 
-   if (RADEON_DEBUG & DEBUG_VERTS)
-      fprintf(stderr, "%s\n", __FUNCTION__); 
+   radeon_print(RADEON_SWRENDER, RADEON_VERBOSE, "%s\n", __FUNCTION__);
 
    coord = (GLuint (*)[4])VB->ObjPtr->data;
    coord_stride = VB->ObjPtr->stride;
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index eba9f5857f..38db305e2a 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -121,7 +121,7 @@ static void compute_tex_image_offset(radeonContextPtr rmesa, radeon_mipmap_tree
 	lvl->faces[face].offset = *curOffset;
 	*curOffset += lvl->size;
 
-	if (RADEON_DEBUG & DEBUG_TEXTURE)
+	if (RADEON_DEBUG & RADEON_TEXTURE)
 	  fprintf(stderr,
 		  "level %d, face %d: rs:%d %dx%d at %d\n",
 		  level, face, lvl->rowstride, lvl->width, lvl->height, lvl->faces[face].offset);
@@ -190,13 +190,14 @@ static void calculate_miptree_layout_r300(radeonContextPtr rmesa, radeon_mipmap_
  * Create a new mipmap tree, calculate its layout and allocate memory.
  */
 radeon_mipmap_tree* radeon_miptree_create(radeonContextPtr rmesa, radeonTexObj *t,
-		GLenum target, GLuint firstLevel, GLuint lastLevel,
+		GLenum target, GLenum internal_format, GLuint firstLevel, GLuint lastLevel,
 		GLuint width0, GLuint height0, GLuint depth0,
 		GLuint bpp, GLuint tilebits, GLuint compressed)
 {
 	radeon_mipmap_tree *mt = CALLOC_STRUCT(_radeon_mipmap_tree);
 
 	mt->radeon = rmesa;
+	mt->internal_format = internal_format;
 	mt->refcount = 1;
 	mt->t = t;
 	mt->target = target;
@@ -318,8 +319,8 @@ GLboolean radeon_miptree_matches_image(radeon_mipmap_tree *mt,
 	if (face >= mt->faces || level < mt->firstLevel || level > mt->lastLevel)
 		return GL_FALSE;
 
-	if ((!texImage->IsCompressed && mt->compressed) ||
-	    (texImage->IsCompressed && !mt->compressed))
+	if (texImage->InternalFormat != mt->internal_format ||
+	    texImage->IsCompressed != mt->compressed)
 		return GL_FALSE;
 
 	if (!texImage->IsCompressed &&
@@ -369,9 +370,9 @@ GLboolean radeon_miptree_matches_texture(radeon_mipmap_tree *mt, struct gl_textu
  * given image in the given position.
  */
 void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t,
-		struct gl_texture_image *texImage, GLuint face, GLuint level)
+		radeon_texture_image *image, GLuint face, GLuint level)
 {
-	GLuint compressed = texImage->IsCompressed ? texImage->TexFormat->MesaFormat : 0;
+	GLuint compressed = image->base.IsCompressed ? image->base.TexFormat->MesaFormat : 0;
 	GLuint numfaces = 1;
 	GLuint firstLevel, lastLevel;
 
@@ -385,9 +386,10 @@ void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t,
 		return;
 
 	t->mt = radeon_miptree_create(rmesa, t, t->base.Target,
+		image->base.InternalFormat,
 		firstLevel, lastLevel,
-		texImage->Width, texImage->Height, texImage->Depth,
-		texImage->TexFormat->TexelBytes, t->tile_bits, compressed);
+		image->base.Width, image->base.Height, image->base.Depth,
+		image->base.TexFormat->TexelBytes, t->tile_bits, compressed);
 }
 
 /* Although we use the image_offset[] array to store relative offsets
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
index 7ece688493..db28252da3 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
@@ -67,6 +67,7 @@ struct _radeon_mipmap_tree {
 	GLuint totalsize; /** total size of the miptree, in bytes */
 
 	GLenum target; /** GL_TEXTURE_xxx */
+	GLenum internal_format;
 	GLuint faces; /** # of faces: 6 for cubemaps, 1 otherwise */
 	GLuint firstLevel; /** First mip level stored in this mipmap tree */
 	GLuint lastLevel; /** Last mip level stored in this mipmap tree */
@@ -83,7 +84,7 @@ struct _radeon_mipmap_tree {
 };
 
 radeon_mipmap_tree* radeon_miptree_create(radeonContextPtr rmesa, radeonTexObj *t,
-		GLenum target, GLuint firstLevel, GLuint lastLevel,
+		GLenum target, GLenum internal_format, GLuint firstLevel, GLuint lastLevel,
 		GLuint width0, GLuint height0, GLuint depth0,
 		GLuint bpp, GLuint tilebits, GLuint compressed);
 void radeon_miptree_reference(radeon_mipmap_tree *mt);
@@ -93,7 +94,7 @@ GLboolean radeon_miptree_matches_image(radeon_mipmap_tree *mt,
 		struct gl_texture_image *texImage, GLuint face, GLuint level);
 GLboolean radeon_miptree_matches_texture(radeon_mipmap_tree *mt, struct gl_texture_object *texObj);
 void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t,
-			      struct gl_texture_image *texImage, GLuint face, GLuint level);
+			      radeon_texture_image *texImage, GLuint face, GLuint level);
 GLuint radeon_miptree_image_offset(radeon_mipmap_tree *mt,
 				   GLuint face, GLuint level);
 void radeon_miptree_depth_offsets(radeon_mipmap_tree *mt, GLuint level, GLuint *offsets);
diff --git a/src/mesa/drivers/dri/radeon/radeon_queryobj.c b/src/mesa/drivers/dri/radeon/radeon_queryobj.c
index 7eef4faaf6..b79d864ba2 100644
--- a/src/mesa/drivers/dri/radeon/radeon_queryobj.c
+++ b/src/mesa/drivers/dri/radeon/radeon_queryobj.c
@@ -26,12 +26,11 @@
  */
 #include "radeon_common.h"
 #include "radeon_queryobj.h"
+#include "radeon_debug.h"
 
 #include "main/imports.h"
 #include "main/simple_list.h"
 
-#define DDEBUG 0
-
 static int radeonQueryIsFlushed(GLcontext *ctx, struct gl_query_object *q)
 {
 	radeonContextPtr radeon = RADEON_CONTEXT(ctx);
@@ -52,7 +51,9 @@ static void radeonQueryGetResult(GLcontext *ctx, struct gl_query_object *q)
 	uint32_t *result;
 	int i;
 
-	if (DDEBUG) fprintf(stderr, "%s: query id %d, result %d\n", __FUNCTION__, query->Base.Id, (int) query->Base.Result);
+	radeon_print(RADEON_STATE, RADEON_VERBOSE,
+			"%s: query id %d, result %d\n",
+			__FUNCTION__, query->Base.Id, (int) query->Base.Result);
 
 	radeon_bo_map(query->bo, GL_FALSE);
 
@@ -61,7 +62,7 @@ static void radeonQueryGetResult(GLcontext *ctx, struct gl_query_object *q)
 	query->Base.Result = 0;
 	for (i = 0; i < query->curr_offset/sizeof(uint32_t); ++i) {
 		query->Base.Result += result[i];
-		if (DDEBUG) fprintf(stderr, "result[%d] = %d\n", i, result[i]);
+		radeon_print(RADEON_STATE, RADEON_TRACE, "result[%d] = %d\n", i, result[i]);
 	}
 
 	radeon_bo_unmap(query->bo);
@@ -78,7 +79,7 @@ static struct gl_query_object * radeonNewQueryObject(GLcontext *ctx, GLuint id)
 	query->Base.Active = GL_FALSE;
 	query->Base.Ready = GL_TRUE;
 
-	if (DDEBUG) fprintf(stderr, "%s: query id %d\n", __FUNCTION__, query->Base.Id);
+	radeon_print(RADEON_STATE, RADEON_VERBOSE,"%s: query id %d\n", __FUNCTION__, query->Base.Id);
 
 	return &query->Base;
 }
@@ -87,7 +88,7 @@ static void radeonDeleteQuery(GLcontext *ctx, struct gl_query_object *q)
 {
 	struct radeon_query_object *query = (struct radeon_query_object *)q;
 
-	if (DDEBUG) fprintf(stderr, "%s: query id %d\n", __FUNCTION__, q->Id);
+	radeon_print(RADEON_STATE, RADEON_NORMAL, "%s: query id %d\n", __FUNCTION__, q->Id);
 
 	if (query->bo) {
 		radeon_bo_unref(query->bo);
@@ -104,7 +105,7 @@ static void radeonWaitQuery(GLcontext *ctx, struct gl_query_object *q)
 	if (!radeonQueryIsFlushed(ctx, q))
 		ctx->Driver.Flush(ctx);
 
-	if (DDEBUG) fprintf(stderr, "%s: query id %d, bo %p, offset %d\n", __FUNCTION__, q->Id, query->bo, query->curr_offset);
+	radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s: query id %d, bo %p, offset %d\n", __FUNCTION__, q->Id, query->bo, query->curr_offset);
 
 	radeonQueryGetResult(ctx, q);
 
@@ -117,7 +118,7 @@ static void radeonBeginQuery(GLcontext *ctx, struct gl_query_object *q)
 	radeonContextPtr radeon = RADEON_CONTEXT(ctx);
 	struct radeon_query_object *query = (struct radeon_query_object *)q;
 
-	if (DDEBUG) fprintf(stderr, "%s: query id %d\n", __FUNCTION__, q->Id);
+	radeon_print(RADEON_STATE, RADEON_NORMAL, "%s: query id %d\n", __FUNCTION__, q->Id);
 
 	assert(radeon->query.current == NULL);
 
@@ -132,6 +133,7 @@ static void radeonBeginQuery(GLcontext *ctx, struct gl_query_object *q)
 	radeon->query.current = query;
 
 	radeon->query.queryobj.dirty = GL_TRUE;
+	radeon->hw.is_dirty = GL_TRUE;
 	insert_at_tail(&radeon->query.not_flushed_head, query);
 
 }
@@ -147,7 +149,7 @@ void radeonEmitQueryEnd(GLcontext *ctx)
 	if (query->emitted_begin == GL_FALSE)
 		return;
 
-	if (DDEBUG) fprintf(stderr, "%s: query id %d, bo %p, offset %d\n", __FUNCTION__, query->Base.Id, query->bo, query->curr_offset);
+	radeon_print(RADEON_STATE, RADEON_NORMAL, "%s: query id %d, bo %p, offset %d\n", __FUNCTION__, query->Base.Id, query->bo, query->curr_offset);
 
 	radeon_cs_space_check_with_bo(radeon->cmdbuf.cs,
 				      query->bo,
@@ -160,7 +162,7 @@ static void radeonEndQuery(GLcontext *ctx, struct gl_query_object *q)
 {
 	radeonContextPtr radeon = RADEON_CONTEXT(ctx);
 
-	if (DDEBUG) fprintf(stderr, "%s: query id %d\n", __FUNCTION__, q->Id);
+	radeon_print(RADEON_STATE, RADEON_NORMAL, "%s: query id %d\n", __FUNCTION__, q->Id);
 
 	if (radeon->dma.flush)
 		radeon->dma.flush(radeon->glCtx);
@@ -171,7 +173,7 @@ static void radeonEndQuery(GLcontext *ctx, struct gl_query_object *q)
 
 static void radeonCheckQuery(GLcontext *ctx, struct gl_query_object *q)
 {
-	if (DDEBUG) fprintf(stderr, "%s: query id %d\n", __FUNCTION__, q->Id);
+	radeon_print(RADEON_STATE, RADEON_TRACE, "%s: query id %d\n", __FUNCTION__, q->Id);
 
 #ifdef DRM_RADEON_GEM_BUSY
 	radeonContextPtr radeon = RADEON_CONTEXT(ctx);
diff --git a/src/mesa/drivers/dri/radeon/radeon_sanity.c b/src/mesa/drivers/dri/radeon/radeon_sanity.c
index bbed838b59..1ab570f507 100644
--- a/src/mesa/drivers/dri/radeon/radeon_sanity.c
+++ b/src/mesa/drivers/dri/radeon/radeon_sanity.c
@@ -44,11 +44,11 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define MORE_VERBOSE 1
 
 #if MORE_VERBOSE
-#define VERBOSE (RADEON_DEBUG & DEBUG_VERBOSE)
+#define VERBOSE (RADEON_DEBUG & RADEON_VERBOSE)
 #define NORMAL  (1)
 #else
 #define VERBOSE 0
-#define NORMAL  (RADEON_DEBUG & DEBUG_VERBOSE)
+#define NORMAL  (RADEON_DEBUG & RADEON_VERBOSE)
 #endif
 
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index e8b2dc89fe..5ffb55db5e 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -220,30 +220,6 @@ static const GLuint __driNConfigOptions = 17;
 
 extern const struct dri_extension gl_20_extension[];
 
-#ifndef RADEON_DEBUG
-
-static const struct dri_debug_control debug_control[] = {
-	{"fall", DEBUG_FALLBACKS},
-	{"tex", DEBUG_TEXTURE},
-	{"ioctl", DEBUG_IOCTL},
-	{"prim", DEBUG_PRIMS},
-	{"vert", DEBUG_VERTS},
-	{"state", DEBUG_STATE},
-	{"code", DEBUG_CODEGEN},
-	{"vfmt", DEBUG_VFMT},
-	{"vtxf", DEBUG_VFMT},
-	{"verb", DEBUG_VERBOSE},
-	{"dri", DEBUG_DRI},
-	{"dma", DEBUG_DMA},
-	{"san", DEBUG_SANITY},
-	{"sync", DEBUG_SYNC},
-	{"pix", DEBUG_PIXEL},
-	{"mem", DEBUG_MEMORY},
-	{"allmsg", ~DEBUG_SYNC}, /* avoid the term "sync" because the parser uses strstr */
-	{NULL, 0}
-};
-#endif /* RADEON_DEBUG */
-
 #endif /* RADEON_COMMON && defined(RADEON_COMMON_FOR_R300) */
 
 extern const struct dri_extension card_extensions[];
@@ -868,6 +844,7 @@ static int radeon_set_screen_flags(radeonScreenPtr screen, int device_id)
    case PCI_CHIP_RV770_9440:
    case PCI_CHIP_RV770_9441:
    case PCI_CHIP_RV770_9442:
+   case PCI_CHIP_RV770_9443:
    case PCI_CHIP_RV770_9444:
    case PCI_CHIP_RV770_9446:
    case PCI_CHIP_RV770_944A:
@@ -965,9 +942,8 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
       return NULL;
    }
 
-#if DO_DEBUG && RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
-	RADEON_DEBUG = driParseDebugString(getenv("RADEON_DEBUG"), debug_control);
-#endif
+   radeon_init_debug();
+
    /* parse information in __driConfigOptions */
    driParseOptionInfo (&screen->optionCache,
 		       __driConfigOptions, __driNConfigOptions);
@@ -1300,9 +1276,7 @@ radeonCreateScreen2(__DRIscreenPrivate *sPriv)
       return NULL;
    }
 
-#if DO_DEBUG && RADEON_COMMON && defined(RADEON_COMMON_FOR_R300)
-	RADEON_DEBUG = driParseDebugString(getenv("RADEON_DEBUG"), debug_control);
-#endif
+   radeon_init_debug();
 
    /* parse information in __driConfigOptions */
    driParseOptionInfo (&screen->optionCache,
@@ -1716,6 +1690,8 @@ __DRIconfig **radeonInitScreen2(__DRIscreenPrivate *psp)
    driInitSingleExtension( NULL, NV_vp_extension );
    driInitSingleExtension( NULL, ATI_fs_extension );
    driInitExtensions( NULL, point_extensions, GL_FALSE );
+#elif (defined(RADEON_COMMON_FOR_R300) || defined(RADEON_COMMON_FOR_R600))
+   driInitSingleExtension( NULL, gl_20_extension );
 #endif
 
    if (!radeonInitDriver(psp)) {
diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c
index e03551d666..4d0d35ee0c 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state.c
@@ -814,7 +814,7 @@ void radeonUpdateMaterial( GLcontext *ctx )
    if (ctx->Light.ColorMaterialEnabled)
       mask &= ~ctx->Light.ColorMaterialBitmask;
 
-   if (RADEON_DEBUG & DEBUG_STATE)
+   if (RADEON_DEBUG & RADEON_STATE)
       fprintf(stderr, "%s\n", __FUNCTION__);
 
 
@@ -1548,7 +1548,7 @@ static void radeonEnable( GLcontext *ctx, GLenum cap, GLboolean state )
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
    GLuint p, flag;
 
-   if ( RADEON_DEBUG & DEBUG_STATE )
+   if ( RADEON_DEBUG & RADEON_STATE )
       fprintf( stderr, "%s( %s = %s )\n", __FUNCTION__,
 	       _mesa_lookup_enum_by_nr( cap ),
 	       state ? "GL_TRUE" : "GL_FALSE" );
@@ -1842,7 +1842,7 @@ static void radeonLightingSpaceChange( GLcontext *ctx )
    GLboolean tmp;
    RADEON_STATECHANGE( rmesa, tcl );
 
-   if (RADEON_DEBUG & DEBUG_STATE)
+   if (RADEON_DEBUG & RADEON_STATE)
       fprintf(stderr, "%s %d BEFORE %x\n", __FUNCTION__, ctx->_NeedEyeCoords,
 	      rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL]);
 
@@ -1857,7 +1857,7 @@ static void radeonLightingSpaceChange( GLcontext *ctx )
       rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] &= ~RADEON_RESCALE_NORMALS;
    }
 
-   if (RADEON_DEBUG & DEBUG_STATE)
+   if (RADEON_DEBUG & RADEON_STATE)
       fprintf(stderr, "%s %d AFTER %x\n", __FUNCTION__, ctx->_NeedEyeCoords,
 	      rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL]);
 }
@@ -2197,6 +2197,22 @@ static void radeonWrapRunPipeline( GLcontext *ctx )
    }
 }
 
+static void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask )
+{
+   r100ContextPtr r100 = R100_CONTEXT(ctx);
+   GLint i;
+
+   radeon_firevertices(&r100->radeon);
+
+   RADEON_STATECHANGE(r100, stp);
+
+   /* Must flip pattern upside down.
+    */
+   for ( i = 31 ; i >= 0; i--) {
+     r100->hw.stp.cmd[3 + i] = ((GLuint *) mask)[i];
+   }
+}
+
 
 /* Initialize the driver's state functions.
  * Many of the ctx->Driver functions might have been initialized to
diff --git a/src/mesa/drivers/dri/radeon/radeon_state_init.c b/src/mesa/drivers/dri/radeon/radeon_state_init.c
index d014fb5c06..f3ad0dd17a 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state_init.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state_init.c
@@ -573,7 +573,7 @@ static void cube_emit_cs(GLcontext *ctx, struct radeon_state_atom *atom)
    for (j = 0; j < 5; j++) {
 	OUT_BATCH(CP_PACKET0(base_reg + (4 * j), 0));
 	OUT_BATCH_RELOC(lvl->faces[j].offset, t->mt->bo, lvl->faces[j].offset,
-			RADEON_GEM_DOMAIN_VRAM, 0, 0);
+			RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0);
    }
    END_BATCH();
 }
@@ -781,6 +781,10 @@ void radeonInitState( r100ContextPtr rmesa )
       ALLOC_STATE( ucp[5], tcl_ucp5, UCP_STATE_SIZE, "UCP/userclip-5", 1 );
    }
 
+   if (rmesa->radeon.radeonScreen->kernel_mm) {
+       ALLOC_STATE( stp, always, STP_STATE_SIZE, "STP/stp", 0 );
+   }
+   
    for (i = 0; i < 3; i++) {
       if (rmesa->radeon.radeonScreen->kernel_mm)
           rmesa->hw.tex[i].emit = tex_emit_cs;
@@ -873,6 +877,10 @@ void radeonInitState( r100ContextPtr rmesa )
    }
 
    if (rmesa->radeon.radeonScreen->kernel_mm) {
+      rmesa->hw.stp.cmd[STP_CMD_0] = CP_PACKET0(RADEON_RE_STIPPLE_ADDR, 0);
+      rmesa->hw.stp.cmd[STP_DATA_0] = 0;
+      rmesa->hw.stp.cmd[STP_CMD_1] = CP_PACKET0_ONE(RADEON_RE_STIPPLE_DATA, 31);
+
       rmesa->hw.grd.emit = scl_emit;
       rmesa->hw.fog.emit = vec_emit;
       rmesa->hw.glt.emit = vec_emit;
@@ -1143,7 +1151,7 @@ void radeonInitState( r100ContextPtr rmesa )
    rmesa->hw.eye.cmd[EYE_Y] = 0;
    rmesa->hw.eye.cmd[EYE_Z] = IEEE_ONE;
    rmesa->hw.eye.cmd[EYE_RESCALE_FACTOR] = IEEE_ONE;
-   
+
    if (rmesa->radeon.radeonScreen->kernel_mm) {
       radeon_init_query_stateobj(&rmesa->radeon, R100_QUERYOBJ_CMDSIZE);
       rmesa->radeon.query.queryobj.cmd[R100_QUERYOBJ_CMD_0] = CP_PACKET0(RADEON_RB3D_ZPASS_DATA, 0);
diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.c b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
index 32df569257..e61f59eaea 100644
--- a/src/mesa/drivers/dri/radeon/radeon_swtcl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
@@ -51,6 +51,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "radeon_state.h"
 #include "radeon_swtcl.h"
 #include "radeon_tcl.h"
+#include "radeon_debug.h"
 
 
 /* R100: xyzw, c0, c1/fog, stq[0..2]  = 4+1+1+3*3 = 15  right? */
@@ -214,9 +215,8 @@ static void radeonSetVertexFormat( GLcontext *ctx )
 			      NULL, 0 );
       rmesa->radeon.swtcl.vertex_size /= 4;
       RENDERINPUTS_COPY( rmesa->radeon.tnl_index_bitset, index_bitset );
-      if (RADEON_DEBUG & DEBUG_VERTS)
-	 fprintf( stderr, "%s: vertex_size= %d floats\n",
-		  __FUNCTION__, rmesa->radeon.swtcl.vertex_size);
+      radeon_print(RADEON_SWRENDER, RADEON_VERBOSE,
+	  "%s: vertex_size= %d floats\n",  __FUNCTION__, rmesa->radeon.swtcl.vertex_size);
    }
 }
 
@@ -420,8 +420,8 @@ static GLboolean radeon_run_render( GLcontext *ctx,
       if (!length)
 	 continue;
 
-      if (RADEON_DEBUG & DEBUG_PRIMS)
-	 fprintf(stderr, "radeon_render.c: prim %s %d..%d\n", 
+      radeon_print(RADEON_SWRENDER, RADEON_NORMAL,
+	  "radeon_render.c: prim %s %d..%d\n",
 		 _mesa_lookup_enum_by_nr(prim & PRIM_MODE_MASK), 
 		 start, start+length);
 
@@ -784,7 +784,7 @@ void radeonFallback( GLcontext *ctx, GLuint bit, GLboolean mode )
 	 TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_RASTER, GL_TRUE );
 	 _swsetup_Wakeup( ctx );
 	 rmesa->radeon.swtcl.RenderIndex = ~0;
-         if (RADEON_DEBUG & DEBUG_FALLBACKS) {
+         if (RADEON_DEBUG & RADEON_FALLBACKS) {
             fprintf(stderr, "Radeon begin rasterization fallback: 0x%x %s\n",
                     bit, getFallbackString(bit));
          }
@@ -815,7 +815,7 @@ void radeonFallback( GLcontext *ctx, GLuint bit, GLboolean mode )
 	    radeonChooseVertexState( ctx );
 	    radeonChooseRenderState( ctx );
 	 }
-         if (RADEON_DEBUG & DEBUG_FALLBACKS) {
+         if (RADEON_DEBUG & RADEON_FALLBACKS) {
             fprintf(stderr, "Radeon end rasterization fallback: 0x%x %s\n",
                     bit, getFallbackString(bit));
          }
diff --git a/src/mesa/drivers/dri/radeon/radeon_tcl.c b/src/mesa/drivers/dri/radeon/radeon_tcl.c
index 2404f28450..b334ea05e5 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tcl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tcl.c
@@ -587,7 +587,7 @@ static void transition_to_hwtnl( GLcontext *ctx )
    //      radeonReleaseDmaRegion( rmesa, &rmesa->swtcl.indexed_verts, 
    //			      __FUNCTION__ );
 
-   if (RADEON_DEBUG & DEBUG_FALLBACKS) 
+   if (RADEON_DEBUG & RADEON_FALLBACKS)
       fprintf(stderr, "Radeon end tcl fallback\n");
 }
 
@@ -624,7 +624,7 @@ void radeonTclFallback( GLcontext *ctx, GLuint bit, GLboolean mode )
    if (mode) {
       rmesa->radeon.TclFallback |= bit;
       if (oldfallback == 0) {
-	 if (RADEON_DEBUG & DEBUG_FALLBACKS) 
+	 if (RADEON_DEBUG & RADEON_FALLBACKS)
 	    fprintf(stderr, "Radeon begin tcl fallback %s\n",
 		    getFallbackString( bit ));
 	 transition_to_swtnl( ctx );
@@ -633,7 +633,7 @@ void radeonTclFallback( GLcontext *ctx, GLuint bit, GLboolean mode )
    else {
       rmesa->radeon.TclFallback &= ~bit;
       if (oldfallback == bit) {
-	 if (RADEON_DEBUG & DEBUG_FALLBACKS) 
+	 if (RADEON_DEBUG & RADEON_FALLBACKS)
 	    fprintf(stderr, "Radeon end tcl fallback %s\n",
 		    getFallbackString( bit ));
 	 transition_to_hwtnl( ctx );
diff --git a/src/mesa/drivers/dri/radeon/radeon_tex.c b/src/mesa/drivers/dri/radeon/radeon_tex.c
index 2549d5cb5c..99865fff27 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex.c
@@ -263,7 +263,7 @@ static void radeonTexEnv( GLcontext *ctx, GLenum target,
    GLuint unit = ctx->Texture.CurrentUnit;
    struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
 
-   if ( RADEON_DEBUG & DEBUG_STATE ) {
+   if ( RADEON_DEBUG & RADEON_STATE ) {
       fprintf( stderr, "%s( %s )\n",
 	       __FUNCTION__, _mesa_lookup_enum_by_nr( pname ) );
    }
@@ -325,10 +325,8 @@ static void radeonTexParameter( GLcontext *ctx, GLenum target,
 {
    radeonTexObj* t = radeon_tex_obj(texObj);
 
-   if ( RADEON_DEBUG & (DEBUG_STATE|DEBUG_TEXTURE) ) {
-      fprintf( stderr, "%s( %s )\n", __FUNCTION__,
+   radeon_print(RADEON_TEXTURE, RADEON_VERBOSE, "%s( %s )\n", __FUNCTION__,
 	       _mesa_lookup_enum_by_nr( pname ) );
-   }
 
    switch ( pname ) {
    case GL_TEXTURE_MIN_FILTER:
@@ -376,10 +374,9 @@ static void radeonDeleteTexture( GLcontext *ctx,
    radeonTexObj* t = radeon_tex_obj(texObj);
    int i;
 
-   if ( RADEON_DEBUG & (DEBUG_STATE|DEBUG_TEXTURE) ) {
-      fprintf( stderr, "%s( %p (target = %s) )\n", __FUNCTION__, (void *)texObj,
+   radeon_print(RADEON_TEXTURE, RADEON_NORMAL,
+	 "%s( %p (target = %s) )\n", __FUNCTION__, (void *)texObj,
 	       _mesa_lookup_enum_by_nr( texObj->Target ) );
-   }
 
    if ( rmesa ) {
      radeon_firevertices(&rmesa->radeon);
diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c
index c29105d7b8..9d252aa74c 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texstate.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c
@@ -277,7 +277,7 @@ static GLboolean radeonUpdateTextureEnv( GLcontext *ctx, int unit )
    assert( (texUnit->_ReallyEnabled == 0)
 	   || (texUnit->_Current != NULL) );
 
-   if ( RADEON_DEBUG & DEBUG_TEXTURE ) {
+   if ( RADEON_DEBUG & RADEON_TEXTURE ) {
       fprintf( stderr, "%s( %p, %d )\n", __FUNCTION__, (void *)ctx, unit );
    }
 
@@ -933,7 +933,7 @@ static GLboolean radeon_validate_texgen( GLcontext *ctx, GLuint unit )
 	    (texUnit->GenS.Mode != texUnit->GenQ.Mode)) ) {
 	 /* Mixed modes, fallback:
 	  */
-	 if (RADEON_DEBUG & DEBUG_FALLBACKS)
+	 if (RADEON_DEBUG & RADEON_FALLBACKS)
 	    fprintf(stderr, "fallback mixed texgen\n");
 	 return GL_FALSE;
       }
@@ -941,7 +941,7 @@ static GLboolean radeon_validate_texgen( GLcontext *ctx, GLuint unit )
    }
    else {
    /* some texgen mode not including both S and T bits */
-      if (RADEON_DEBUG & DEBUG_FALLBACKS)
+      if (RADEON_DEBUG & RADEON_FALLBACKS)
 	 fprintf(stderr, "fallback mixed texgen/nontexgen\n");
       return GL_FALSE;
    }
@@ -991,7 +991,7 @@ static GLboolean radeon_validate_texgen( GLcontext *ctx, GLuint unit )
    default:
       /* Unsupported mode, fallback:
        */
-      if (RADEON_DEBUG & DEBUG_FALLBACKS) 
+      if (RADEON_DEBUG & RADEON_FALLBACKS)
 	 fprintf(stderr, "fallback GL_SPHERE_MAP\n");
       return GL_FALSE;
    }
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c
index fa16f44c18..fad3d1ceda 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.c
@@ -579,7 +579,7 @@ static void radeon_teximage(
 	}
 
 	if (!t->mt)
-		radeon_try_alloc_miptree(rmesa, t, texImage, face, level);
+		radeon_try_alloc_miptree(rmesa, t, image, face, level);
 	if (t->mt && radeon_miptree_matches_image(t->mt, texImage, face, level)) {
 		radeon_mipmap_level *lvl;
 		image->mt = t->mt;
@@ -936,7 +936,7 @@ int radeon_validate_texture_miptree(GLcontext * ctx, struct gl_texture_object *t
 	if (t->validated || t->image_override)
 		return GL_TRUE;
 
-	if (RADEON_DEBUG & DEBUG_TEXTURE)
+	if (RADEON_DEBUG & RADEON_TEXTURE)
 		fprintf(stderr, "%s: Validating texture %p now\n", __FUNCTION__, texObj);
 
 	if (baseimage->base.Border > 0)
@@ -964,9 +964,9 @@ int radeon_validate_texture_miptree(GLcontext * ctx, struct gl_texture_object *t
 	}
 
 	if (!t->mt) {
-		if (RADEON_DEBUG & DEBUG_TEXTURE)
+		if (RADEON_DEBUG & RADEON_TEXTURE)
 			fprintf(stderr, " Allocate new miptree\n");
-		radeon_try_alloc_miptree(rmesa, t, &baseimage->base, 0, texObj->BaseLevel);
+		radeon_try_alloc_miptree(rmesa, t, baseimage, 0, texObj->BaseLevel);
 		if (!t->mt) {
 			_mesa_problem(ctx, "radeon_validate_texture failed to alloc miptree");
 			return GL_FALSE;
@@ -977,16 +977,16 @@ int radeon_validate_texture_miptree(GLcontext * ctx, struct gl_texture_object *t
 	for(face = 0; face < t->mt->faces; ++face) {
 		for(level = t->mt->firstLevel; level <= t->mt->lastLevel; ++level) {
 			radeon_texture_image *image = get_radeon_texture_image(texObj->Image[face][level]);
-			if (RADEON_DEBUG & DEBUG_TEXTURE)
+			if (RADEON_DEBUG & RADEON_TEXTURE)
 				fprintf(stderr, " face %i, level %i... %p vs %p ", face, level, t->mt, image->mt);
 			if (t->mt == image->mt) {
-				if (RADEON_DEBUG & DEBUG_TEXTURE)
+				if (RADEON_DEBUG & RADEON_TEXTURE)
 					fprintf(stderr, "OK\n");
 
 				continue;
 			}
 
-			if (RADEON_DEBUG & DEBUG_TEXTURE)
+			if (RADEON_DEBUG & RADEON_TEXTURE)
 				fprintf(stderr, "migrating\n");
 			migrate_image_to_miptree(t->mt, image, face, level);
 		}