diff options
author | Xiang, Haihao <haihao.xiang@intel.com> | 2008-04-22 16:25:23 +0800 |
---|---|---|
committer | Xiang, Haihao <haihao.xiang@intel.com> | 2008-04-22 16:25:23 +0800 |
commit | 6e620162a1b235ade227368b87fa993e844d7077 (patch) | |
tree | 9ddd71652d7f3ad5ddc9768689f769b3bc45a4cc /src/mesa/drivers/dri | |
parent | c9c64a100d5d0661fd672af040a68bd4e7292940 (diff) |
i965: fix DEPTH_TEXTURE_MODE (bug #14220)
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_emit.c | 3 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 14 |
2 files changed, 10 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c index a02f70a50c..4cda55914c 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_emit.c +++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c @@ -724,9 +724,6 @@ static void emit_tex( struct brw_wm_compile *c, responseLength, msgLength, 0); - - if (shadow) - brw_MOV(p, dst[3], brw_imm_f(1.0)); } diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index eff4555fdf..0d91391964 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -69,7 +69,7 @@ static GLuint translate_tex_target( GLenum target ) } -static GLuint translate_tex_format( GLuint mesa_format ) +static GLuint translate_tex_format( GLuint mesa_format, GLenum depth_mode ) { switch( mesa_format ) { case MESA_FORMAT_L8: @@ -114,7 +114,12 @@ static GLuint translate_tex_format( GLuint mesa_format ) return BRW_SURFACEFORMAT_FXT1; case MESA_FORMAT_Z16: - return BRW_SURFACEFORMAT_I16_UNORM; + if (depth_mode == GL_INTENSITY) + return BRW_SURFACEFORMAT_I16_UNORM; + else if (depth_mode == GL_ALPHA) + return BRW_SURFACEFORMAT_A16_UNORM; + else + return BRW_SURFACEFORMAT_L16_UNORM; case MESA_FORMAT_RGB_DXT1: return BRW_SURFACEFORMAT_DXT1_RGB; @@ -143,7 +148,7 @@ static GLuint translate_tex_format( GLuint mesa_format ) } struct brw_wm_surface_key { - GLenum target; + GLenum target, depthmode; dri_bo *bo; GLint format; GLint first_level, last_level; @@ -163,7 +168,7 @@ brw_create_texture_surface( struct brw_context *brw, surf.ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW; surf.ss0.surface_type = translate_tex_target(key->target); - surf.ss0.surface_format = translate_tex_format(key->format); + surf.ss0.surface_format = translate_tex_format(key->format, key->depthmode); /* This is ok for all textures with channel width 8bit or less: */ @@ -219,6 +224,7 @@ brw_update_texture_surface( GLcontext *ctx, GLuint unit ) memset(&key, 0, sizeof(key)); key.target = tObj->Target; + key.depthmode = tObj->DepthMode; key.format = firstImage->TexFormat->MesaFormat; key.bo = intelObj->mt->region->buffer; key.first_level = intelObj->firstLevel; |