diff options
author | Zack Rusin <zack@tungstengraphics.com> | 2007-12-11 07:19:11 -0500 |
---|---|---|
committer | Zack Rusin <zack@tungstengraphics.com> | 2007-12-11 07:39:06 -0500 |
commit | c474f1fb9088528af998168717783b52e5c2f0a2 (patch) | |
tree | d403522e2ad7f2e1110bb939c2c3e498df33206f /src/mesa/pipe/i965simple/brw_state_upload.c | |
parent | 12363674e5aa39b780020339038186b7715bd4b2 (diff) |
Port i965 driver to Gallium3D.
This is a squashed commit of i965 branch on
ssh://people.freedesktop.org/~zack/mesa
Because of the porting the branch often didn't compile so
squashing it makes more sense.
The port is still far from complete.
Diffstat (limited to 'src/mesa/pipe/i965simple/brw_state_upload.c')
-rw-r--r-- | src/mesa/pipe/i965simple/brw_state_upload.c | 231 |
1 files changed, 231 insertions, 0 deletions
diff --git a/src/mesa/pipe/i965simple/brw_state_upload.c b/src/mesa/pipe/i965simple/brw_state_upload.c new file mode 100644 index 0000000000..1ca7484958 --- /dev/null +++ b/src/mesa/pipe/i965simple/brw_state_upload.c @@ -0,0 +1,231 @@ +/* + Copyright (C) Intel Corp. 2006. All Rights Reserved. + Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to + develop this 3D driver. + + Permission is hereby granted, free of charge, to any person obtaining + a copy of this software and associated documentation files (the + "Software"), to deal in the Software without restriction, including + without limitation the rights to use, copy, modify, merge, publish, + distribute, sublicense, and/or sell copies of the Software, and to + permit persons to whom the Software is furnished to do so, subject to + the following conditions: + + The above copyright notice and this permission notice (including the + next paragraph) shall be included in all copies or substantial + portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE + LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + + **********************************************************************/ + /* + * Authors: + * Keith Whitwell <keith@tungstengraphics.com> + */ + + +#include "brw_context.h" +#include "brw_state.h" + +#include "pipe/p_util.h" + +/* This is used to initialize brw->state.atoms[]. We could use this + * list directly except for a single atom, brw_constant_buffer, which + * has a .dirty value which changes according to the parameters of the + * current fragment and vertex programs, and so cannot be a static + * value. + */ +const struct brw_tracked_state *atoms[] = +{ + &brw_wm_input_sizes, + &brw_vs_prog, + &brw_gs_prog, + &brw_clip_prog, + &brw_sf_prog, + &brw_wm_prog, + + /* Once all the programs are done, we know how large urb entry + * sizes need to be and can decide if we need to change the urb + * layout. + */ + &brw_curbe_offsets, + &brw_recalculate_urb_fence, + + + &brw_cc_vp, + &brw_cc_unit, + + &brw_wm_surfaces, /* must do before samplers */ + &brw_wm_samplers, + + &brw_wm_unit, + &brw_sf_vp, + &brw_sf_unit, + &brw_vs_unit, /* always required, enabled or not */ + &brw_clip_unit, + &brw_gs_unit, + + /* Command packets: + */ + &brw_invarient_state, + &brw_state_base_address, + &brw_pipe_control, + + &brw_binding_table_pointers, + &brw_blend_constant_color, + + &brw_drawing_rect, + &brw_depthbuffer, + + &brw_polygon_stipple, + &brw_polygon_stipple_offset, + + &brw_line_stipple, + + &brw_psp_urb_cbs, + + + NULL, /* brw_constant_buffer */ +}; + + +void brw_init_state( struct brw_context *brw ) +{ + unsigned i; + + brw_init_pools(brw); + brw_init_caches(brw); + + brw->state.atoms = MALLOC(sizeof(atoms)); + brw->state.nr_atoms = sizeof(atoms)/sizeof(*atoms); + memcpy(brw->state.atoms, atoms, sizeof(atoms)); + + /* Patch in a pointer to the dynamic state atom: + */ + for (i = 0; i < brw->state.nr_atoms; i++) + if (brw->state.atoms[i] == NULL) + brw->state.atoms[i] = &brw->curbe.tracked_state; + + memcpy(&brw->curbe.tracked_state, + &brw_constant_buffer, + sizeof(brw_constant_buffer)); + + brw->state.dirty.brw = ~0; + brw->emit_state_always = 0; + + +} + + +void brw_destroy_state( struct brw_context *brw ) +{ + if (brw->state.atoms) { + FREE(brw->state.atoms); + brw->state.atoms = NULL; + } + + brw_destroy_caches(brw); + brw_destroy_batch_cache(brw); + brw_destroy_pools(brw); +} + +/*********************************************************************** + */ + +static boolean check_state( const struct brw_state_flags *a, + const struct brw_state_flags *b ) +{ + return ((a->brw & b->brw) || + (a->cache & b->cache)); +} + +static void accumulate_state( struct brw_state_flags *a, + const struct brw_state_flags *b ) +{ + a->brw |= b->brw; + a->cache |= b->cache; +} + + +static void xor_states( struct brw_state_flags *result, + const struct brw_state_flags *a, + const struct brw_state_flags *b ) +{ + result->brw = a->brw ^ b->brw; + result->cache = a->cache ^ b->cache; +} + + +/*********************************************************************** + * Emit all state: + */ +void brw_validate_state( struct brw_context *brw ) +{ + struct brw_state_flags *state = &brw->state.dirty; + unsigned i; + + if (brw->emit_state_always) + state->brw |= ~0; + + if (state->cache == 0 && + state->brw == 0) + return; + + if (brw->state.dirty.brw & BRW_NEW_CONTEXT) + brw_clear_batch_cache_flush(brw); + + if (BRW_DEBUG) { + /* Debug version which enforces various sanity checks on the + * state flags which are generated and checked to help ensure + * state atoms are ordered correctly in the list. + */ + struct brw_state_flags examined, prev; + memset(&examined, 0, sizeof(examined)); + prev = *state; + + for (i = 0; i < brw->state.nr_atoms; i++) { + const struct brw_tracked_state *atom = brw->state.atoms[i]; + struct brw_state_flags generated; + + assert(atom->dirty.brw || + atom->dirty.cache); + assert(atom->update); + + if (check_state(state, &atom->dirty) || atom->always_update) { + atom->update( brw ); + +/* emit_foo(brw); */ + } + if (atom->emit_reloc != NULL) + atom->emit_reloc(brw); + + accumulate_state(&examined, &atom->dirty); + + /* generated = (prev ^ state) + * if (examined & generated) + * fail; + */ + xor_states(&generated, &prev, state); + assert(!check_state(&examined, &generated)); + prev = *state; + } + } + else { + for (i = 0; i < Elements(atoms); i++) { + const struct brw_tracked_state *atom = brw->state.atoms[i]; + + if (check_state(state, &atom->dirty) || atom->always_update) + atom->update( brw ); + if (atom->emit_reloc != NULL) + atom->emit_reloc(brw); + } + } + + memset(state, 0, sizeof(*state)); +} |