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authorBrian Paul <brianp@vmware.com>2009-02-18 11:47:40 -0700
committerBrian Paul <brianp@vmware.com>2009-02-18 13:15:13 -0700
commit5b2f8dc01300058d43d8043aa897722f39657e93 (patch)
tree5193cabc06af2b06f2b6c903d41bb3f29134d460 /src/mesa/shader/prog_instruction.h
parent212f41b80fe00a8d44d79f2c8e4018836adb8b86 (diff)
mesa: increase MAX_UNIFORMS to 1024 (of vec4 type)
Old limit was 256. Note that no arrays are declared to this size. The only place we have to be careful about raising this limit is the prog_src/dst_register Index bitfields. These have been bumped up too. Added assertions to check we don't exceed the bitfield in the future too.
Diffstat (limited to 'src/mesa/shader/prog_instruction.h')
-rw-r--r--src/mesa/shader/prog_instruction.h16
1 files changed, 12 insertions, 4 deletions
diff --git a/src/mesa/shader/prog_instruction.h b/src/mesa/shader/prog_instruction.h
index c649b3db5e..48e7b04c98 100644
--- a/src/mesa/shader/prog_instruction.h
+++ b/src/mesa/shader/prog_instruction.h
@@ -240,12 +240,21 @@ typedef enum prog_opcode {
/**
+ * Number of bits for the src/dst register Index field.
+ * This limits the size of temp/uniform register files.
+ */
+#define INST_INDEX_BITS 10
+
+
+/**
* Instruction source register.
*/
struct prog_src_register
{
GLuint File:4; /**< One of the PROGRAM_* register file values. */
- GLint Index:9; /**< May be negative for relative addressing. */
+ GLint Index:(INST_INDEX_BITS+1); /**< Extra bit here for sign bit.
+ * May be negative for relative addressing.
+ */
GLuint Swizzle:12;
GLuint RelAddr:1;
@@ -289,7 +298,7 @@ struct prog_src_register
struct prog_dst_register
{
GLuint File:4; /**< One of the PROGRAM_* register file values */
- GLuint Index:8;
+ GLuint Index:INST_INDEX_BITS; /**< Unsigned, never negative */
GLuint WriteMask:4;
GLuint RelAddr:1;
@@ -322,8 +331,7 @@ struct prog_dst_register
*/
GLuint CondSrc:1;
/*@}*/
-
- GLuint pad:30;
+ GLuint pad:28;
};