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authorPauli Nieminen <suokkos@gmail.com>2009-08-24 17:09:27 +0300
committerPauli Nieminen <suokkos@gmail.com>2009-08-24 17:09:27 +0300
commit75da0a6a561e9cd0ab64494d10e6645c35d31e82 (patch)
treeda08eec66d283ecc61493e2821cb905c1990ddfd /src
parentfe42b4b7577feb5a0f10be2faf34da191e34c135 (diff)
parented14a4cb7bbcef45668a3ab6fe8efb267b7c4efd (diff)
Merge branch 'master' of ssh://git.freedesktop.org/git/mesa/mesa into r600_state_predict
Diffstat (limited to 'src')
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_ureg.c57
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_ureg.h25
-rw-r--r--src/gallium/auxiliary/util/u_simple_shaders.c12
-rw-r--r--src/gallium/drivers/r300/r300_state_derived.c36
-rw-r--r--src/mesa/drivers/dri/r300/r300_context.c2
-rw-r--r--src/mesa/drivers/dri/r600/r600_cmdbuf.c10
-rw-r--r--src/mesa/drivers/dri/r600/r600_cmdbuf.h35
-rw-r--r--src/mesa/drivers/dri/r600/r700_render.c4
-rw-r--r--src/mesa/drivers/dri/r600/r700_state.c39
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_common_context.c75
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_fbo.c11
11 files changed, 177 insertions, 129 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.c b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
index 7922931361..c0a0627e0b 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_ureg.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
@@ -340,8 +340,9 @@ out:
void ureg_release_temporary( struct ureg_program *ureg,
struct ureg_dst tmp )
{
- if (tmp.Index < UREG_MAX_TEMP)
- ureg->temps_active[tmp.Index/32] &= ~(1 << (tmp.Index % 32));
+ if(tmp.File == TGSI_FILE_TEMPORARY)
+ if (tmp.Index < UREG_MAX_TEMP)
+ ureg->temps_active[tmp.Index/32] &= ~(1 << (tmp.Index % 32));
}
@@ -605,6 +606,29 @@ ureg_fixup_insn_size(struct ureg_program *ureg,
}
+void
+ureg_insn(struct ureg_program *ureg,
+ unsigned opcode,
+ const struct ureg_dst *dst,
+ unsigned nr_dst,
+ const struct ureg_src *src,
+ unsigned nr_src )
+{
+ unsigned insn, i;
+ boolean saturate;
+
+ saturate = nr_dst ? dst[0].Saturate : FALSE;
+
+ insn = ureg_emit_insn( ureg, opcode, saturate, nr_dst, nr_src );
+
+ for (i = 0; i < nr_dst; i++)
+ ureg_emit_dst( ureg, dst[i] );
+
+ for (i = 0; i < nr_src; i++)
+ ureg_emit_src( ureg, src[i] );
+
+ ureg_fixup_insn_size( ureg, insn );
+}
@@ -765,9 +789,9 @@ emit_header( struct ureg_program *ureg )
}
-void *ureg_create_shader( struct ureg_program *ureg )
+const struct tgsi_token *ureg_finalize( struct ureg_program *ureg )
{
- struct pipe_shader_state state;
+ const struct tgsi_token *tokens;
emit_header( ureg );
emit_decls( ureg );
@@ -781,31 +805,42 @@ void *ureg_create_shader( struct ureg_program *ureg )
return NULL;
}
- state.tokens = (const struct tgsi_token *)ureg->domain[DOMAIN_DECL].tokens;
+ tokens = &ureg->domain[DOMAIN_DECL].tokens[0].token;
if (0) {
debug_printf("%s: emitted shader %d tokens:\n", __FUNCTION__,
ureg->domain[DOMAIN_DECL].count);
- tgsi_dump( state.tokens, 0 );
+ tgsi_dump( tokens, 0 );
}
+
+ return tokens;
+}
+
+
+void *ureg_create_shader( struct ureg_program *ureg,
+ struct pipe_context *pipe )
+{
+ struct pipe_shader_state state;
+
+ state.tokens = ureg_finalize(ureg);
+ if(!state.tokens)
+ return NULL;
if (ureg->processor == TGSI_PROCESSOR_VERTEX)
- return ureg->pipe->create_vs_state( ureg->pipe, &state );
+ return pipe->create_vs_state( pipe, &state );
else
- return ureg->pipe->create_fs_state( ureg->pipe, &state );
+ return pipe->create_fs_state( pipe, &state );
}
-struct ureg_program *ureg_create( struct pipe_context *pipe,
- unsigned processor )
+struct ureg_program *ureg_create( unsigned processor )
{
struct ureg_program *ureg = CALLOC_STRUCT( ureg_program );
if (ureg == NULL)
return NULL;
- ureg->pipe = pipe;
ureg->processor = processor;
return ureg;
}
diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.h b/src/gallium/auxiliary/tgsi/tgsi_ureg.h
index 5a48bb7a35..8836a1ea0e 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_ureg.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_ureg.h
@@ -69,11 +69,14 @@ struct ureg_dst
struct pipe_context;
struct ureg_program *
-ureg_create( struct pipe_context *pipe,
- unsigned processor );
+ureg_create( unsigned processor );
+
+const struct tgsi_token *
+ureg_finalize( struct ureg_program * );
void *
-ureg_create_shader( struct ureg_program * );
+ureg_create_shader( struct ureg_program *,
+ struct pipe_context *pipe );
void
ureg_destroy( struct ureg_program * );
@@ -82,9 +85,11 @@ ureg_destroy( struct ureg_program * );
/***********************************************************************
* Convenience routine:
*/
-static INLINE void *ureg_create_shader_and_destroy( struct ureg_program *p )
+static INLINE void *
+ureg_create_shader_and_destroy( struct ureg_program *p,
+ struct pipe_context *pipe )
{
- void *result = ureg_create_shader( p );
+ void *result = ureg_create_shader( p, pipe );
ureg_destroy( p );
return result;
}
@@ -199,6 +204,16 @@ ureg_fixup_label(struct ureg_program *ureg,
unsigned instruction_number );
+/* Generic instruction emitter. Use if you need to pass the opcode as
+ * a parameter, rather than using the emit_OP() varients below.
+ */
+void
+ureg_insn(struct ureg_program *ureg,
+ unsigned opcode,
+ const struct ureg_dst *dst,
+ unsigned nr_dst,
+ const struct ureg_src *src,
+ unsigned nr_src );
/***********************************************************************
diff --git a/src/gallium/auxiliary/util/u_simple_shaders.c b/src/gallium/auxiliary/util/u_simple_shaders.c
index 1152d62e73..d54a1d8c74 100644
--- a/src/gallium/auxiliary/util/u_simple_shaders.c
+++ b/src/gallium/auxiliary/util/u_simple_shaders.c
@@ -59,7 +59,7 @@ util_make_vertex_passthrough_shader(struct pipe_context *pipe,
struct ureg_program *ureg;
uint i;
- ureg = ureg_create( pipe, TGSI_PROCESSOR_VERTEX );
+ ureg = ureg_create( TGSI_PROCESSOR_VERTEX );
if (ureg == NULL)
return NULL;
@@ -80,7 +80,7 @@ util_make_vertex_passthrough_shader(struct pipe_context *pipe,
ureg_END( ureg );
- return ureg_create_shader_and_destroy( ureg );
+ return ureg_create_shader_and_destroy( ureg, pipe );
}
@@ -99,7 +99,7 @@ util_make_fragment_tex_shader(struct pipe_context *pipe)
struct ureg_src tex;
struct ureg_dst out;
- ureg = ureg_create( pipe, TGSI_PROCESSOR_FRAGMENT );
+ ureg = ureg_create( TGSI_PROCESSOR_FRAGMENT );
if (ureg == NULL)
return NULL;
@@ -116,7 +116,7 @@ util_make_fragment_tex_shader(struct pipe_context *pipe)
ureg_TEX( ureg, out, TGSI_TEXTURE_2D, tex, sampler );
ureg_END( ureg );
- return ureg_create_shader_and_destroy( ureg );
+ return ureg_create_shader_and_destroy( ureg, pipe );
}
@@ -133,7 +133,7 @@ util_make_fragment_passthrough_shader(struct pipe_context *pipe)
struct ureg_src src;
struct ureg_dst dst;
- ureg = ureg_create( pipe, TGSI_PROCESSOR_FRAGMENT );
+ ureg = ureg_create( TGSI_PROCESSOR_FRAGMENT );
if (ureg == NULL)
return NULL;
@@ -145,7 +145,7 @@ util_make_fragment_passthrough_shader(struct pipe_context *pipe)
ureg_MOV( ureg, dst, src );
ureg_END( ureg );
- return ureg_create_shader_and_destroy( ureg );
+ return ureg_create_shader_and_destroy( ureg, pipe );
}
diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c
index ea670f41fb..c01e61a9b1 100644
--- a/src/gallium/drivers/r300/r300_state_derived.c
+++ b/src/gallium/drivers/r300/r300_state_derived.c
@@ -49,59 +49,63 @@ static void r300_vs_tab_routes(struct r300_context* r300,
assert(info->num_inputs <= 16);
- if (r300screen->caps->has_tcl) {
- /* Just copy vert attribs over as-is. */
+ if (!r300screen->caps->has_tcl || !r300->rs_state->enable_vte)
+ {
for (i = 0; i < info->num_inputs; i++) {
- tab[i] = i;
- }
- for (i = 0; i < info->num_outputs; i++) {
- switch (info->output_semantic_name[i]) {
+ switch (info->input_semantic_name[i]) {
case TGSI_SEMANTIC_POSITION:
pos = TRUE;
+ tab[i] = 0;
break;
case TGSI_SEMANTIC_COLOR:
+ tab[i] = 2 + cols;
cols++;
break;
case TGSI_SEMANTIC_PSIZE:
psize = TRUE;
+ tab[i] = 15;
break;
case TGSI_SEMANTIC_FOG:
fog = TRUE;
/* Fall through */
case TGSI_SEMANTIC_GENERIC:
+ tab[i] = 6 + texs;
texs++;
break;
default:
- debug_printf("r300: Unknown vertex output %d\n",
- info->output_semantic_name[i]);
+ debug_printf("r300: Unknown vertex input %d\n",
+ info->input_semantic_name[i]);
break;
}
}
- } else {
+ }
+ else
+ {
+ /* Just copy vert attribs over as-is. */
for (i = 0; i < info->num_inputs; i++) {
- switch (info->input_semantic_name[i]) {
+ tab[i] = i;
+ }
+
+ for (i = 0; i < info->num_outputs; i++) {
+ switch (info->output_semantic_name[i]) {
case TGSI_SEMANTIC_POSITION:
pos = TRUE;
- tab[i] = 0;
break;
case TGSI_SEMANTIC_COLOR:
- tab[i] = 2 + cols;
cols++;
break;
case TGSI_SEMANTIC_PSIZE:
psize = TRUE;
- tab[i] = 15;
break;
case TGSI_SEMANTIC_FOG:
fog = TRUE;
/* Fall through */
case TGSI_SEMANTIC_GENERIC:
- tab[i] = 6 + texs;
texs++;
break;
default:
- debug_printf("r300: Unknown vertex input %d\n",
- info->input_semantic_name[i]);
+ debug_printf("r300: Unknown vertex output %d\n",
+ info->output_semantic_name[i]);
break;
}
}
diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c
index 971a202638..15c1eeb0d4 100644
--- a/src/mesa/drivers/dri/r300/r300_context.c
+++ b/src/mesa/drivers/dri/r300/r300_context.c
@@ -80,6 +80,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define need_GL_EXT_blend_equation_separate
#define need_GL_EXT_blend_func_separate
#define need_GL_EXT_blend_minmax
+#define need_GL_EXT_framebuffer_blit
#define need_GL_EXT_framebuffer_object
#define need_GL_EXT_fog_coord
#define need_GL_EXT_gpu_program_parameters
@@ -143,6 +144,7 @@ const struct dri_extension card_extensions[] = {
const struct dri_extension mm_extensions[] = {
+ { "GL_EXT_framebuffer_blit", GL_EXT_framebuffer_blit_functions },
{ "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
{ NULL, NULL }
};
diff --git a/src/mesa/drivers/dri/r600/r600_cmdbuf.c b/src/mesa/drivers/dri/r600/r600_cmdbuf.c
index 10ea766896..a330d5b151 100644
--- a/src/mesa/drivers/dri/r600/r600_cmdbuf.c
+++ b/src/mesa/drivers/dri/r600/r600_cmdbuf.c
@@ -74,11 +74,11 @@ static struct radeon_cs * r600_cs_create(struct radeon_cs_manager *csm,
return cs;
}
-int r600_cs_write_reloc(struct radeon_cs *cs,
- struct radeon_bo *bo,
- uint32_t read_domain,
- uint32_t write_domain,
- uint32_t flags)
+static int r600_cs_write_reloc(struct radeon_cs *cs,
+ struct radeon_bo *bo,
+ uint32_t read_domain,
+ uint32_t write_domain,
+ uint32_t flags)
{
struct r600_cs_reloc_legacy *relocs;
int i;
diff --git a/src/mesa/drivers/dri/r600/r600_cmdbuf.h b/src/mesa/drivers/dri/r600/r600_cmdbuf.h
index 06eddf2eee..eba43d37b6 100644
--- a/src/mesa/drivers/dri/r600/r600_cmdbuf.h
+++ b/src/mesa/drivers/dri/r600/r600_cmdbuf.h
@@ -134,40 +134,23 @@ struct r600_cs_reloc_legacy {
uint32_t *reloc_indices;
};
-extern int r600_cs_write_reloc(struct radeon_cs *cs,
- struct radeon_bo *bo,
- uint32_t read_domain,
- uint32_t write_domain,
- uint32_t flags);
-
-static inline void r600_cs_write_dword(struct radeon_cs *cs, uint32_t dword)
-{
- cs->packets[cs->cdw++] = dword;
- if (cs->section) {
- cs->section_cdw++;
- }
-}
-
struct radeon_cs_manager * r600_radeon_cs_manager_legacy_ctor(struct radeon_context *ctx);
/**
* Write one dword to the command buffer.
*/
-#define R600_OUT_BATCH(data) \
- do { \
- r600_cs_write_dword(b_l_rmesa->cmdbuf.cs, data);\
- } while(0)
+#define R600_OUT_BATCH(data) \
+do { \
+ radeon_cs_write_dword(b_l_rmesa->cmdbuf.cs, data); \
+} while(0)
/**
* Write n dwords from ptr to the command buffer.
*/
-#define R600_OUT_BATCH_TABLE(ptr,n) \
- do { \
- int _i; \
- for (_i=0; _i < n; _i++) {\
- r600_cs_write_dword(b_l_rmesa->cmdbuf.cs, ptr[_i]);\
- }\
- } while(0)
+#define R600_OUT_BATCH_TABLE(ptr,n) \
+do { \
+ radeon_cs_write_table(b_l_rmesa->cmdbuf.cs, ptr, n); \
+} while(0)
/**
* Write a relocated dword to the command buffer.
@@ -178,7 +161,7 @@ struct radeon_cs_manager * r600_radeon_cs_manager_legacy_ctor(struct radeon_cont
fprintf(stderr, "(%s:%s:%d) offset : %d\n", \
__FILE__, __FUNCTION__, __LINE__, offset); \
} \
- r600_cs_write_reloc(b_l_rmesa->cmdbuf.cs, \
+ radeon_cs_write_reloc(b_l_rmesa->cmdbuf.cs, \
bo, rd, wd, flags); \
} while(0)
diff --git a/src/mesa/drivers/dri/r600/r700_render.c b/src/mesa/drivers/dri/r600/r700_render.c
index 897c0fc8ee..e03b060fd9 100644
--- a/src/mesa/drivers/dri/r600/r700_render.c
+++ b/src/mesa/drivers/dri/r600/r700_render.c
@@ -369,12 +369,12 @@ static GLboolean r700RunRender(GLcontext * ctx,
r700WaitForIdleClean(context);
rrb = radeon_get_colorbuffer(&context->radeon);
- if (!rrb || !rrb->bo)
+ if (rrb && rrb->bo)
r700SyncSurf(context, rrb->bo, 0, RADEON_GEM_DOMAIN_VRAM,
CB_ACTION_ENA_bit | (1 << (id + 6)));
rrb = radeon_get_depthbuffer(&context->radeon);
- if (!rrb || !rrb->bo)
+ if (rrb && rrb->bo)
r700SyncSurf(context, rrb->bo, 0, RADEON_GEM_DOMAIN_VRAM,
DB_ACTION_ENA_bit | DB_DEST_BASE_ENA_bit);
diff --git a/src/mesa/drivers/dri/r600/r700_state.c b/src/mesa/drivers/dri/r600/r700_state.c
index 75b2b72eb9..15f40b2771 100644
--- a/src/mesa/drivers/dri/r600/r700_state.c
+++ b/src/mesa/drivers/dri/r600/r700_state.c
@@ -1349,14 +1349,33 @@ void r700SetScissor(context_t *context) //---------------
x2 = context->radeon.state.scissor.rect.x2 - 1;
y2 = context->radeon.state.scissor.rect.y2 - 1;
} else {
- x1 = rrb->dPriv->x;
- y1 = rrb->dPriv->y;
- x2 = rrb->dPriv->x + rrb->dPriv->w;
- y2 = rrb->dPriv->y + rrb->dPriv->h;
+ if (context->radeon.radeonScreen->driScreen->dri2.enabled) {
+ x1 = 0;
+ y1 = 0;
+ x2 = rrb->base.Width - 1;
+ y2 = rrb->base.Height - 1;
+ } else {
+ x1 = rrb->dPriv->x;
+ y1 = rrb->dPriv->y;
+ x2 = rrb->dPriv->x + rrb->dPriv->w;
+ y2 = rrb->dPriv->y + rrb->dPriv->h;
+ }
}
R600_STATECHANGE(context, scissor);
+ /* screen */
+ SETbit(r700->PA_SC_SCREEN_SCISSOR_TL.u32All, WINDOW_OFFSET_DISABLE_bit);
+ SETfield(r700->PA_SC_SCREEN_SCISSOR_TL.u32All, x1,
+ PA_SC_SCREEN_SCISSOR_TL__TL_X_shift, PA_SC_SCREEN_SCISSOR_TL__TL_X_mask);
+ SETfield(r700->PA_SC_SCREEN_SCISSOR_TL.u32All, y1,
+ PA_SC_SCREEN_SCISSOR_TL__TL_Y_shift, PA_SC_SCREEN_SCISSOR_TL__TL_Y_mask);
+
+ SETfield(r700->PA_SC_SCREEN_SCISSOR_BR.u32All, x2,
+ PA_SC_SCREEN_SCISSOR_BR__BR_X_shift, PA_SC_SCREEN_SCISSOR_BR__BR_X_mask);
+ SETfield(r700->PA_SC_SCREEN_SCISSOR_BR.u32All, y2,
+ PA_SC_SCREEN_SCISSOR_BR__BR_Y_shift, PA_SC_SCREEN_SCISSOR_BR__BR_Y_mask);
+
/* window */
SETbit(r700->PA_SC_WINDOW_SCISSOR_TL.u32All, WINDOW_OFFSET_DISABLE_bit);
SETfield(r700->PA_SC_WINDOW_SCISSOR_TL.u32All, x1,
@@ -1749,21 +1768,13 @@ void r700InitState(GLcontext * ctx) //-------------------
/* default shader connections. */
r700->SPI_VS_OUT_ID_0.u32All = 0x03020100;
r700->SPI_VS_OUT_ID_1.u32All = 0x07060504;
+ r700->SPI_VS_OUT_ID_2.u32All = 0x0b0a0908;
+ r700->SPI_VS_OUT_ID_3.u32All = 0x0f0e0d0c;
r700->SPI_THREAD_GROUPING.u32All = 0;
if (context->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV770)
SETfield(r700->SPI_THREAD_GROUPING.u32All, 1, PS_GROUPING_shift, PS_GROUPING_mask);
- /* screen */
- r700->PA_SC_SCREEN_SCISSOR_TL.u32All = 0x0;
-
- SETfield(r700->PA_SC_SCREEN_SCISSOR_BR.u32All,
- ((RADEONDRIPtr)(context->radeon.radeonScreen->driScreen->pDevPriv))->width,
- PA_SC_SCREEN_SCISSOR_BR__BR_X_shift, PA_SC_SCREEN_SCISSOR_BR__BR_X_mask);
- SETfield(r700->PA_SC_SCREEN_SCISSOR_BR.u32All,
- ((RADEONDRIPtr)(context->radeon.radeonScreen->driScreen->pDevPriv))->height,
- PA_SC_SCREEN_SCISSOR_BR__BR_Y_shift, PA_SC_SCREEN_SCISSOR_BR__BR_Y_mask);
-
/* 4 clip rectangles */ /* TODO : set these clip rects according to context->currentDraw->numClipRects */
r700->PA_SC_CLIPRECT_RULE.u32All = 0;
SETfield(r700->PA_SC_CLIPRECT_RULE.u32All, CLIP_RULE_mask, CLIP_RULE_shift, CLIP_RULE_mask);
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c
index ef296e491e..b76efa8eaa 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c
@@ -37,6 +37,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "utils.h"
#include "vblank.h"
#include "drirenderbuffer.h"
+#include "drivers/common/meta.h"
#include "main/context.h"
#include "main/framebuffer.h"
#include "main/renderbuffer.h"
@@ -207,6 +208,9 @@ GLboolean radeonInitContext(radeonContextPtr radeon,
driContextPriv->driverPrivate = radeon;
meta_init_metaops(ctx, &radeon->meta);
+
+ _mesa_meta_init(ctx);
+
/* DRI fields */
radeon->dri.context = driContextPriv;
radeon->dri.screen = sPriv;
@@ -300,47 +304,48 @@ void radeonDestroyContext(__DRIcontextPrivate *driContextPriv )
radeonContextPtr radeon = (radeonContextPtr) driContextPriv->driverPrivate;
radeonContextPtr current = ctx ? RADEON_CONTEXT(ctx) : NULL;
+ assert(radeon);
+
+ _mesa_meta_free(radeon->glCtx);
+
if (radeon == current) {
radeon_firevertices(radeon);
_mesa_make_current(NULL, NULL, NULL);
}
- assert(radeon);
- if (radeon) {
- if (!is_empty_list(&radeon->dma.reserved)) {
- rcommonFlushCmdBuf( radeon, __FUNCTION__ );
- }
+ if (!is_empty_list(&radeon->dma.reserved)) {
+ rcommonFlushCmdBuf( radeon, __FUNCTION__ );
+ }
- radeonFreeDmaRegions(radeon);
- radeonReleaseArrays(radeon->glCtx, ~0);
- meta_destroy_metaops(&radeon->meta);
- if (radeon->vtbl.free_context)
- radeon->vtbl.free_context(radeon->glCtx);
- _swsetup_DestroyContext( radeon->glCtx );
- _tnl_DestroyContext( radeon->glCtx );
- _vbo_DestroyContext( radeon->glCtx );
- _swrast_DestroyContext( radeon->glCtx );
-
- /* free atom list */
- /* free the Mesa context */
- _mesa_destroy_context(radeon->glCtx);
-
- /* _mesa_destroy_context() might result in calls to functions that
- * depend on the DriverCtx, so don't set it to NULL before.
- *
- * radeon->glCtx->DriverCtx = NULL;
- */
- /* free the option cache */
- driDestroyOptionCache(&radeon->optionCache);
-
- rcommonDestroyCmdBuf(radeon);
-
- radeon_destroy_atom_list(radeon);
-
- if (radeon->state.scissor.pClipRects) {
- FREE(radeon->state.scissor.pClipRects);
- radeon->state.scissor.pClipRects = 0;
- }
+ radeonFreeDmaRegions(radeon);
+ radeonReleaseArrays(radeon->glCtx, ~0);
+ meta_destroy_metaops(&radeon->meta);
+ if (radeon->vtbl.free_context)
+ radeon->vtbl.free_context(radeon->glCtx);
+ _swsetup_DestroyContext( radeon->glCtx );
+ _tnl_DestroyContext( radeon->glCtx );
+ _vbo_DestroyContext( radeon->glCtx );
+ _swrast_DestroyContext( radeon->glCtx );
+
+ /* free atom list */
+ /* free the Mesa context */
+ _mesa_destroy_context(radeon->glCtx);
+
+ /* _mesa_destroy_context() might result in calls to functions that
+ * depend on the DriverCtx, so don't set it to NULL before.
+ *
+ * radeon->glCtx->DriverCtx = NULL;
+ */
+ /* free the option cache */
+ driDestroyOptionCache(&radeon->optionCache);
+
+ rcommonDestroyCmdBuf(radeon);
+
+ radeon_destroy_atom_list(radeon);
+
+ if (radeon->state.scissor.pClipRects) {
+ FREE(radeon->state.scissor.pClipRects);
+ radeon->state.scissor.pClipRects = 0;
}
#ifdef RADEON_BO_TRACK
track = fopen("/tmp/tracklog", "w");
diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c
index 8303917b0b..3d7c9708e1 100644
--- a/src/mesa/drivers/dri/radeon/radeon_fbo.c
+++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c
@@ -35,6 +35,7 @@
#include "main/context.h"
#include "main/texformat.h"
#include "main/texrender.h"
+#include "drivers/common/meta.h"
#include "radeon_common.h"
#include "radeon_mipmap_tree.h"
@@ -571,14 +572,6 @@ radeon_validate_framebuffer(GLcontext *ctx, struct gl_framebuffer *fb)
{
}
-static void
-radeon_blit_framebuffer(GLcontext *ctx,
- GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
- GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
- GLbitfield mask, GLenum filter)
-{
-}
-
void radeon_fbo_init(struct radeon_context *radeon)
{
radeon->glCtx->Driver.NewFramebuffer = radeon_new_framebuffer;
@@ -589,7 +582,7 @@ void radeon_fbo_init(struct radeon_context *radeon)
radeon->glCtx->Driver.FinishRenderTexture = radeon_finish_render_texture;
radeon->glCtx->Driver.ResizeBuffers = radeon_resize_buffers;
radeon->glCtx->Driver.ValidateFramebuffer = radeon_validate_framebuffer;
- radeon->glCtx->Driver.BlitFramebuffer = radeon_blit_framebuffer;
+ radeon->glCtx->Driver.BlitFramebuffer = _mesa_meta_blit_framebuffer;
}