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-rw-r--r--src/gallium/drivers/nv40/Makefile1
-rw-r--r--src/gallium/drivers/nv40/nv40_context.h3
-rw-r--r--src/gallium/drivers/nv40/nv40_state.c140
-rw-r--r--src/gallium/drivers/nv40/nv40_state_emit.c6
-rw-r--r--src/gallium/drivers/nv40/nv40_state_fb.c156
5 files changed, 162 insertions, 144 deletions
diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile
index 82295cbefc..fd002b54e7 100644
--- a/src/gallium/drivers/nv40/Makefile
+++ b/src/gallium/drivers/nv40/Makefile
@@ -15,6 +15,7 @@ DRIVER_SOURCES = \
nv40_state_blend.c \
nv40_state_clip.c \
nv40_state_emit.c \
+ nv40_state_fb.c \
nv40_state_rasterizer.c \
nv40_state_scissor.c \
nv40_state_stipple.c \
diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h
index d71fe11a4a..69062a8a20 100644
--- a/src/gallium/drivers/nv40/nv40_context.h
+++ b/src/gallium/drivers/nv40/nv40_context.h
@@ -149,12 +149,12 @@ struct nv40_context {
struct nv40_blend_state *blend;
struct pipe_blend_color blend_colour;
struct pipe_viewport_state viewport;
+ struct pipe_framebuffer_state framebuffer;
} pipe_state;
struct nv40_state state;
unsigned fallback;
- struct nouveau_stateobj *so_framebuffer;
struct nouveau_stateobj *so_fragtex[16];
struct nouveau_stateobj *so_vtxbuf;
@@ -208,6 +208,7 @@ extern struct nv40_state_entry nv40_state_blend;
extern struct nv40_state_entry nv40_state_blend_colour;
extern struct nv40_state_entry nv40_state_zsa;
extern struct nv40_state_entry nv40_state_viewport;
+extern struct nv40_state_entry nv40_state_framebuffer;
/* nv40_vbo.c */
extern boolean nv40_draw_arrays(struct pipe_context *, unsigned mode,
diff --git a/src/gallium/drivers/nv40/nv40_state.c b/src/gallium/drivers/nv40/nv40_state.c
index 41631ef2dd..84818d6729 100644
--- a/src/gallium/drivers/nv40/nv40_state.c
+++ b/src/gallium/drivers/nv40/nv40_state.c
@@ -584,146 +584,8 @@ nv40_set_framebuffer_state(struct pipe_context *pipe,
const struct pipe_framebuffer_state *fb)
{
struct nv40_context *nv40 = nv40_context(pipe);
- struct pipe_surface *rt[4], *zeta;
- uint32_t rt_enable, rt_format, w, h;
- int i, colour_format = 0, zeta_format = 0;
- struct nouveau_stateobj *so = so_new(64, 10);
- unsigned rt_flags = NOUVEAU_BO_RDWR | NOUVEAU_BO_VRAM;
-
- rt_enable = 0;
- for (i = 0; i < 4; i++) {
- if (!fb->cbufs[i])
- continue;
-
- if (colour_format) {
- assert(w == fb->cbufs[i]->width);
- assert(h == fb->cbufs[i]->height);
- assert(colour_format == fb->cbufs[i]->format);
- } else {
- w = fb->cbufs[i]->width;
- h = fb->cbufs[i]->height;
- colour_format = fb->cbufs[i]->format;
- rt_enable |= (NV40TCL_RT_ENABLE_COLOR0 << i);
- rt[i] = fb->cbufs[i];
- }
- }
-
- if (rt_enable & (NV40TCL_RT_ENABLE_COLOR1 | NV40TCL_RT_ENABLE_COLOR2 |
- NV40TCL_RT_ENABLE_COLOR3))
- rt_enable |= NV40TCL_RT_ENABLE_MRT;
-
- if (fb->zsbuf) {
- if (colour_format) {
- assert(w == fb->zsbuf->width);
- assert(h == fb->zsbuf->height);
- } else {
- w = fb->zsbuf->width;
- h = fb->zsbuf->height;
- }
-
- zeta_format = fb->zsbuf->format;
- zeta = fb->zsbuf;
- }
-
- rt_format = NV40TCL_RT_FORMAT_TYPE_LINEAR;
-
- switch (colour_format) {
- case PIPE_FORMAT_A8R8G8B8_UNORM:
- case 0:
- rt_format |= NV40TCL_RT_FORMAT_COLOR_A8R8G8B8;
- break;
- case PIPE_FORMAT_R5G6B5_UNORM:
- rt_format |= NV40TCL_RT_FORMAT_COLOR_R5G6B5;
- break;
- default:
- assert(0);
- }
-
- switch (zeta_format) {
- case PIPE_FORMAT_Z16_UNORM:
- rt_format |= NV40TCL_RT_FORMAT_ZETA_Z16;
- break;
- case PIPE_FORMAT_Z24S8_UNORM:
- case 0:
- rt_format |= NV40TCL_RT_FORMAT_ZETA_Z24S8;
- break;
- default:
- assert(0);
- }
-
- if (rt_enable & NV40TCL_RT_ENABLE_COLOR0) {
- so_method(so, nv40->hw->curie, NV40TCL_DMA_COLOR0, 1);
- so_reloc (so, rt[0]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
- nv40->nvws->channel->vram->handle,
- nv40->nvws->channel->gart->handle);
- so_method(so, nv40->hw->curie, NV40TCL_COLOR0_PITCH, 2);
- so_data (so, rt[0]->pitch * rt[0]->cpp);
- so_reloc (so, rt[0]->buffer, rt[0]->offset, rt_flags |
- NOUVEAU_BO_LOW, 0, 0);
- }
-
- if (rt_enable & NV40TCL_RT_ENABLE_COLOR1) {
- so_method(so, nv40->hw->curie, NV40TCL_DMA_COLOR1, 1);
- so_reloc (so, rt[1]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
- nv40->nvws->channel->vram->handle,
- nv40->nvws->channel->gart->handle);
- so_method(so, nv40->hw->curie, NV40TCL_COLOR1_OFFSET, 2);
- so_reloc (so, rt[1]->buffer, rt[1]->offset, rt_flags |
- NOUVEAU_BO_LOW, 0, 0);
- so_data (so, rt[1]->pitch * rt[1]->cpp);
- }
-
- if (rt_enable & NV40TCL_RT_ENABLE_COLOR2) {
- so_method(so, nv40->hw->curie, NV40TCL_DMA_COLOR2, 1);
- so_reloc (so, rt[2]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
- nv40->nvws->channel->vram->handle,
- nv40->nvws->channel->gart->handle);
- so_method(so, nv40->hw->curie, NV40TCL_COLOR2_OFFSET, 1);
- so_reloc (so, rt[2]->buffer, rt[2]->offset, rt_flags |
- NOUVEAU_BO_LOW, 0, 0);
- so_method(so, nv40->hw->curie, NV40TCL_COLOR2_PITCH, 1);
- so_data (so, rt[2]->pitch * rt[2]->cpp);
- }
-
- if (rt_enable & NV40TCL_RT_ENABLE_COLOR3) {
- so_method(so, nv40->hw->curie, NV40TCL_DMA_COLOR3, 1);
- so_reloc (so, rt[3]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
- nv40->nvws->channel->vram->handle,
- nv40->nvws->channel->gart->handle);
- so_method(so, nv40->hw->curie, NV40TCL_COLOR3_OFFSET, 1);
- so_reloc (so, rt[3]->buffer, rt[3]->offset, rt_flags |
- NOUVEAU_BO_LOW, 0, 0);
- so_method(so, nv40->hw->curie, NV40TCL_COLOR3_PITCH, 1);
- so_data (so, rt[3]->pitch * rt[3]->cpp);
- }
-
- if (zeta_format) {
- so_method(so, nv40->hw->curie, NV40TCL_DMA_ZETA, 1);
- so_reloc (so, zeta->buffer, 0, rt_flags | NOUVEAU_BO_OR,
- nv40->nvws->channel->vram->handle,
- nv40->nvws->channel->gart->handle);
- so_method(so, nv40->hw->curie, NV40TCL_ZETA_OFFSET, 1);
- so_reloc (so, zeta->buffer, zeta->offset, rt_flags |
- NOUVEAU_BO_LOW, 0, 0);
- so_method(so, nv40->hw->curie, NV40TCL_ZETA_PITCH, 1);
- so_data (so, zeta->pitch * zeta->cpp);
- }
- so_method(so, nv40->hw->curie, NV40TCL_RT_ENABLE, 1);
- so_data (so, rt_enable);
- so_method(so, nv40->hw->curie, NV40TCL_RT_HORIZ, 3);
- so_data (so, (w << 16) | 0);
- so_data (so, (h << 16) | 0);
- so_data (so, rt_format);
- so_method(so, nv40->hw->curie, NV40TCL_VIEWPORT_HORIZ, 2);
- so_data (so, (w << 16) | 0);
- so_data (so, (h << 16) | 0);
- so_method(so, nv40->hw->curie, NV40TCL_VIEWPORT_CLIP_HORIZ(0), 2);
- so_data (so, ((w - 1) << 16) | 0);
- so_data (so, ((h - 1) << 16) | 0);
-
- so_ref(so, &nv40->so_framebuffer);
- so_ref(NULL, &so);
+ nv40->pipe_state.framebuffer = *fb;
nv40->dirty |= NV40_NEW_FB;
}
diff --git a/src/gallium/drivers/nv40/nv40_state_emit.c b/src/gallium/drivers/nv40/nv40_state_emit.c
index 65d7e2978a..a9ca71c5e9 100644
--- a/src/gallium/drivers/nv40/nv40_state_emit.c
+++ b/src/gallium/drivers/nv40/nv40_state_emit.c
@@ -2,6 +2,7 @@
#include "nv40_state.h"
static struct nv40_state_entry *render_states[] = {
+ &nv40_state_framebuffer,
&nv40_state_rasterizer,
&nv40_state_clip,
&nv40_state_scissor,
@@ -67,7 +68,7 @@ nv40_state_emit(struct nv40_context *nv40)
so_emit(nv40->nvws, nv40->hw->state[idx]);
}
- so_emit_reloc_markers(nv40->nvws, nv40->so_framebuffer);
+ so_emit_reloc_markers(nv40->nvws, nv40->state.hw[NV40_STATE_FB]);
for (i = 0; i < 16; i++) {
if (!(nv40->fp_samplers & (1 << i)))
continue;
@@ -81,9 +82,6 @@ nv40_emit_hw_state(struct nv40_context *nv40)
{
nv40_state_validate(nv40);
- if (nv40->dirty & NV40_NEW_FB)
- so_emit(nv40->nvws, nv40->so_framebuffer);
-
if (nv40->dirty_samplers || (nv40->dirty & NV40_NEW_FRAGPROG)) {
nv40_fragtex_bind(nv40);
diff --git a/src/gallium/drivers/nv40/nv40_state_fb.c b/src/gallium/drivers/nv40/nv40_state_fb.c
new file mode 100644
index 0000000000..d3032f1be5
--- /dev/null
+++ b/src/gallium/drivers/nv40/nv40_state_fb.c
@@ -0,0 +1,156 @@
+#include "nv40_context.h"
+
+static boolean
+nv40_state_framebuffer_validate(struct nv40_context *nv40)
+{
+ struct pipe_framebuffer_state *fb = &nv40->pipe_state.framebuffer;
+ struct pipe_surface *rt[4], *zeta;
+ uint32_t rt_enable, rt_format, w, h;
+ int i, colour_format = 0, zeta_format = 0;
+ struct nouveau_stateobj *so = so_new(64, 10);
+ unsigned rt_flags = NOUVEAU_BO_RDWR | NOUVEAU_BO_VRAM;
+
+ rt_enable = 0;
+ for (i = 0; i < 4; i++) {
+ if (!fb->cbufs[i])
+ continue;
+
+ if (colour_format) {
+ assert(w == fb->cbufs[i]->width);
+ assert(h == fb->cbufs[i]->height);
+ assert(colour_format == fb->cbufs[i]->format);
+ } else {
+ w = fb->cbufs[i]->width;
+ h = fb->cbufs[i]->height;
+ colour_format = fb->cbufs[i]->format;
+ rt_enable |= (NV40TCL_RT_ENABLE_COLOR0 << i);
+ rt[i] = fb->cbufs[i];
+ }
+ }
+
+ if (rt_enable & (NV40TCL_RT_ENABLE_COLOR1 | NV40TCL_RT_ENABLE_COLOR2 |
+ NV40TCL_RT_ENABLE_COLOR3))
+ rt_enable |= NV40TCL_RT_ENABLE_MRT;
+
+ if (fb->zsbuf) {
+ if (colour_format) {
+ assert(w == fb->zsbuf->width);
+ assert(h == fb->zsbuf->height);
+ } else {
+ w = fb->zsbuf->width;
+ h = fb->zsbuf->height;
+ }
+
+ zeta_format = fb->zsbuf->format;
+ zeta = fb->zsbuf;
+ }
+
+ rt_format = NV40TCL_RT_FORMAT_TYPE_LINEAR;
+
+ switch (colour_format) {
+ case PIPE_FORMAT_A8R8G8B8_UNORM:
+ case 0:
+ rt_format |= NV40TCL_RT_FORMAT_COLOR_A8R8G8B8;
+ break;
+ case PIPE_FORMAT_R5G6B5_UNORM:
+ rt_format |= NV40TCL_RT_FORMAT_COLOR_R5G6B5;
+ break;
+ default:
+ assert(0);
+ }
+
+ switch (zeta_format) {
+ case PIPE_FORMAT_Z16_UNORM:
+ rt_format |= NV40TCL_RT_FORMAT_ZETA_Z16;
+ break;
+ case PIPE_FORMAT_Z24S8_UNORM:
+ case 0:
+ rt_format |= NV40TCL_RT_FORMAT_ZETA_Z24S8;
+ break;
+ default:
+ assert(0);
+ }
+
+ if (rt_enable & NV40TCL_RT_ENABLE_COLOR0) {
+ so_method(so, nv40->hw->curie, NV40TCL_DMA_COLOR0, 1);
+ so_reloc (so, rt[0]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
+ nv40->nvws->channel->vram->handle,
+ nv40->nvws->channel->gart->handle);
+ so_method(so, nv40->hw->curie, NV40TCL_COLOR0_PITCH, 2);
+ so_data (so, rt[0]->pitch * rt[0]->cpp);
+ so_reloc (so, rt[0]->buffer, rt[0]->offset, rt_flags |
+ NOUVEAU_BO_LOW, 0, 0);
+ }
+
+ if (rt_enable & NV40TCL_RT_ENABLE_COLOR1) {
+ so_method(so, nv40->hw->curie, NV40TCL_DMA_COLOR1, 1);
+ so_reloc (so, rt[1]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
+ nv40->nvws->channel->vram->handle,
+ nv40->nvws->channel->gart->handle);
+ so_method(so, nv40->hw->curie, NV40TCL_COLOR1_OFFSET, 2);
+ so_reloc (so, rt[1]->buffer, rt[1]->offset, rt_flags |
+ NOUVEAU_BO_LOW, 0, 0);
+ so_data (so, rt[1]->pitch * rt[1]->cpp);
+ }
+
+ if (rt_enable & NV40TCL_RT_ENABLE_COLOR2) {
+ so_method(so, nv40->hw->curie, NV40TCL_DMA_COLOR2, 1);
+ so_reloc (so, rt[2]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
+ nv40->nvws->channel->vram->handle,
+ nv40->nvws->channel->gart->handle);
+ so_method(so, nv40->hw->curie, NV40TCL_COLOR2_OFFSET, 1);
+ so_reloc (so, rt[2]->buffer, rt[2]->offset, rt_flags |
+ NOUVEAU_BO_LOW, 0, 0);
+ so_method(so, nv40->hw->curie, NV40TCL_COLOR2_PITCH, 1);
+ so_data (so, rt[2]->pitch * rt[2]->cpp);
+ }
+
+ if (rt_enable & NV40TCL_RT_ENABLE_COLOR3) {
+ so_method(so, nv40->hw->curie, NV40TCL_DMA_COLOR3, 1);
+ so_reloc (so, rt[3]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
+ nv40->nvws->channel->vram->handle,
+ nv40->nvws->channel->gart->handle);
+ so_method(so, nv40->hw->curie, NV40TCL_COLOR3_OFFSET, 1);
+ so_reloc (so, rt[3]->buffer, rt[3]->offset, rt_flags |
+ NOUVEAU_BO_LOW, 0, 0);
+ so_method(so, nv40->hw->curie, NV40TCL_COLOR3_PITCH, 1);
+ so_data (so, rt[3]->pitch * rt[3]->cpp);
+ }
+
+ if (zeta_format) {
+ so_method(so, nv40->hw->curie, NV40TCL_DMA_ZETA, 1);
+ so_reloc (so, zeta->buffer, 0, rt_flags | NOUVEAU_BO_OR,
+ nv40->nvws->channel->vram->handle,
+ nv40->nvws->channel->gart->handle);
+ so_method(so, nv40->hw->curie, NV40TCL_ZETA_OFFSET, 1);
+ so_reloc (so, zeta->buffer, zeta->offset, rt_flags |
+ NOUVEAU_BO_LOW, 0, 0);
+ so_method(so, nv40->hw->curie, NV40TCL_ZETA_PITCH, 1);
+ so_data (so, zeta->pitch * zeta->cpp);
+ }
+
+ so_method(so, nv40->hw->curie, NV40TCL_RT_ENABLE, 1);
+ so_data (so, rt_enable);
+ so_method(so, nv40->hw->curie, NV40TCL_RT_HORIZ, 3);
+ so_data (so, (w << 16) | 0);
+ so_data (so, (h << 16) | 0);
+ so_data (so, rt_format);
+ so_method(so, nv40->hw->curie, NV40TCL_VIEWPORT_HORIZ, 2);
+ so_data (so, (w << 16) | 0);
+ so_data (so, (h << 16) | 0);
+ so_method(so, nv40->hw->curie, NV40TCL_VIEWPORT_CLIP_HORIZ(0), 2);
+ so_data (so, ((w - 1) << 16) | 0);
+ so_data (so, ((h - 1) << 16) | 0);
+
+ so_ref(so, &nv40->state.hw[NV40_STATE_FB]);
+ so_ref(NULL, &so);
+ return TRUE;
+}
+
+struct nv40_state_entry nv40_state_framebuffer = {
+ .validate = nv40_state_framebuffer_validate,
+ .dirty = {
+ .pipe = NV40_NEW_FB,
+ .hw = NV40_STATE_FB
+ }
+};
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 04:00:38 +0000