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path: root/src/mesa/drivers/dri/i965/brw_urb.c
AgeCommit message (Expand)Author
2009-12-22intel: Replace IS_G4X() across the driver with context structure usage.Eric Anholt
2009-12-22intel: Replace IS_IGDNG checks with intel->is_ironlake or needs_ff_sync.Eric Anholt
2009-07-13i965: add support for new chipsetsXiang, Haihao
2009-06-30i965: Increase G4X default VS URB allocation to actually allow 32 threads.Eric Anholt
2008-11-12i965: Fix up clip min_nr_entries, preferred_nr_entries, and max_threads.Eric Anholt
2008-11-12i965: Add a big comment explaining my understanding of URB management.Eric Anholt
2008-11-02i965: Fix copy'n'paste issue that made brw->urb.constrained useless.Eric Anholt
2008-08-24Revert "Revert "Merge branch 'drm-gem'""Dave Airlie
2008-08-24Revert "Merge branch 'drm-gem'"Dave Airlie
2008-08-08intel-gem: Update to new check_aperture API for classic mode.Eric Anholt
2008-08-08965: cleanups to state emission from aperture checking and state ordering.Eric Anholt
2008-04-22 [i965] This is to fix random crash in some maps of Ut2004 demo.Zou Nan hai
2008-04-18i965: initial attempt at fixing the aperture overflowDave Airlie
2008-02-14i965: remove unused hal hooksDave Airlie
2008-01-29i965: new integrated graphics chipset supportXiang, Haihao
2007-03-25i965: The given urb layout(maximal size of urb entries and theXiang, Haihao
2006-09-14VS nr of urb entries is constrained to be one of a fixed set of values,Keith Whitwell
2006-09-12Potential fix for doom3 lockups. Seems that there is a conflictKeith Whitwell
2006-08-09Add Intel i965G/Q DRI driver.Eric Anholt