1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
|
/**************************************************************************
*
* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
**************************************************************************/
#include <stdio.h>
#include <unistd.h>
#include <errno.h>
#include <sched.h>
#include "mtypes.h"
#include "context.h"
#include "swrast/swrast.h"
#include "intel_context.h"
#include "intel_ioctl.h"
#include "intel_batchbuffer.h"
#include "intel_blit.h"
#include "intel_regions.h"
#include "drm.h"
#include "dri_bufmgr.h"
#include "intel_bufmgr_ttm.h"
#include "i915_drm.h"
static void intelWaitIdleLocked( struct intel_context *intel )
{
unsigned int fence;
if (INTEL_DEBUG & DEBUG_SYNC)
fprintf(stderr, "waiting for idle\n");
fence = intelEmitIrqLocked(intel);
intelWaitIrq(intel, fence);
}
int intelEmitIrqLocked( struct intel_context *intel )
{
int seq = 1;
if (!intel->no_hw) {
drmI830IrqEmit ie;
int ret;
/*
assert(((*(int *)intel->driHwLock) & ~DRM_LOCK_CONT) ==
(DRM_LOCK_HELD|intel->hHWContext));
*/
ie.irq_seq = &seq;
ret = drmCommandWriteRead( intel->driFd,
DRM_I830_IRQ_EMIT,
&ie, sizeof(ie) );
if ( ret ) {
fprintf( stderr, "%s: drmI830IrqEmit: %d\n", __FUNCTION__, ret );
exit(1);
}
if (0)
fprintf(stderr, "%s --> %d\n", __FUNCTION__, seq );
}
return seq;
}
void intelWaitIrq( struct intel_context *intel, int seq )
{
if (!intel->no_hw) {
drmI830IrqWait iw;
int ret, lastdispatch;
volatile drmI830Sarea *sarea = intel->sarea;
if (0)
fprintf(stderr, "%s %d\n", __FUNCTION__, seq );
iw.irq_seq = seq;
do {
lastdispatch = sarea->last_dispatch;
ret = drmCommandWrite( intel->driFd,
DRM_I830_IRQ_WAIT, &iw, sizeof(iw) );
/* This seems quite often to return before it should!?!
*/
} while (ret == -EAGAIN ||
ret == -EINTR ||
(ret == -EBUSY && lastdispatch != sarea->last_dispatch) ||
(ret == 0 && seq > sarea->last_dispatch) ||
(ret == 0 && sarea->last_dispatch - seq >= (1 << 24)));
if ( ret ) {
fprintf( stderr, "%s: drmI830IrqWait: %d\n", __FUNCTION__, ret );
exit(1);
}
}
}
void intel_batch_ioctl( struct intel_context *intel,
GLuint start_offset,
GLuint used,
GLboolean ignore_cliprects,
GLboolean allow_unlock )
{
drmI830BatchBuffer batch;
assert(intel->locked);
assert(used);
if (0)
fprintf(stderr, "%s used %d offset %x..%x\n",
__FUNCTION__,
used,
start_offset,
start_offset + used);
batch.start = start_offset;
batch.used = used;
batch.cliprects = NULL;
batch.num_cliprects = 0;
batch.DR1 = 0;
batch.DR4 = 0;
if (INTEL_DEBUG & DEBUG_DMA)
fprintf(stderr, "%s: 0x%x..0x%x\n",
__FUNCTION__,
batch.start,
batch.start + batch.used * 4);
if (!intel->no_hw) {
if (drmCommandWrite (intel->driFd, DRM_I830_BATCHBUFFER, &batch,
sizeof(batch))) {
fprintf(stderr, "DRM_I830_BATCHBUFFER: %d\n", -errno);
UNLOCK_HARDWARE(intel);
exit(1);
}
}
}
void
intel_exec_ioctl(struct intel_context *intel,
GLuint used,
GLboolean ignore_cliprects, GLboolean allow_unlock,
void *start, GLuint count, dri_fence **fence)
{
struct drm_i915_execbuffer execbuf;
dri_fence *fo;
assert(intel->locked);
assert(used);
if (*fence) {
dri_fence_unreference(*fence);
}
memset(&execbuf, 0, sizeof(execbuf));
execbuf.num_buffers = count;
execbuf.batch.used = used;
execbuf.batch.cliprects = intel->pClipRects;
execbuf.batch.num_cliprects = ignore_cliprects ? 0 : intel->numClipRects;
execbuf.batch.DR1 = 0;
execbuf.batch.DR4 = ((((GLuint) intel->drawX) & 0xffff) |
(((GLuint) intel->drawY) << 16));
execbuf.ops_list = (unsigned)start; // TODO
execbuf.fence_arg.flags = DRM_FENCE_FLAG_SHAREABLE | DRM_I915_FENCE_FLAG_FLUSHED;
if (intel->no_hw)
return;
if (drmCommandWriteRead(intel->driFd, DRM_I915_EXECBUFFER, &execbuf,
sizeof(execbuf))) {
fprintf(stderr, "DRM_I830_EXECBUFFER: %d\n", -errno);
UNLOCK_HARDWARE(intel);
exit(1);
}
fo = intel_ttm_fence_create_from_arg(intel->bufmgr, "fence buffers",
&execbuf.fence_arg);
if (!fo) {
fprintf(stderr, "failed to fence handle: %08x\n", execbuf.fence_arg.handle);
UNLOCK_HARDWARE(intel);
exit(1);
}
*fence = fo;
/* FIXME: use hardware contexts to avoid 'losing' hardware after
* each buffer flush.
*/
intel->vtbl.lost_hardware(intel);
}
|
